dpdk.git
2 years agoexamples/fips_validation: add JSON parsing
Brandon Lo [Mon, 30 May 2022 15:52:37 +0000 (21:22 +0530)]
examples/fips_validation: add JSON parsing

Added functions to parse the required information from a vector set
given in the new JSON format.

Signed-off-by: Brandon Lo <blo@iol.unh.edu>
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Jakub Poczatek <jakub.poczatek@intel.com>
2 years agoexamples/fips_validation: add JSON info to header
Brandon Lo [Mon, 30 May 2022 15:52:36 +0000 (21:22 +0530)]
examples/fips_validation: add JSON info to header

Added JSON-specific functions and other information needed to
test the new FIPS test vectors.

Signed-off-by: Brandon Lo <blo@iol.unh.edu>
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Jakub Poczatek <jakub.poczatek@intel.com>
2 years agoexamples/fips_validation: add jansson dependency
Brandon Lo [Mon, 30 May 2022 15:52:35 +0000 (21:22 +0530)]
examples/fips_validation: add jansson dependency

Added a check for RTE_HAS_JANSSON into the meson
configuration file for JSON support.

Signed-off-by: Brandon Lo <blo@iol.unh.edu>
Acked-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Jakub Poczatek <jakub.poczatek@intel.com>
2 years agocrypto/qat: add secp384r1 curve
Arek Kusztal [Fri, 22 Apr 2022 09:33:55 +0000 (10:33 +0100)]
crypto/qat: add secp384r1 curve

This commit adds secp384r1 (P-384) elliptic
curve to Intel QuickAssist Technology crypto PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agocrypto/qat: refactor asym algorithm macros and logs
Arek Kusztal [Fri, 22 Apr 2022 09:33:54 +0000 (10:33 +0100)]
crypto/qat: refactor asym algorithm macros and logs

This commit unifies macros for asymmetric parameters,
therefore making code easier to maintain.
It additionally changes some of PMD output logs that
right now can only be seen in debug mode.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agocrypto/qat: enable asymmetric crypto on GEN4 device
Arek Kusztal [Thu, 7 Apr 2022 09:47:14 +0000 (10:47 +0100)]
crypto/qat: enable asymmetric crypto on GEN4 device

This commit enables asymmetric crypto in generation four
devices (4xxx).

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Kai Ji <kai.ji@intel.com>
2 years agocrypto/qat: fix offset and length assignment
Kai Ji [Wed, 6 Apr 2022 13:45:27 +0000 (21:45 +0800)]
crypto/qat: fix offset and length assignment

This patch fix the cipher & auth offset and length values when convert
mbuf to vector chain for QAT build op.

Fixes: a815a04cea05 ("crypto/qat: support symmetric build op request")
Cc: stable@dpdk.org
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agodrivers/crypto: fix warnings for OpenSSL version
Heinrich Schuchardt [Tue, 10 May 2022 15:06:35 +0000 (17:06 +0200)]
drivers/crypto: fix warnings for OpenSSL version

The API of the OpenSSL library has changed with version 3.0. This results
in a lot of compiler warnings like

    ../dpdk/drivers/crypto/ccp/ccp_crypto.c:182:9:
    warning: ‘SHA256_Transform’ is deprecated:
    Since OpenSSL 3.0 [-Wdeprecated-declarations]

As many Linux distributions still use elder OpenSSL libraries we cannot
change the used API now. Instead define OPENSSL_API_COMPAT to indicate
that we are using the OpenSSL 1.1.0 API.

OPENSSL_API_COMPAT is introduced in *.c files and not in *.h files as some
*.c files directly include OpenSSL headers.

Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library")
Cc: stable@dpdk.org
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Daxue Gao <daxuex.gao@intel.com>
Tested-by: David Marchand <david.marchand@redhat.com>
Acked-by: Kai Ji <kai.ji@intel.com>
2 years agocrypto/ipsec_mb: support ChaChaPoly SGL to aesni_mb
Ciara Power [Wed, 11 May 2022 12:30:45 +0000 (12:30 +0000)]
crypto/ipsec_mb: support ChaChaPoly SGL to aesni_mb

Add SGL support for chacha20_poly1305 algorithm through JOB API.

Supports IN-PLACE SGL, OOP SGL IN and LB OUT,
and OOP SGL IN and SGL OUT.

Feature flags not added, as the PMD does not support SGL for all
other algorithms.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2 years agocrypto/ipsec_mb: support GCM SGL to aesni_mb
Ciara Power [Wed, 11 May 2022 12:30:44 +0000 (12:30 +0000)]
crypto/ipsec_mb: support GCM SGL to aesni_mb

Add SGL support for GCM algorithm through JOB API.

This change supports IN-PLACE SGL, OOP SGL IN and LB OUT,
and OOP SGL IN and SGL OUT.

Feature flags are not added, as the PMD does not yet support SGL for
all other algorithms.
If an SGL op for an unsupported algorithm is being processed,
a NULL job is submitted instead.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2 years agotest/security: add inline IPsec IPv6 flow label cases
Vamsi Attunuru [Tue, 24 May 2022 07:22:16 +0000 (12:52 +0530)]
test/security: add inline IPsec IPv6 flow label cases

Patch adds unit tests for IPv6 flow label set & copy
operations.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/security: add ESN and anti-replay for inline IPsec
Akhil Goyal [Tue, 24 May 2022 07:22:15 +0000 (12:52 +0530)]
test/security: add ESN and anti-replay for inline IPsec

Added cases to test anti replay for inline IPsec processing
with and without extended sequence number support.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/security: add more inline IPsec functional cases
Akhil Goyal [Tue, 24 May 2022 07:22:14 +0000 (12:52 +0530)]
test/security: add more inline IPsec functional cases

Added more inline IPsec functional verification cases.
These cases do not have known vectors but are verified
using encap + decap test for all the algo combinations.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/security: add inline IPsec reassembly cases
Akhil Goyal [Tue, 24 May 2022 07:22:13 +0000 (12:52 +0530)]
test/security: add inline IPsec reassembly cases

Added unit test cases for IP reassembly of inline IPsec
inbound scenarios.
In these cases, known test vectors of fragments are first
processed for inline outbound processing and then received
back on loopback interface for inbound processing along with
IP reassembly of the corresponding decrypted packets.
The resultant plain text reassembled packet is compared with
original unfragmented packet.

In this patch, cases are added for 2/4/5 fragments for both
IPv4 and IPv6 packets. A few negative test cases are also added
like incomplete fragments, out of place fragments, duplicate
fragments.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/security: add combined mode inline IPsec cases
Akhil Goyal [Tue, 24 May 2022 07:22:12 +0000 (12:52 +0530)]
test/security: add combined mode inline IPsec cases

Added combined encap and decap test cases for various algorithm
combinations

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/security: add inline inbound IPsec cases
Akhil Goyal [Tue, 24 May 2022 07:22:11 +0000 (12:52 +0530)]
test/security: add inline inbound IPsec cases

Added test cases for inline Inbound protocol offload
verification with known test vectors from Lookaside mode.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/security: add cases for inline IPsec offload
Akhil Goyal [Tue, 24 May 2022 07:22:10 +0000 (12:52 +0530)]
test/security: add cases for inline IPsec offload

A new test suite is added in test app to test inline IPsec protocol
offload. In this patch, predefined vectors from Lookaside IPsec test
are used to verify the IPsec functionality without the need of
external traffic generators. The sent packet is loopbacked onto the same
interface which is received and matched with the expected output.
The test suite can be updated further with other functional test cases.
In this patch encap only cases are added.
The testsuite can be run using:
RTE> inline_ipsec_autotest

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agoapp/eventdev: support asym ops for crypto adapter
Akhil Goyal [Thu, 12 May 2022 12:45:27 +0000 (18:15 +0530)]
app/eventdev: support asym ops for crypto adapter

Test eventdev app is updated to add new option for asymmetric
crypto ops for event crypto adapter.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/event: add asymmetric cases for crypto adapter
Akhil Goyal [Thu, 12 May 2022 12:45:26 +0000 (18:15 +0530)]
test/event: add asymmetric cases for crypto adapter

Test app is updated to add cases for asymmetric crypto
sessions for event crypto adapter.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agoeventdev: use new API to get event crypto metadata
Akhil Goyal [Thu, 12 May 2022 12:45:25 +0000 (18:15 +0530)]
eventdev: use new API to get event crypto metadata

For getting event crypto metadata from crypto_op,
the new API rte_cryptodev_get_session_event_mdata is used
instead of getting userdata inside PMD.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/event: use new API to set event crypto metadata
Akhil Goyal [Thu, 12 May 2022 12:45:24 +0000 (18:15 +0530)]
test/event: use new API to set event crypto metadata

Used the new API rte_cryptodev_set_session_event_mdata to set
event crypto metadata from the applications (app/test and
app/test-eventdev) instead of using session userdata.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agocrypto/octeontx: use new API for event metadata
Akhil Goyal [Thu, 12 May 2022 12:45:23 +0000 (18:15 +0530)]
crypto/octeontx: use new API for event metadata

For getting event crypto metadata from crypto_op,
the new API rte_cryptodev_get_session_event_mdata can be used
directly instead of getting userdata inside PMD.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agocrypto/cnxk: add event metadata set operation
Volodymyr Fialko [Thu, 12 May 2022 12:45:22 +0000 (18:15 +0530)]
crypto/cnxk: add event metadata set operation

Added cryptodev operation for setting event crypto
metadata for all supported sessions - sym/asym/security.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agocryptodev: add API to get/set event metadata
Volodymyr Fialko [Thu, 12 May 2022 12:45:21 +0000 (18:15 +0530)]
cryptodev: add API to get/set event metadata

Currently, crypto session userdata is used to set event crypto
metadata from the application and the driver is dereferencing it
in driver which is not correct. User data is meant to be opaque
to the driver.
To support this, new API is added to get and set event crypto
metadata. The new API, rte_cryptodev_set_session_event_mdata,
allows setting event metadata in session private data which is
filled inside PMD using a new cryptodev op. This operation
can be performed on any of the PMD supported sessions
(sym/asym/security).
For SW abstraction of event crypto adapter to be used by
eventdev library, a new field is added in asymmetric crypto
session for now and for symmetric case, current implementation
of using userdata is used. Symmetric cases cannot be fixed now,
as it will be ABI breakage which will be resolved in DPDK 22.11.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agotest/crypto: fix null check for ZUC authentication
Ciara Power [Wed, 11 May 2022 13:29:24 +0000 (13:29 +0000)]
test/crypto: fix null check for ZUC authentication

Check if the returned op is NULL because of failure,
before using it and causing a segmentation fault.

Fixes: 4c99481f49c4 ("app/test: add ZUC")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2 years agocrypto/cnxk: enable 3DES-CBC secure capability
Vamsi Attunuru [Mon, 2 May 2022 08:20:58 +0000 (13:50 +0530)]
crypto/cnxk: enable 3DES-CBC secure capability

Patch enables 3DES-CBC secure capability of crypto device.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agocrypto/mlx5: support plain text keys
Raja Zidane [Sun, 1 May 2022 12:13:11 +0000 (15:13 +0300)]
crypto/mlx5: support plain text keys

Using crypto devs requires the user to log in and the supplied DEK to be
encrypted with a KEK (keys encryption key).
KEK is burned once on the nic, along with credentials for users,
and for a user to log in, he is needed to supply his creds wrapped with
the KEK.
A device comes out of the Mellanox factory with a pre-defined import
method for each algorithm. The defined method could be wrapped
mode, so the device can be used as described above, or
plaintext mode, without the need to log in and wrap supplied DEKs.

Support crypto operations with the plaintext import method.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agoexamples/ipsec-secgw: fix promiscuous mode option
Nithin Dabilpuram [Thu, 28 Apr 2022 15:18:30 +0000 (20:48 +0530)]
examples/ipsec-secgw: fix promiscuous mode option

Currently default value of promiscuous mode flag is true and
even there is command line argument to set it to true.
So it never is in non-promiscuous mode. Fix it by
changing default value to false.

Fixes: d299106e8e31 ("examples/ipsec-secgw: add IPsec sample application")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: create lookaside sessions at init
Volodymyr Fialko [Wed, 27 Apr 2022 09:20:20 +0000 (11:20 +0200)]
examples/ipsec-secgw: create lookaside sessions at init

In event lookaside mode same session could be handled with multiple
cores, and session creation in datapath will cause situation where
multiple cores will try to create same session simultaneously.
To avoid such case and enable event lookaside mode in future, lookaside
sessions are now created at initialization in sa_add_rules().

All sessions(inline and lookaside) now created during init process, so
session pool information was removed from ipsec context. Core id was
added to obtain correct crypto device queue pair for the current core.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: destroy lookaside sessions
Volodymyr Fialko [Mon, 28 Mar 2022 10:50:47 +0000 (12:50 +0200)]
examples/ipsec-secgw: destroy lookaside sessions

Lookaside mode also creates security and crypto sessions that needs to
be destroyed after they are no longer used.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: fix uninitialized memory access
Volodymyr Fialko [Fri, 25 Mar 2022 11:29:42 +0000 (12:29 +0100)]
examples/ipsec-secgw: fix uninitialized memory access

rte_flow_validate and rte_flow_create not always initialize flow error.
Using error.message in some error cases will cause read from
uninitialized memory.

Fixes: 6738c0a9569 ("examples/ipsec-secgw: support flow director")
Cc: stable@dpdk.org
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: add poll mode worker for inline proto
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:16 +0000 (02:14 +0530)]
examples/ipsec-secgw: add poll mode worker for inline proto

Add separate worker thread when all SA's are of type
inline protocol offload and librte_ipsec is enabled
in order to make it more optimal for that case.
Current default worker supports all kinds of SA leading
to doing lot of per-packet checks and branching based on
SA type which can be of 5 types of SA's.

Also make a provision for choosing different poll mode workers
for different combinations of SA types with default being
existing poll mode worker that supports all kinds of SA's.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: update eth header during route lookup
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:15 +0000 (02:14 +0530)]
examples/ipsec-secgw: update eth header during route lookup

Update ethernet header during route lookup instead of doing
way later while performing Tx burst. Advantages to doing
is at route lookup is that no additional IP version checks
based on packet data are needed and packet data is already
in cache as route lookup is already consuming that data.

This is also useful for inline protocol offload cases
of v4inv6 or v6inv4 outbound tunnel operations as
packet data will not have any info about what is the tunnel
protocol.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: get security context from lcore conf
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:14 +0000 (02:14 +0530)]
examples/ipsec-secgw: get security context from lcore conf

Store security context pointer in lcore Rx queue config and
get it from there in fast path for better performance.
Currently rte_eth_dev_get_sec_ctx() which is meant to be control
path API is called per packet basis. For every call to that
API, ethdev port status is checked.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: allow larger burst size for vectors
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:13 +0000 (02:14 +0530)]
examples/ipsec-secgw: allow larger burst size for vectors

Allow larger burst size of vector event mode instead of restricting
to 32. Also restructure traffic type struct to have num pkts first
so that it is always in first cacheline. Also cache align
traffic type struct. Since MAX_PKT_BURST is not used by
vector event mode worker, define another macro for its burst
size so that poll mode perf is not effected.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: use HW parsed packet type in poll mode
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:12 +0000 (02:14 +0530)]
examples/ipsec-secgw: use HW parsed packet type in poll mode

Use HW parsed packet type when ethdev supports necessary protocols.
If packet type is not supported, then register ethdev callbacks
for parse packet in SW. This is better for performance as it
effects fast path.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: disable Tx checksum for inline
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:11 +0000 (02:14 +0530)]
examples/ipsec-secgw: disable Tx checksum for inline

Enable Tx IPv4 checksum offload only when Tx inline crypto, lookaside
crypto/protocol or cpu crypto is needed.
For Tx Inline protocol offload, checksum computation
is implicitly taken care by HW.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
2 years agoexamples/ipsec-secgw: move fast path helper functions
Nithin Dabilpuram [Fri, 29 Apr 2022 20:44:10 +0000 (02:14 +0530)]
examples/ipsec-secgw: move fast path helper functions

Move fast path helper functions to header file for easy access.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoconfig/arm: disable SVE ACLE for CN10K
Rahul Bhansali [Thu, 19 May 2022 13:28:30 +0000 (18:58 +0530)]
config/arm: disable SVE ACLE for CN10K

This disable the sve_acle flag for cn10k.

For native build, -Dplatform=cn10k will require to
get sve_acle flag parameter in the build.

Performance impact:-
With l3fwd example, lpm lookup performance increased
by ~21% if Neon is used instead of SVE. Hence, disabled
sve_acle flag for cn10k.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agoconfig/arm: add SVE ACLE control flag
Rahul Bhansali [Thu, 19 May 2022 13:28:29 +0000 (18:58 +0530)]
config/arm: add SVE ACLE control flag

An additional check of control flag sve_acle for
RTE_HAS_SVE_ACLE macro to be part of the build.
If any SoC config doesn't have sve_acle flag parameter
then default it will be considered as true.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agoconfig/arm: add ThunderX T83
Harman Kalra [Mon, 23 May 2022 13:34:29 +0000 (19:04 +0530)]
config/arm: add ThunderX T83

Adding support for Marvell ThunderX T83 platform.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agocommon/cnxk: support CNF950_A0
Tomasz Duszynski [Tue, 19 Apr 2022 08:25:47 +0000 (10:25 +0200)]
common/cnxk: support CNF950_A0

Add PCI IDs which match CNF95O_A0 SoC.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2 years agocommon/cnxk: support CN103XX platform
Rahul Bhansali [Mon, 2 May 2022 11:31:11 +0000 (17:01 +0530)]
common/cnxk: support CN103XX platform

Added support for CN103XX (cn10kb) platform.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoeal/ppc: undefine AltiVec keyword vector
Thomas Monjalon [Wed, 25 May 2022 09:53:07 +0000 (11:53 +0200)]
eal/ppc: undefine AltiVec keyword vector

The AltiVec header file is defining "vector", except in C++ build.
The keyword "vector" may conflict easily.
As a rule, it is better to use the alternative keyword "__vector".

The DPDK header file rte_altivec.h takes care of undefining "vector",
so the applications and dependencies are free to define the name "vector".

This is a compatibility breakage for applications which were using
the keyword "vector" for its AltiVec meaning.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Tested-by: Ali Alnubani <alialnu@nvidia.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2 years agodoc: remove reference to pcapng init function
Cian Ferriter [Fri, 27 May 2022 13:21:42 +0000 (13:21 +0000)]
doc: remove reference to pcapng init function

The rte_pcapng_init function doesn't exist, so remove it from the docs.

Also fix minor mistakes in the file.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2 years agopcapng: fix timestamp wrapping in output files
Quentin Armitage [Tue, 17 May 2022 10:01:15 +0000 (11:01 +0100)]
pcapng: fix timestamp wrapping in output files

In pcap_tsc_to_ns(), delta * NSEC_PER_SEC will overflow approx 8
seconds after pcap_init is called when using a TSC with a frequency
of 2.5GHz.

To avoid the overflow, update the saved time and TSC value once
delta >= tsc_hz.

Fixes: 8d23ce8f5ee ("pcapng: add new library for writing pcapng files")
Cc: stable@dpdk.org
Signed-off-by: Quentin Armitage <quentin@armitage.org.uk>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2 years agoexamples/pipeline: support hash functions
Cristian Dumitrescu [Fri, 20 May 2022 22:31:25 +0000 (23:31 +0100)]
examples/pipeline: support hash functions

Add example for hash function operation.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agopipeline: support hash functions
Cristian Dumitrescu [Fri, 20 May 2022 22:31:24 +0000 (23:31 +0100)]
pipeline: support hash functions

Add support for hash functions that compute a signature for an array
of bytes read from a packet header or meta-data. Useful for flow
affinity-based load balancing.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agoexamples/pipeline: improve learner table timers
Cristian Dumitrescu [Fri, 20 May 2022 22:12:55 +0000 (23:12 +0100)]
examples/pipeline: improve learner table timers

Added the rearm counter to the statistics. Updated the learner table
example to the new learner table timer operation.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agopipeline: improve learner table timers
Cristian Dumitrescu [Fri, 20 May 2022 22:12:54 +0000 (23:12 +0100)]
pipeline: improve learner table timers

Enable the pipeline to use the improved learner table timer operation
through the new "rearm" instruction.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agotable: improve learner table timers
Cristian Dumitrescu [Fri, 20 May 2022 22:12:53 +0000 (23:12 +0100)]
table: improve learner table timers

Previously, on lookup hit, the hit key had its timer automatically
rearmed with the same timeout in order to prevent its expiration. Now,
a broader set of actions is available on lookup hit, which has to be
managed explicitly: the key can have its timer rearmed with the same
or with a different timeout, or the key timer can be left unmodified.
The latter option allows the key to expire naturally when the timer
eventually runs out, unless the key is hit again and its timer rearmed
at that point. Needed by the TCP connection tracking state machine.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agoexamples/pipeline: add packet recirculation example
Cristian Dumitrescu [Wed, 6 Apr 2022 18:55:35 +0000 (19:55 +0100)]
examples/pipeline: add packet recirculation example

Add example program to illustrate packet recirculation.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agopipeline: support packet recirculation
Cristian Dumitrescu [Wed, 6 Apr 2022 18:55:34 +0000 (19:55 +0100)]
pipeline: support packet recirculation

Add support for packet recirculation. The current packet is flagged
for recirculation using the new "recirculate" instruction; on TX, this
flag causes the packet to execute the full pipeline again as if it was
a new packet, except the packet meta-data is preserved. The new
"recircid" instruction can be used to read the pass number in case the
packet goes several times through the pipeline.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agoexamples/pipeline: add packet mirroring example
Cristian Dumitrescu [Wed, 6 Apr 2022 18:55:33 +0000 (19:55 +0100)]
examples/pipeline: add packet mirroring example

Add example program to illustrate packet mirroring.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agoexamples/pipeline: support packet mirroring
Cristian Dumitrescu [Wed, 6 Apr 2022 18:55:32 +0000 (19:55 +0100)]
examples/pipeline: support packet mirroring

Add CLI commands for packet mirroring.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
2 years agopipeline: support packet mirroring
Cristian Dumitrescu [Wed, 6 Apr 2022 18:55:31 +0000 (19:55 +0100)]
pipeline: support packet mirroring

The packet mirroring is configured through slots and sessions, with
the number of slots and sessions set at init.

The new "mirror" instruction assigns one of the existing sessions to a
specific slot, which results in scheduling a mirror operation for the
current packet to be executed later at the time the packet is either
transmitted or dropped.

Several copies of the same input packet can be mirrored to different
output ports by using multiple slots.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
2 years agoport: support packet mirroring
Cristian Dumitrescu [Wed, 6 Apr 2022 18:55:30 +0000 (19:55 +0100)]
port: support packet mirroring

Add packet clone operation to the output ports in order to support
packet mirroring.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
2 years agopipeline: support default action arguments
Cristian Dumitrescu [Mon, 11 Apr 2022 18:21:08 +0000 (19:21 +0100)]
pipeline: support default action arguments

Add support for arguments to the default action of regular and learner
tables at initialization time. Until now, only default actions with no
arguments were accepted in the .spec file.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2 years agopipeline: fix emit instruction for invalid headers
Cristian Dumitrescu [Wed, 27 Apr 2022 21:56:52 +0000 (22:56 +0100)]
pipeline: fix emit instruction for invalid headers

Fix the emit instruction for the pathological case of all headers to
be emitted being invalid. In this case, the for loop was essentially
skipped and the last emitted header (or an invalid memory location)
getting corrupted by setting its size to 0 through the assignment to
ho->n_bytes right after the for loop.

Fixes: d60dbdc88a3e ("pipeline: create inline functions for emit instruction")
Cc: stable@dpdk.org
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Venkata Suresh Kumar P <venkata.suresh.kumar.p@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2 years agodevtools: fix null test for NUMA systems
David Marchand [Wed, 13 Apr 2022 11:19:44 +0000 (13:19 +0200)]
devtools: fix null test for NUMA systems

On NUMA systems, default cores (0 and 1) might be on different memory
nodes. Double the amount of memory.

Fixes: 9e6b36c34ce9 ("app/testpmd: reduce memory consumption")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agodoc: rewrite shell scripts in Python
Dmitry Kozlyuk [Wed, 6 Apr 2022 17:10:12 +0000 (20:10 +0300)]
doc: rewrite shell scripts in Python

Shell used in documentation generation could not run on Windows.
Rewrite scripts in Python.
New scripts use proper path separators and handle paths with spaces.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
2 years agodoc: fix API index Markdown syntax
Dmitry Kozlyuk [Wed, 6 Apr 2022 17:10:11 +0000 (20:10 +0300)]
doc: fix API index Markdown syntax

API documentation index had spaces between link caption and URL,
which may be unsupported by some Markdown implementations.
That is, "[caption](URL)" is valid but "[caption] (URL)" is not.
The problematic behavior is observed with Doxygen on Windows.
Remove the spaces.
Unfortunately, Markdown syntax is not formally specified.

Fixes: 9bf486e606b0 ("doc: generate HTML for API with doxygen")

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2 years agodoc: simplify CSS customization for Doxygen
Dmitry Kozlyuk [Wed, 6 Apr 2022 17:10:10 +0000 (20:10 +0300)]
doc: simplify CSS customization for Doxygen

CSS for API documentation was customized by a shell script
modifying the file that Doxygen produces.
This way CSS code is kept in a script and an extra build step is added.
Move custom style to a plain CSS file.
Use Doxygen capability to attach this extra stylesheet.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2 years agombuf: dump outer VLAN
Ben Magistro [Mon, 4 Apr 2022 00:56:35 +0000 (00:56 +0000)]
mbuf: dump outer VLAN

Enable printing of the outer VLAN if flags indicate it is present.

Cc: stable@dpdk.org
Signed-off-by: Ben Magistro <koncept1@gmail.com>
Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2 years agorib: mark error checks with unlikely
Stephen Hemminger [Wed, 13 Apr 2022 02:09:33 +0000 (19:09 -0700)]
rib: mark error checks with unlikely

Also mark some conditional functions as const.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
2 years agorib: fix traversal with /32 route
Stephen Hemminger [Thu, 14 Apr 2022 20:01:04 +0000 (13:01 -0700)]
rib: fix traversal with /32 route

If a /32 route is entered in the RIB the code to traverse
will not see end of the tree. This is due to trying
to do a negative shift which is an undefined in C.

Fix by checking for max depth as is already done in rib6.

Fixes: 5a5793a5ffa2 ("rib: add RIB library")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
2 years agoip_frag: add IPv4 options fragment
Huichao Cai [Fri, 15 Apr 2022 03:26:50 +0000 (11:26 +0800)]
ip_frag: add IPv4 options fragment

According to RFC791,the options may appear or not in datagrams.
They must be implemented by all IP modules (host and gateways).
What is optional is their transmission in any particular datagram,
not their implementation. So we have to deal with it during the
fragmenting process.
Add some test data for the IPv4 header optional field fragmenting.

Signed-off-by: Huichao Cai <chcchc88@163.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agosched: enable traffic class oversubscription conditionally
Marcin Danilewicz [Tue, 31 May 2022 09:49:28 +0000 (09:49 +0000)]
sched: enable traffic class oversubscription conditionally

Added new API for flag to enable or disable TC oversubscription
for best effort traffic class at subport level.

By default TC OV is enabled.

Signed-off-by: Marcin Danilewicz <marcinx.danilewicz@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agomaintainers: update for nfp
Chaoyong He [Tue, 17 May 2022 03:02:22 +0000 (11:02 +0800)]
maintainers: update for nfp

Add Chaoyong as nfp maintainer.

Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund@corigine.com>
2 years agodma/dpaa2: support statistics
Nipun Gupta [Thu, 5 May 2022 09:05:22 +0000 (14:35 +0530)]
dma/dpaa2: support statistics

This patch support DMA read and reset statistics operations.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agodma/dpaa2: support DMA operations
Nipun Gupta [Thu, 5 May 2022 09:05:21 +0000 (14:35 +0530)]
dma/dpaa2: support DMA operations

This patch support copy, submit, completed and
completed status functionality of DMA driver.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agodma/dpaa2: add driver-specific configuration API
Nipun Gupta [Thu, 5 May 2022 09:05:20 +0000 (14:35 +0530)]
dma/dpaa2: add driver-specific configuration API

Add additional PMD APIs for DPAA2 QDMA driver for configuring
RBP, Ultra Short format, and Scatter Gather support

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agodma/dpaa2: support basic operations
Nipun Gupta [Thu, 5 May 2022 09:05:19 +0000 (14:35 +0530)]
dma/dpaa2: support basic operations

This patch support basic DMA operations which includes
device capability and channel setup.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agodma/dpaa2: introduce driver skeleton
Nipun Gupta [Thu, 5 May 2022 09:05:18 +0000 (14:35 +0530)]
dma/dpaa2: introduce driver skeleton

The DPAA2 DMA  driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
Earlier this was part of RAW driver, but with DMA drivers
added as separate flavor of drivers, this driver is being
moved to DMA drivers.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agoraw/dpaa2_qdma: remove driver
Nipun Gupta [Thu, 5 May 2022 09:05:17 +0000 (14:35 +0530)]
raw/dpaa2_qdma: remove driver

With DMA devices supported as a separate flavor of devices,
the DPAA2 QDMA driver is moved in the DMA devices.

This change removes the DPAA2 QDMA driver from raw devices.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agoapp/acl: support different formats for IPv6 address
Konstantin Ananyev [Sun, 15 May 2022 20:03:19 +0000 (21:03 +0100)]
app/acl: support different formats for IPv6 address

Within ACL rule IPv6 address can be represented in different ways:
either as 4x4B fields, or as 2x8B fields.
Till now, only first format was supported.
Extend test-acl to support both formats, mainly for testing and
demonstrating purposes.
To control desired behavior '--ipv6' command-line option is extended
to accept an optional argument:
To be more precise:
'--ipv6'    - use 4x4B fields format (default behavior)
'--ipv6=4B' - use 4x4B fields format (default behavior)
'--ipv6=8B' - use 2x8B fields format

Also replaced home brewed IPv4/IPv6 address parsing with inet_pton() calls.

Signed-off-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
2 years agoacl: fix rules with 8-byte field size
Konstantin Ananyev [Sun, 15 May 2022 20:03:18 +0000 (21:03 +0100)]
acl: fix rules with 8-byte field size

In theory ACL library allows fields with 8B long.
Though in practice they usually not used, not tested,
and as was revealed by Ido, this functionality is not working properly.
There are few places inside ACL build code-path that need to be addressed.

Bugzilla ID: 673
Fixes: dc276b5780c2 ("acl: new library")
Cc: stable@dpdk.org
Reported-by: Ido Goshen <ido@cgstowernetworks.com>
Signed-off-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
Tested-by: Ido Goshen <ido@cgstowernetworks.com>
2 years agoavoid AltiVec keyword vector
Thomas Monjalon [Tue, 3 May 2022 12:03:21 +0000 (14:03 +0200)]
avoid AltiVec keyword vector

The AltiVec header file is defining "vector", except in C++ build.
The keyword "vector" may conflict easily.
As a rule, it is better to use the alternative keyword "__vector",
so we will be able to #undef vector after including AltiVec header.

Later it may become possible to #undef vector in rte_altivec.h
with a compatibility breakage.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2 years agotest: avoid hang if queues are full and Tx fails
Rakesh Kudurumalla [Tue, 20 Jul 2021 16:50:52 +0000 (22:20 +0530)]
test: avoid hang if queues are full and Tx fails

Current pmd_perf_autotest() in continuous mode tries
to enqueue MAX_TRAFFIC_BURST completely before starting
the test. Some drivers cannot accept complete
MAX_TRAFFIC_BURST even though rx+tx desc count can fit it.
This patch changes behaviour to stop enqueuing after few
retries.

Fixes: 002ade70e933 ("app/test: measure cycles per packet in Rx/Tx")
Cc: stable@dpdk.org
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2 years agogpu/cuda: unmap GPU memory while freeing
Elena Agostini [Fri, 29 Apr 2022 14:14:23 +0000 (14:14 +0000)]
gpu/cuda: unmap GPU memory while freeing

Enable GPU_REGISTERED flag in gpu/cuda driver in the memory list.
If a GPU memory address CPU mapped is freed before being
unmapped, CUDA driver unmaps it before freeing the memory.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agoeal/freebsd: fix use of newer cpuset macros
David Marchand [Fri, 20 May 2022 18:10:50 +0000 (19:10 +0100)]
eal/freebsd: fix use of newer cpuset macros

FreeBSD has updated its CPU macros to align more with the definitions
used on Linux[1]. Unfortunately, while this makes compatibility better
in future, it means we need to have both legacy and newer definition
support. Use a meson check to determine which set of macros are used.

[1] https://cgit.freebsd.org/src/commit/?id=e2650af157bc

Bugzilla ID: 1014
Fixes: c3568ea37670 ("eal: restrict control threads to startup CPU affinity")
Fixes: b6be16acfeb1 ("eal: fix control thread affinity with --lcores")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Daxue Gao <daxuex.gao@intel.com>
2 years agotest/ring: remove excessive inlining
Stanislaw Kardach [Wed, 11 May 2022 15:07:25 +0000 (17:07 +0200)]
test/ring: remove excessive inlining

Forcing inlining in test_ring_enqueue and test_ring_dequeue can cause
the compiled code to grow extensively when compiled with no optimization
(-O0 or -Og). This is default in the meson's debug configuration. This
can collide with compiler bugs and cause issues during linking of unit
tests where the api_type or esize are non-const variables causing
inlining cascade. In perf tests this is not the case in perf-tests as
esize and api_type are const values.

One such case was discovered when porting DPDK to RISC-V. GCC 11.2 (and
no fix still in 12.1) is generating a short relative jump instruction
(J <offset>) for goto and for loops. When loop body grows extensively in
ring test, the target offset goes beyond supported offfset of +/- 1MB
from PC. This is an obvious bug in the GCC as RISC-V has a
two-instruction construct to jump to any absolute address (AUIPC+JALR).

However there is no reason to force inlining as the test code works
perfectly fine without it.

GCC has a bug report for a similar case (with conditionals):
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93062

Fixes: a9fe152363e2 ("test/ring: add custom element size functional tests")

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
2 years agoexamples/l3fwd: fix scalar LPM
Stanislaw Kardach [Wed, 11 May 2022 14:56:50 +0000 (16:56 +0200)]
examples/l3fwd: fix scalar LPM

The lpm_process_event_pkt() can either process a packet using an
architecture specific (defined for X86/SSE, ARM/Neon and PPC64/Altivec)
path or a scalar one. The choice is however done using an ifdef
pre-processor macro. Because of that the scalar version was apparently
not widely exercised/compiled.
Due to some copy/paste errors, the scalar logic in
lpm_process_event_pkt() retained a "continue" statement where it should
utilize rfc1812_process() and return the port/BAD_PORT.

Fixes: 99fc91d18082 ("examples/l3fwd: add event lpm main loop")

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agodevargs: fix leak on hotplug failure
David Marchand [Thu, 14 Apr 2022 11:27:56 +0000 (13:27 +0200)]
devargs: fix leak on hotplug failure

Caught by ASan, if a secondary process tried to attach a device with an
incorrect driver name, devargs was leaked.

Fixes: 64051bb1f144 ("devargs: unify scratch buffer storage")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agoeal/x86: fix unaligned access for small memcpy
Luc Pelletier [Fri, 25 Feb 2022 16:38:05 +0000 (11:38 -0500)]
eal/x86: fix unaligned access for small memcpy

Calls to rte_memcpy for 1 < n < 16 could result in unaligned
loads/stores, which is undefined behaviour according to the C
standard, and strict aliasing violations.

The code was changed to use a packed structure that allows aliasing
(using the __may_alias__ attribute) to perform the load/store
operations. This results in code that has the same performance as the
original code and that is also C standards-compliant.

Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Luc Pelletier <lucp.at.work@gmail.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agotest/threads: add unit test
Tyler Retzlaff [Thu, 12 May 2022 13:14:30 +0000 (06:14 -0700)]
test/threads: add unit test

Establish unit test for testing thread api. Initial unit tests
for rte_thread_{get,set}_affinity_by_id().

Signed-off-by: Narcisa Vasile <navasile@linux.microsoft.com>
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agoeal: get/set thread affinity per thread identifier
Tyler Retzlaff [Thu, 12 May 2022 13:14:29 +0000 (06:14 -0700)]
eal: get/set thread affinity per thread identifier

Implement functions for getting/setting thread affinity.
Threads can be pinned to specific cores by setting their
affinity attribute.

Windows error codes are translated to errno-style error codes.
The possible return values are chosen so that we have as
much semantic compatibility between platforms as possible.

note: convert_cpuset_to_affinity has a limitation that all cpus of
the set belong to the same processor group.

Signed-off-by: Narcisa Vasile <navasile@linux.microsoft.com>
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2 years agoeal: provide current thread identifier
Tyler Retzlaff [Thu, 12 May 2022 13:14:28 +0000 (06:14 -0700)]
eal: provide current thread identifier

Provide a portable type-safe thread identifier.
Provide rte_thread_self for obtaining current thread identifier.

Signed-off-by: Narcisa Vasile <navasile@linux.microsoft.com>
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
2 years agohash: unify CRC32 selection for x86 and Arm
Pavan Nikhilesh [Fri, 13 May 2022 18:27:10 +0000 (23:57 +0530)]
hash: unify CRC32 selection for x86 and Arm

Merge CRC32 hash calculation public API implementation for x86 and Arm.
Select the best available CRC32 algorithm when unsupported algorithm
on a given CPU architecture is requested by an application.

Previously, if an application directly includes `rte_crc_arm64.h`
without including `rte_hash_crc.h` it will fail to compile.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agohash: split x86 and SW hash CRC intrinsics
Pavan Nikhilesh [Fri, 13 May 2022 18:27:09 +0000 (23:57 +0530)]
hash: split x86 and SW hash CRC intrinsics

Split x86 and SW hash crc intrinsics into separate files.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
2 years agoevent/cnxk: flush event queues over multiple pass
Shijith Thotton [Mon, 16 May 2022 16:22:29 +0000 (21:52 +0530)]
event/cnxk: flush event queues over multiple pass

If an event queue flush does not complete after a fixed number of tries,
remaining queues are flushed before retrying the one with incomplete
flush.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2 years agoevent/cnxk: support setting queue attributes at runtime
Shijith Thotton [Mon, 16 May 2022 17:35:51 +0000 (23:05 +0530)]
event/cnxk: support setting queue attributes at runtime

Added API to set queue attributes at runtime and API to get weight and
affinity.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: lock when accessing mbox of SSO
Pavan Nikhilesh [Mon, 16 May 2022 17:35:50 +0000 (23:05 +0530)]
common/cnxk: lock when accessing mbox of SSO

Since mailbox is now accessed from multiple threads, use lock to
synchronize access.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2 years agotest/event: set queue attributes at runtime
Shijith Thotton [Mon, 16 May 2022 17:35:49 +0000 (23:05 +0530)]
test/event: set queue attributes at runtime

Added test cases to test changing of queue QoS attributes priority,
weight and affinity at runtime.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoeventdev: add weight and affinity to queue attributes
Shijith Thotton [Mon, 16 May 2022 17:35:48 +0000 (23:05 +0530)]
eventdev: add weight and affinity to queue attributes

Extended eventdev queue QoS attributes to support weight and affinity.
If queues are of the same priority, events from the queue with highest
weight will be scheduled first. Affinity indicates the number of times,
the subsequent schedule calls from an event port will use the same event
queue. Schedule call selects another queue if current queue goes empty
or schedule count reaches affinity count.

To avoid ABI break, weight and affinity attributes are not yet added to
queue config structure and rely on PMD for managing it. New eventdev op
queue_attr_get can be used to get it from the PMD.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoeventdev: support setting queue attributes at runtime
Shijith Thotton [Mon, 16 May 2022 17:35:47 +0000 (23:05 +0530)]
eventdev: support setting queue attributes at runtime

Added a new eventdev API rte_event_queue_attr_set(), to set event queue
attributes at runtime from the values set during initialization using
rte_event_queue_setup(). PMD's supporting this feature should expose the
capability RTE_EVENT_DEV_CAP_RUNTIME_QUEUE_ATTR.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoevent/cnxk: implement event port quiesce function
Pavan Nikhilesh [Fri, 13 May 2022 17:58:41 +0000 (23:28 +0530)]
event/cnxk: implement event port quiesce function

Implement event port quiesce function to clean up any lcore
resources used.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agoexamples: use event port quiescing
Pavan Nikhilesh [Fri, 13 May 2022 17:58:40 +0000 (23:28 +0530)]
examples: use event port quiescing

Quiesce event ports used by the workers core on exit to free up
any outstanding resources.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoapp/eventdev: use port quiescing
Pavan Nikhilesh [Fri, 13 May 2022 17:58:40 +0000 (23:28 +0530)]
app/eventdev: use port quiescing

Quiesce event ports used by the workers core on exit to free up
any outstanding resources.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoeventdev: quiesce an event port
Pavan Nikhilesh [Fri, 13 May 2022 17:58:39 +0000 (23:28 +0530)]
eventdev: quiesce an event port

Add function to quiesce any core specific resources consumed by
the event port.

When the application decides to migrate the event port to another lcore
or teardown the current lcore it may to call `rte_event_port_quiesce`
to make sure that all the data associated with the event port are released
from the lcore, this might also include any prefetched events.

While releasing the event port from the lcore, this function calls the
user-provided flush callback once per event.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>