dpdk.git
5 years agonet/ice/base: fix inner L2 offset in GRE dummy packet
Leyi Rong [Mon, 1 Jul 2019 05:04:50 +0000 (13:04 +0800)]
net/ice/base: fix inner L2 offset in GRE dummy packet

The offset for the inner L2 header in the dummy GRE packet
was off by 2 bytes so updated the offset.

Fixes: 839c0a4b77e6 ("net/ice/base: enable additional switch rules")

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agonet/ice/base: support ethertype switch filters
Leyi Rong [Mon, 1 Jul 2019 05:04:49 +0000 (13:04 +0800)]
net/ice/base: support ethertype switch filters

Add protocol definitions for ethertype.
Add ice_ethtype_hdr structure definition into the ice_prot_hdr union.
Add ethtype offsets into the training packet maps.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agonet/ice/base: support IPv6 based switch filters
Leyi Rong [Mon, 1 Jul 2019 05:04:48 +0000 (13:04 +0800)]
net/ice/base: support IPv6 based switch filters

- Add IPv6 switch rule support.
- Add IPv6 training packet.
- Correct name of IPv6 header variable.
- Fix enum values so that they point to the proper
  ice_prot_ext_tbl_entry field.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agonet/ipn3ke: modify AFU configurations
Dan Wei [Sat, 22 Jun 2019 14:25:21 +0000 (10:25 -0400)]
net/ipn3ke: modify AFU configurations

Modify AFU configurations for new BBS (Blue Bitstream) of A10 on N3000
card:
- AFU register access: RTL changes the UPL (User Programmable Logic
which is the container of vBNG IP) base address and the read/write
commands of register indirect access.
- Poll the INIT_STS register to wait for the vBNG IP and DDR reset
completion.
- Refine log for debug: print UPL_version not only for vBNG bit stream,
but also for other bit streams.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: stable@dpdk.org
Signed-off-by: Dan Wei <dan.wei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
5 years agonet/nfb: support Silicom Mango card
Rastislav Cernay [Thu, 13 Jun 2019 12:33:41 +0000 (14:33 +0200)]
net/nfb: support Silicom Mango card

Add support for Silicom FB2CGG3 smart NIC

Signed-off-by: Rastislav Cernay <cernay@netcope.com>
5 years agonet/szedata2: support Silicom Mango card
Rastislav Cernay [Thu, 13 Jun 2019 13:01:46 +0000 (15:01 +0200)]
net/szedata2: support Silicom Mango card

Add support for Silicom FB2CGG3 smart NIC

Signed-off-by: Rastislav Cernay <cernay@netcope.com>
Acked-by: Jan Remes <remes@netcope.com>
5 years agoevent/octeontx2: add devargs to control timer adapters
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:53 +0000 (23:53 +0530)]
event/octeontx2: add devargs to control timer adapters

Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add devargs to limit timer adapters
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:52 +0000 (23:53 +0530)]
event/octeontx2: add devargs to limit timer adapters

Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.

Example:
--dev "0002:0e:00.0,tim_rings_lmt=2"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer adapter start and stop
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:51 +0000 (23:53 +0530)]
event/octeontx2: add timer adapter start and stop

Add event timer adapter start and stop functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer stats get and reset
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:50 +0000 (23:53 +0530)]
event/octeontx2: add timer stats get and reset

Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
--dev "0002:0e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer cancel function
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:49 +0000 (23:53 +0530)]
event/octeontx2: add timer cancel function

Add function to cancel event timer that has been armed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer arm timeout burst
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:48 +0000 (23:53 +0530)]
event/octeontx2: add timer arm timeout burst

Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer arm routine
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:47 +0000 (23:53 +0530)]
event/octeontx2: add timer arm routine

Add event timer arm routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add TIM bucket operations
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:46 +0000 (23:53 +0530)]
event/octeontx2: add TIM bucket operations

Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer adapter info function
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:45 +0000 (23:53 +0530)]
event/octeontx2: add timer adapter info function

Add TIM event timer adapter info get function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: allow adapters to resize inflight buffers
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:44 +0000 (23:53 +0530)]
event/octeontx2: allow adapters to resize inflight buffers

Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add TIM IRQ handlers
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:43 +0000 (23:53 +0530)]
event/octeontx2: add TIM IRQ handlers

Register and implement TIM IRQ handlers for error interrupts

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add devargs to modify chunk slots
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:42 +0000 (23:53 +0530)]
event/octeontx2: add devargs to modify chunk slots

Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.

Example:
--dev "0002:0e:00.0,tim_chnk_slots=511"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add devargs to disable NPA
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:41 +0000 (23:53 +0530)]
event/octeontx2: add devargs to disable NPA

If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: allow TIM to optimize config
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:40 +0000 (23:53 +0530)]
event/octeontx2: allow TIM to optimize config

Allow TIM to optimize user supplied configuration based on
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES flag.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: create and free timer adapter
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:39 +0000 (23:53 +0530)]
event/octeontx2: create and free timer adapter

When the application calls timer adapter create the following is used:
- Allocate a TIM lf based on number of lf's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
* Buckets based on min and max timeout supplied.
* Allocate the chunk pool based on the number of timers.

On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add timer adapter capabilities
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:38 +0000 (23:53 +0530)]
event/octeontx2: add timer adapter capabilities

Add function to retrieve event timer adapter capabilities.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: support event timer
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:37 +0000 (23:53 +0530)]
event/octeontx2: support event timer

Add event timer adapter aka TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add SSO selftest
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:36 +0000 (23:53 +0530)]
event/octeontx2: add SSO selftest

Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:

Example:
--dev "0002:0e:00.0,selftest=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: add device stop and close functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:35 +0000 (23:53 +0530)]
event/octeontx2: add device stop and close functions

Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add devargs to control SSO GGRP QoS
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:34 +0000 (23:53 +0530)]
event/octeontx2: add devargs to control SSO GGRP QoS

SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: add device start function
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:33 +0000 (23:53 +0530)]
event/octeontx2: add device start function

Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add devargs to force legacy mode
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:32 +0000 (23:53 +0530)]
event/octeontx2: add devargs to force legacy mode

Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add worker dual GWS dequeue functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:31 +0000 (23:53 +0530)]
event/octeontx2: add worker dual GWS dequeue functions

Add workder dual workslot mode dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add worker dual GWS enqueue functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:30 +0000 (23:53 +0530)]
event/octeontx2: add worker dual GWS enqueue functions

Add dual workslot mode event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: add SSO dual GWS HW device operations
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:29 +0000 (23:53 +0530)]
event/octeontx2: add SSO dual GWS HW device operations

Add SSO dual workslot mode GWS HW device operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: add SSO dual workslot mode
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:28 +0000 (23:53 +0530)]
event/octeontx2: add SSO dual workslot mode

OcteonTx2 AP core SSO cache contains two entries each entry caches
state of an single GWS aka event port.
AP core requests events from SSO by using following sequence :
1. Write to SSOW_LF_GWS_OP_GET_WORK
2. Wait for SSO to complete scheduling by polling on SSOW_LF_GWS_TAG[63]
3. SSO notifies core by clearing SSOW_LF_GWS_TAG[63] and if work is
valid SSOW_LF_GWS_WQP is non-zero.
The above sequence uses only one in-core cache entry.

In dual workslot mode we try to use both the in-core cache entries by
triggering GET_WORK on a second workslot as soon as the above sequence
completes. This effectively hides the schedule latency of SSO if there
are enough events with unique flow_tags in-flight.
This mode reserves two SSO GWS lf's for each event port effectively
doubling single core performance.
Dual workslot mode is the default mode of operation in octeontx2.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: add worker dequeue functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:27 +0000 (23:53 +0530)]
event/octeontx2: add worker dequeue functions

Add worker event dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add worker enqueue functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:26 +0000 (23:53 +0530)]
event/octeontx2: add worker enqueue functions

Add worker event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add SSO HW device operations
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:25 +0000 (23:53 +0530)]
event/octeontx2: add SSO HW device operations

Add SSO HW device operations used for enqueue/dequeue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: support xstats
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:24 +0000 (23:53 +0530)]
event/octeontx2: support xstats

Add support for retrieving statistics from SSO GWS and GGRP.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
5 years agoevent/octeontx2: add register dump functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:23 +0000 (23:53 +0530)]
event/octeontx2: add register dump functions

Add SSO GWS and GGRP register dump function to aid debugging.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add SSO GWS and GGRP IRQ handlers
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:22 +0000 (23:53 +0530)]
event/octeontx2: add SSO GWS and GGRP IRQ handlers

Register and implement SSO GWS and GGRP IRQ handlers for error
interrupts.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: support dequeue timeout tick conversion
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:21 +0000 (23:53 +0530)]
event/octeontx2: support dequeue timeout tick conversion

Add function to convert dequeue timeout from ns to ticks.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: support linking queues to ports
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:20 +0000 (23:53 +0530)]
event/octeontx2: support linking queues to ports

Links between queues and ports are controlled by setting/clearing GGRP
membership in SSOW_LF_GWS_GRPMSK_CHG.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add port config functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:19 +0000 (23:53 +0530)]
event/octeontx2: add port config functions

Add default config, setup and release functions for event ports
i.e. SSO GWS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add devargs for inflight buffer count
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:18 +0000 (23:53 +0530)]
event/octeontx2: add devargs for inflight buffer count

The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
--dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: allocate event inflight buffers
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:17 +0000 (23:53 +0530)]
event/octeontx2: allocate event inflight buffers

Allocate buffers in DRAM that hold inflight events.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add event queue config functions
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:16 +0000 (23:53 +0530)]
event/octeontx2: add event queue config functions

Add default config, setup and release functions for event queues i.e.
SSO GGRPS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add device configure function
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:15 +0000 (23:53 +0530)]
event/octeontx2: add device configure function

Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add device capabilities function
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:14 +0000 (23:53 +0530)]
event/octeontx2: add device capabilities function

Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/octeontx2: add init and fini for SSO object
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:13 +0000 (23:53 +0530)]
event/octeontx2: add init and fini for SSO object

SSO object needs to be initialized to communicate with the kernel AF
driver through mbox using the common API's.
Also, initialize the internal eventdev structure to defaults.
Attach NPA lf to the PF if needed.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/octeontx2: add build infra and device probe
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:12 +0000 (23:53 +0530)]
event/octeontx2: add build infra and device probe

Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
5 years agotest/eventdev: fix producer core validity checks
Pavan Nikhilesh [Sun, 30 Jun 2019 17:52:40 +0000 (23:22 +0530)]
test/eventdev: fix producer core validity checks

When producer type is event timer adapter producer lcore checks are
skipped. Since, timer adapter relies on SW to arm timers producer lcore
is essential for its functionality.
Verify producer lcore validity when producer type is event timer
adapter.

Fixes: b01974da9f25 ("app/eventdev: add ethernet device producer option")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoapp/eventdev: fix order test port creation
Pavan Nikhilesh [Sun, 30 Jun 2019 17:52:39 +0000 (23:22 +0530)]
app/eventdev: fix order test port creation

Configure event ports based on the underlying event device info rather
than using hardcoded values.

Fixes: 5710e751813e ("app/testeventdev: add order port setup")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoeventdev: fix doxygen comment
Jerin Jacob [Tue, 2 Jul 2019 06:45:48 +0000 (12:15 +0530)]
eventdev: fix doxygen comment

Update rte_eventdev.h file description to adapt to Tx adapter changes.

Fixes: c9bf83947e2e ("eventdev: add eth Tx adapter APIs")
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
5 years agoeventdev: change Rx adapter callback and stats structure
Nikhil Rao [Mon, 24 Jun 2019 23:16:02 +0000 (04:46 +0530)]
eventdev: change Rx adapter callback and stats structure

Replace the mbuf pointer array in the event eth Rx adapter
callback with an event array. Using an event array allows
the application to change attributes of the events enqueued
by the SW adapter.

The callback can drop packets and populate a callback
argument with the number of dropped packets. Add a Rx adapter
stats field to keep track of the total number of dropped packets.

This commit removes the experimental tags from
the callback and stats APIs, the experimental tag from eventdev
is also removed and eventdev functions become part of the
main DPDK API/ABI.

Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoevent/dpaa2: fix timeout ticks
Nipun Gupta [Thu, 27 Jun 2019 09:36:04 +0000 (15:06 +0530)]
event/dpaa2: fix timeout ticks

Correct timeout to tick conversion.

Fixes: 0ce3ce7c275c ("event/dpaa2: add configuration functions")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
5 years agoeventdev: add new software timer adapter
Erik Gabriel Carrillo [Wed, 19 Jun 2019 16:25:58 +0000 (11:25 -0500)]
eventdev: add new software timer adapter

This patch introduces a new version of the event timer adapter software
PMD. In the original design, timer event producer lcores in the primary
and secondary processes enqueued event timers into a ring, and a
service core in the primary process dequeued them and processed them
further.  To improve performance, this version does away with the ring
and lets lcores insert timers directly into timer skiplist data
structures; the service core directly accesses the lists as well, when
looking for timers that have expired.

To compare the burst and non-burst performance of the original and new
versions of the software event timer adapter, I ran the following
commands:

$ sudo ./build/app/dpdk-test-eventdev -c 0xFFE -s 0xC --vdev=event_sw0 \
-- --test=perf_queue --plcores=4,5,6 --wlcore=7,8,9 --stlist=p \
--prod_type_timerdev --worker_deq_depth=32

$ sudo ./build/app/dpdk-test-eventdev -c 0xFFE -s 0xC --vdev=event_sw0 \
-- --test=perf_queue --plcores=4,5,6 --wlcore=7,8,9 --stlist=p \
--prod_type_timerdev_burst --worker_deq_depth=32

With the new version, I see a 151% improvement in throughput for the
non-burst case, and a 270% improvement in throughput for the burst case.
I also see a 53% improvement in arm latency in the non-burst case and a
65% improvement in arm latency in the burst case.

Note: To perform the test,  I commented out a check in the original
version that checks the adapter tick interval against a minimum value.

Signed-off-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoeventdev: optimize Rx adapter enqueue
Nikhil Rao [Tue, 28 May 2019 01:05:04 +0000 (06:35 +0530)]
eventdev: optimize Rx adapter enqueue

Setup event when the Rx queue is added to the
adapter in place of generating the event when it is
being enqueued to the event device.

Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agoeventdev: remove event copy in Rx adapter
Nikhil Rao [Tue, 21 May 2019 21:52:53 +0000 (03:22 +0530)]
eventdev: remove event copy in Rx adapter

Remove copy from temporary event array on the stack to the
enqueue buffer event array entry, instead initialize event in the
enqueue buffer event array entry.

Suggested-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
5 years agomk: fix -march for octeontx2 target
Jerin Jacob [Tue, 2 Jul 2019 15:06:19 +0000 (20:36 +0530)]
mk: fix -march for octeontx2 target

Correct the wrong -march=-mcpu=armv8.2-a+crc+crypto+lse for
octeontx2 target. Since rte_cc_has_argument drops invalid
CFLAG and -mcpu=octeontx2 picks up the correct optimization,
this typo is not noticed in performance testing.

Fixes: 01d184798731 ("config: add octeontx2 machine")
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
5 years agodrivers: add reasons for components being disabled
Bruce Richardson [Wed, 5 Jun 2019 20:22:41 +0000 (21:22 +0100)]
drivers: add reasons for components being disabled

For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agolib: add reasons for components being disabled
Bruce Richardson [Wed, 5 Jun 2019 20:22:40 +0000 (21:22 +0100)]
lib: add reasons for components being disabled

For each library where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agobuild: print list of disabled components
Bruce Richardson [Wed, 5 Jun 2019 20:22:39 +0000 (21:22 +0100)]
build: print list of disabled components

When configuring with meson we print out a list of enabled components, but
it is also useful to list out the disabled components and the reasons why.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agoexamples/vhost_crypto: support build with pkg-config
Bruce Richardson [Tue, 2 Jul 2019 14:44:45 +0000 (15:44 +0100)]
examples/vhost_crypto: support build with pkg-config

The vhost_crypto example app did not check for a libdpdk pkg-config file
and attempt to build using that. Add support for that method of compile to
align the app with the other examples.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agoexamples/vdpa: support build with pkg-config
Bruce Richardson [Tue, 2 Jul 2019 14:44:44 +0000 (15:44 +0100)]
examples/vdpa: support build with pkg-config

The vdpa example app did not check for a libdpdk pkg-config file and
attempt to build using that. Add support for that method of compile to
align the app with the other examples.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agodevtools: test pkg-config file
Bruce Richardson [Tue, 2 Jul 2019 14:44:43 +0000 (15:44 +0100)]
devtools: test pkg-config file

The pkg-config file generated as part of the build of DPDK should allow
applications to be built with an installed DPDK. We can test this as
part of the build by doing an install of DPDK to a temporary directory
within the build folder, and by then compiling up a few sample apps
using make working off that directory.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agodevtools: test meson build with available compilers
Bruce Richardson [Tue, 2 Jul 2019 14:44:42 +0000 (15:44 +0100)]
devtools: test meson build with available compilers

Allow the script to run with a reduced set of builds if clang, or
other compilers, are missing.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agoexamples: support relocated DPDK install
Bruce Richardson [Tue, 2 Jul 2019 14:44:41 +0000 (15:44 +0100)]
examples: support relocated DPDK install

For testing of DPDK, we want to override the prefix given by the
pkg-config file, so that we can get correct paths for DPDK installed
in an unusual location.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agorawdev: pass the device id as parameter to selftest
Bruce Richardson [Tue, 2 Jul 2019 09:56:08 +0000 (10:56 +0100)]
rawdev: pass the device id as parameter to selftest

When running self-tests, the driver needs to know the device on which to
run the tests, so we need to take the device ID as parameter. Only the
skeleton driver is providing this selftest capability right now, so we can
easily update it for this change.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agoraw/skeleton: remove compile-time constant for device id
Bruce Richardson [Tue, 2 Jul 2019 09:56:07 +0000 (10:56 +0100)]
raw/skeleton: remove compile-time constant for device id

Use a variable value rather than compile-time constant zero as the
device id for the skeleton rawdev tests. This ensures we can make the
tests work even if other rawdevs are present.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agotest: add rawdev autotest to meson
Bruce Richardson [Tue, 2 Jul 2019 09:56:06 +0000 (10:56 +0100)]
test: add rawdev autotest to meson

the test_rawdev.c file was missing from the meson.build file, and the test
case from the list of test commands.

Fixes: 55ca1b0f2151 ("raw/skeleton: add test cases")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agobuildtools: filter out checked symbols for icc
David Marchand [Tue, 2 Jul 2019 12:13:50 +0000 (14:13 +0200)]
buildtools: filter out checked symbols for icc

For some reason, ICC creates additional global symbols with a . which
triggers an error in the check that validates that symbols in the
experimental section are properly published in the map file of the
library. Filter them out.

Fixes: 3290ac14eb94 ("buildtools: detect discrepancies for experimental symbols")

Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Tested-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agodoc: remove useless Rx configuration in l2fwd guide
Bao-Long Tran [Mon, 3 Jun 2019 10:06:23 +0000 (17:06 +0700)]
doc: remove useless Rx configuration in l2fwd guide

Update doc the match with code.

Fixes: 81f7ecd9 ("examples: use factorized default Rx/Tx configuration")
Cc: stable@dpdk.org
Signed-off-by: Bao-Long Tran <longtb5@viettel.com.vn>
5 years agoexamples/l3fwd-vf: remove unused Rx/Tx configuration
Bao-Long Tran [Mon, 3 Jun 2019 10:06:18 +0000 (17:06 +0700)]
examples/l3fwd-vf: remove unused Rx/Tx configuration

The RX and TX Prefetch, Host, and Write-back threshold values are
defined but not used anywhere. They are leftovers from a previous
patch.

Fixes: 81f7ecd9 ("examples: use factorized default Rx/Tx configuration")
Cc: stable@dpdk.org
Signed-off-by: Bao-Long Tran <longtb5@viettel.com.vn>
5 years agoraw/skeleton: fix test of attribute set/get
Thinh Tran [Tue, 11 Jun 2019 21:44:12 +0000 (16:44 -0500)]
raw/skeleton: fix test of attribute set/get

Using memory on the stack instead of on the heap by calling malloc
also avoid memory leak in case of test case failures

Fixes: 88d0e47880ec ("raw/skeleton: fix memory leak on test failure")
Cc: stable@dpdk.org
Signed-off-by: Thinh Tran <thinhtr@linux.vnet.ibm.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agomalloc: deprecate unused function to set limit
Stephen Hemminger [Wed, 26 Jun 2019 22:32:12 +0000 (15:32 -0700)]
malloc: deprecate unused function to set limit

The function rte_malloc_set_limit was defined but never implemented.
Mark it as deprecated for now, and remove in next release.

There is no point in keeping dead code.
"You Aren't Going to Need It"

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
5 years agoeal/freebsd: add config reattach in secondary process
Anatoly Burakov [Thu, 27 Jun 2019 11:33:46 +0000 (12:33 +0100)]
eal/freebsd: add config reattach in secondary process

Linux EAL will attach the shared config at an arbitrary address,
find out where the shared config is mapped in the primary, and
then will reattach it at that exact address.

FreeBSD version doesn't seem to go for that extra reattach step,
which makes one wonder how did it ever work in the first place.

Fix the FreeBSD init to also reattach shared config to the exact
same place the primary process has it.

Fixes: 764bf26873b9 ("add FreeBSD support")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
5 years agoeal/freebsd: fix init completion
Anatoly Burakov [Thu, 27 Jun 2019 11:33:45 +0000 (12:33 +0100)]
eal/freebsd: fix init completion

When init is complete, EAL is supposed to update internal config
to indicate that initialization is complete. Add missing write.

Fixes: a99c96e96ad3 ("eal: add internal flag of init completed")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
5 years agombuf: clarify outer offsets for non-tunnel packets
Ivan Malov [Thu, 27 Jun 2019 21:06:18 +0000 (00:06 +0300)]
mbuf: clarify outer offsets for non-tunnel packets

The default policy for offload-specific fields is that
they are undefined unless the corresponding offloads are
requested in mbuf ol_flags. This is also the case for outer
L2 and L3 length fields which must not be assumed to contain
zeros for non-tunnel packets. The patch clarifies this behaviour
in the comments and also adds appropriate checks to the PMDs which
do not check any tunnel-related offloads before using the said fields.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
5 years agoexamples/flow_filtering: remove out-of-date comment
Xiaolong Ye [Tue, 18 Jun 2019 13:45:51 +0000 (21:45 +0800)]
examples/flow_filtering: remove out-of-date comment

Now we've setup both rx and tx queues.

Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Ori Kam <orika@mellanox.com>
5 years agonet/memif: support multi-process
Jakub Grajciar [Tue, 25 Jun 2019 10:05:02 +0000 (12:05 +0200)]
net/memif: support multi-process

Multi-process support for memif PMD.
Primary process handles connection establishment.
Secondary process queries for memory regions.

Signed-off-by: Jakub Grajciar <jgrajcia@cisco.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
5 years agonet/af_xdp: support need wakeup feature
Xiaolong Ye [Fri, 28 Jun 2019 10:07:04 +0000 (18:07 +0800)]
net/af_xdp: support need wakeup feature

This patch enables need_wakeup flag for Tx and fill rings, when this
flag is set by the driver, it means that the userspace application has
to explicitly wake up the kernel Rx or kernel Tx processing by issuing
a syscall. Poll() can wake up both and sendto() or its alternatives
will wake up Tx processing only.

This feature is to provide efficient support for case that application
and driver executing on the same core.

Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet: fix how L4 checksum choice is tested
Ivan Malov [Fri, 28 Jun 2019 03:13:09 +0000 (06:13 +0300)]
net: fix how L4 checksum choice is tested

The API to prepare checksum offloads mistreats L4
checksum type enum values as self-contained flags.

Turning these flag checks into enum checks causes
warnings by GCC about possibly uninitialised IPv4
header pointer. The issue was found to show up in
the case of GCC versions 4.8.5 and 5.4.0, however,
it might be the case for a wider variety of other
versions. Initialise the pointer upon declaration.
and explain the reason behind this in the comment.

Fixes: 4fb7e803eb1a ("ethdev: add Tx preparation")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
5 years agomaintainers: update for szedata2 PMD
Jan Remes [Fri, 28 Jun 2019 15:24:37 +0000 (17:24 +0200)]
maintainers: update for szedata2 PMD

Rastislav will co-maintain the szedata2 PMD with me.

Signed-off-by: Jan Remes <remes@netcope.com>
5 years agonet/pcap: enable infinitely Rx a pcap file
Cian Ferriter [Fri, 14 Jun 2019 14:43:37 +0000 (15:43 +0100)]
net/pcap: enable infinitely Rx a pcap file

It can be useful to use pcap files for some rudimental performance
testing. This patch enables this functionality in the pcap driver.

At a high level, this works by creating a ring of sufficient size to
store the packets in the pcap file passed to the application. When the
rx function for this mode is called, packets are dequeued from the ring
for use by the application and also enqueued back on to the ring to be
"received" again.

A tx_drop mode is also added since transmitting to a tx_pcap file isn't
desirable at a high traffic rate.

Jumbo frames are not supported in this mode. When filling the ring at rx
queue setup time, the presence of multi segment mbufs is checked for.
The PMD will exit on detection of these multi segment mbufs.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/pcap: use a struct to pass user options
Cian Ferriter [Fri, 14 Jun 2019 14:43:36 +0000 (15:43 +0100)]
net/pcap: use a struct to pass user options

The argument lists on some of the device creation functions are quite
large. Using a struct to hold the user options parsed in
'pmd_pcap_probe' will allow for cleaner function calls and definitions.
Adding user options will also be easier.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agodoc: fix typos in flow API guide
Xiaolong Ye [Tue, 18 Jun 2019 14:07:05 +0000 (22:07 +0800)]
doc: fix typos in flow API guide

Fixes: 3e0ceb9f17ff ("doc: add basic howto for flow API")
Cc: stable@dpdk.org
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/netvsc: fix xstats for VF device
Stephen Hemminger [Thu, 20 Jun 2019 22:09:24 +0000 (15:09 -0700)]
net/netvsc: fix xstats for VF device

The id values for VF stats were not being offset correctly.
And getting xstats for VF device only worked if VF device supported
it; it did not support the generic stats.

Fixes: dc7680e8597c ("net/netvsc: support integrated VF")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
5 years agonet/netvsc: fix xstats id
Mohsin Mazhar Shaikh [Thu, 20 Jun 2019 22:09:23 +0000 (15:09 -0700)]
net/netvsc: fix xstats id

The xstats_get was not setting id correctly for each entry.

Fixes: 4e9c73e96e83 ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org
Signed-off-by: Mohsin Mazhar Shaikh <mohsinmazhar_shaikh@trendmicro.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
5 years agonet/netvsc: support configuring RSS parameters
Stephen Hemminger [Thu, 13 Jun 2019 15:03:43 +0000 (08:03 -0700)]
net/netvsc: support configuring RSS parameters

Add RSS hash key and reta update and query functions.

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
5 years agonet/netvsc: fix RSS offload settings
Stephen Hemminger [Thu, 13 Jun 2019 15:03:42 +0000 (08:03 -0700)]
net/netvsc: fix RSS offload settings

Use the result from querying host to show the RSS info.

Fixes: 4e9c73e96e83 ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
5 years agonet/mlx5: fix 32-bit build
Ali Alnubani [Thu, 27 Jun 2019 15:10:07 +0000 (18:10 +0300)]
net/mlx5: fix 32-bit build

This is to fix the error:
  ```
  drivers/net/mlx5/mlx5_defs.h:14:26:
  error: format '%lx' expects argument of type 'long unsigned int',
  but argument 5 has type 'off_t {aka long long int}' [-Werror=format=]
  drivers/net/mlx5/mlx5_txq.c:569:48: note: format string is defined here
     DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx"
                                                ~~^
                                                %llx
  ```
Which reproduces with gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0.

Fixes: 6bf10ab69be0 ("net/mlx5: support 32-bit systems")
Cc: stable@dpdk.org
Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet: fix encapsulation markers for inner L3 offset
Ivan Malov [Fri, 24 May 2019 14:57:14 +0000 (17:57 +0300)]
net: fix encapsulation markers for inner L3 offset

The API to prepare checksum offloads employs outer
IP checksum flag to tell regular IPv4 packets from
tunnel packets with outer IPv4 encapsulation. This
flag cannot serve as a marker for the said purpose
because a packet can have outer IPv4 encapsulation
and may not have outer IP checksum offload request.

Fix the API by changing the said criterion to test
outer IPv4 flag rather than outer IP checksum flag.
Use simpler spelling of the conditional expression.

Fixes: 4fb7e803eb1a ("ethdev: add Tx preparation")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
5 years agonet/hinic: add RSS stats and promiscuous ops
Ziyang Xuan [Thu, 27 Jun 2019 08:20:20 +0000 (16:20 +0800)]
net/hinic: add RSS stats and promiscuous ops

Add RSS, stats, promiscuous ops related function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic: add Rx/Tx
Ziyang Xuan [Thu, 27 Jun 2019 08:19:48 +0000 (16:19 +0800)]
net/hinic: add Rx/Tx

This patch add package sending and receiving function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic: add start/stop and queue ops
Ziyang Xuan [Thu, 27 Jun 2019 08:19:19 +0000 (16:19 +0800)]
net/hinic: add start/stop and queue ops

Add dev_start, dev_stop, link_update, queue_setup, queue_release
related function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic: add device initialization
Ziyang Xuan [Thu, 27 Jun 2019 08:18:47 +0000 (16:18 +0800)]
net/hinic: add device initialization

Add device initialization function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic: add build and doc files
Ziyang Xuan [Thu, 27 Jun 2019 08:18:20 +0000 (16:18 +0800)]
net/hinic: add build and doc files

Add build and doc files along with hinic_pmd_ethdev.c
which just includes PMD register and log initialization
for compilation.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic/base: add various headers
Ziyang Xuan [Thu, 27 Jun 2019 08:17:45 +0000 (16:17 +0800)]
net/hinic/base: add various headers

Add various headers that define mgmt commands, cmdq commands
and basic defines for use in the code.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic/base: support context and work queue
Ziyang Xuan [Thu, 27 Jun 2019 08:17:14 +0000 (16:17 +0800)]
net/hinic/base: support context and work queue

Work queue is used for cmdq and Rx/Tx buff description.
NIC business needs to configure cmdq context and txq/rxq
context. This patch adds data structures and function codes
for work queue and context.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic/base: add NIC business configurations
Ziyang Xuan [Thu, 27 Jun 2019 08:16:34 +0000 (16:16 +0800)]
net/hinic/base: add NIC business configurations

The items of configurations and queries for NIC business include
MAC, VLAN, MTU, RSS and so on. These configurations and queries
are handled by mgmt module. This patch introduces related
data structures and function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic/base: add hardware operation
Ziyang Xuan [Thu, 27 Jun 2019 08:15:57 +0000 (16:15 +0800)]
net/hinic/base: add hardware operation

Add code for hardware operation, including configuration,
query and so on.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/hinic/base: add mgmt module
Ziyang Xuan [Thu, 27 Jun 2019 08:15:26 +0000 (16:15 +0800)]
net/hinic/base: add mgmt module

Mgmt module is a kind of administration module for the chip.
It is responsible for handling administration command from host.
It uses api channel. This patch adds related data structures,
packaged interfaces and function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>