The PCI device address is being used for sending mailbox which was
introduced in previous commit which replaced the macros so that
multiple DPI blocks in the hardware can be supported.
This patch fixes a NULL pointer access by assigning the PCI device
structure to dpivf.
Users of <rte_ip.h> relied on it to provide IP-related defines,
like IPPROTO_* constants, but still had to include POSIX headers
for inet_pton() and other standard IP-related facilities.
Extend <rte_ip.h> so that it is a single header to gain access
to IP-related facilities on any OS. Use it to replace POSIX includes
in components enabled on Windows. Move missing constants from Windows
networking shim to OS shim header and include it where needed.
Remove Windows networking shim that is no longer needed.
Windows Sockets headers contain `#define s_addr S_un.S_addr`, which
conflicts with definition of `s_addr` field of `struct rte_ether_hdr`.
Prieviously `s_addr` was undefined in <rte_ether.h>, which had been
breaking access to `s_addr` field of `struct in_addr`, so some DPDK
and Windows headers could not be included in one file.
Renaming of `struct rte_ether_hdr` is planned:
https://mails.dpdk.org/archives/dev/2021-March/201444.html
Temporarily disable `s_addr` macro around `struct rte_ether_hdr`
definition to avoid conflict. Place source MAC address in both `s_addr`
and `S_un.S_addr` fields, so that access works either directly or
through the macro as defined in Windows headers.
DPDK code often relies on functions and macros that are not standard C,
but are found on all platforms, even if by slightly different names.
Windows <rte_os.h> provided macros or inline definitions for such symbols.
However, when placed in public header, these symbols were unnecessarily
exposed, breaking consumer POSIX compatibility code.
Move most of the shims to <rte_os_shim.h>, a header to be used instead
of <rte_os.h> by internal code. Include it in libraries and PMDs that
previously imported shims from <rte_os.h>. Directly replace shims that
were only used inside EAL:
* index -> strchr, rindex -> strrchr
* sleep -> rte_delay_us_sleep
* strerror_r -> strerror_s
Make asprintf(3) implementation for Windows private to EAL, so that it's
hidden from external consumers. It is not exposed to internal consumers
either, because they don't need asprintf() and also because callers from
other modules would have no reliable way to free allocated memory.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com> Acked-by: Khoa To <khot@microsoft.com> Acked-by: Nick Connolly <nick.connolly@mayadata.io> Acked-by: Ranjit Menon <ranjit.menon@intel.com>
Xueming Li [Tue, 13 Apr 2021 03:14:08 +0000 (03:14 +0000)]
devargs: unify scratch buffer storage
In current design, legacy parser rte_devargs_parse() saved scratch
buffer to devargs.args while new parser rte_devargs_layers_parse() saved
to devargs.data. Code using devargs had to know the difference and
cleaned up memory accordingly - error prone.
This patch unifies scratch buffer to data field, introduces
rte_devargs_reset() function to wrap the memory clean up logic.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Ray Kinsella <mdr@ashroe.eu> Reviewed-by: Gaetan Rivet <grive@u256.net>
This is a new type of reader-writer lock that provides better fairness
guarantees which better suited for typical DPDK applications.
A pflock has two ticket pools, one for readers and one
for writers.
Phase-fair reader writer locks ensure that neither reader nor writer will
be starved.
Neither reader or writer are preferred, they execute in alternating
phases.
All operations of the same type (reader or writer) that acquire the lock
are handled in FIFO order.
Write operations are exclusive, and multiple read operations can be run
together (until a write arrives).
A similar implementation is in Concurrency Kit package in FreeBSD.
For more information see:
"Reader-Writer Synchronization for Shared-Memory Multiprocessor
Real-Time Systems",
http://www.cs.unc.edu/~anderson/papers/ecrts09b.pdf
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Feifei Wang [Wed, 10 Mar 2021 02:15:27 +0000 (10:15 +0800)]
test/trace: fix race on collected perf data
The measure_perf function should be executed after worker threads exit
to collect correct perf data. Otherwise, while workers are running, the
main thread may get incomplete data from workers.
In the meanwhile, remove unnecessary barrier in the test.
For signal variables "ldata.done" and "ldata.start", no operations
should keep the order that being executed after them. So the wmb after
them can be moved.
Fixes: 16a277a24c9f ("test/trace: add performance test cases") Cc: stable@dpdk.org Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Signed-off-by: Feifei Wang <feifei.wang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Bruce Richardson [Wed, 27 Jan 2021 17:42:55 +0000 (17:42 +0000)]
test: take test names from command line
While having the ability to run a test based off the DPDK_TEST
environment variable is useful, it's sometimes more convenient to
specify the test name as a commandline parameter to a test binary.
This patch adds support for checking all parameters after the EAL ones, and
running all valid autotests requested - either from DPDK_TEST or on the
commandline. This also allows multiple tests to be run in a single
automated session, which is useful for working with components which have
multiple test suites.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Aaron Conole <aconole@redhat.com>
Since queue identifier is passed as signed integer, a compilation error
is generated:
rte_event_eth_rx_adapter.c:1810:57: error: signed and unsigned type
in conditional expression [-Werror=sign-compare]
Make queue identifier as unsigned when adding it to vector data.
Bugzilla ID: 672 Fixes: d7c428e557ba ("eventdev: support Rx adapter event vector") Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: David Marchand <david.marchand@redhat.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
event/octeontx2: fix device reconfigure for single slot
When device is re-configured, memory allocated for work slot is freed
and new memory is allocated. Due to this we may loose some important
configurations/mappings done with initial work slot memory.
For example, whenever rte_event_eth_tx_adapter_queue_add is called
some important meta i.e. txq handle is stored in work slot structure.
If device gets reconfigured after this tx adaptor add, txq to work
slot mapping will be lost resulting in seg fault during packet
processing, as txq handle could not be retrieved from work slot.
Pavan Nikhilesh [Wed, 31 Mar 2021 09:30:00 +0000 (15:00 +0530)]
app/eventdev: add vector mode in pipeline test
Add event vector support in pipeline tests. By default this mode
is disabled, it can be enabled by using the option --enable_vector.
example:
dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
--wlcores=20-23 --enable_vector
Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector_size and
--vector_tmo_ns
This patch also adds a new option to set the number of Rx queues
configured per event eth rx adapter.
example:
dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
--wlcores=20-23 --nb_eth_queues 4
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:59 +0000 (14:59 +0530)]
eventdev: support Tx adapter event vector
Add event vector support for event eth Tx adapter, the implementation
receives events from the single linked queue and based on
rte_event_vector::attr_valid transmits the vector of mbufs to a given
port, queue pair.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:58 +0000 (14:59 +0530)]
eventdev: support Rx adapter event vector
Add event vector support for event eth Rx adapter, the implementation
creates vector flows based on port and queue identifier of the received
mbufs.
The flow id for SW Rx event vectorization will use 12-bits of queue
identifier and 8-bits port identifier when custom flow id is not set
for simplicity.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:57 +0000 (14:59 +0530)]
eventdev: introduce event vector Tx capability
Introduce event vector transmit capability for event eth
tx adapter.
The capability indicates that the Tx adapter is capable of
transmitting event vectors.
When rte_event_vector::union_valid is set, the Tx adapter should
transmit all the packets to the rte_event_vector::port using the
rte_event_vector::queue.
If rte_event_vector::union_valid is not set then the Tx adapter
should peek into each mbuf to get the destination port and queue
pair.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
If an event eth Rx adapter has the capability of
RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR then a given Rx queue
can be configured to enable event vectorization by passing the
flag RTE_EVENT_ETH_RX_ADAPTER_QUEUE_EVENT_VECTOR to
rte_event_eth_rx_adapter_queue_conf::rx_queue_flags while configuring
Rx adapter through rte_event_eth_rx_adapter_queue_add().
The max vector size, vector timeout define the vector size and
mempool used for allocating vector event are configured through
rte_event_eth_rx_adapter_queue_add. The element size of the element
in the vector pool should be equal to
sizeof(struct rte_event_vector) + (vector_sz * sizeof(uintptr_t))
Application can use `rte_event_vector_pool_create` to create the
vector mempool used for
rte_event_eth_rx_adapter_queue_conf::vector_mp.
The Rx adapter would be responsible for vectorizing the mbufs
based on the flow, the vector limits configured by the application
and add the vector event of mbufs to the event queue set via
rte_event_eth_rx_adapter_queue_conf::ev::queue_id.
It should also mark rte_event_vector::union_valid and fill
rte_event_vector::port, rte_event_vector::queue.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Ray Kinsella <mdr@ashroe.eu> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:55 +0000 (14:59 +0530)]
eventdev: introduce event vector capability
Introduce rte_event_vector datastructure which is capable of holding
multiple uintptr_t of the same flow thereby allowing applications
to vectorize their pipeline and reducing the complexity of pipelining
the events across multiple stages.
This approach also reduces the scheduling overhead on a event device.
Add a event vector mempool create handler to create mempools based on
the best mempool ops available on a given platform.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Ray Kinsella <mdr@ashroe.eu> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Pavan Nikhilesh [Tue, 23 Mar 2021 08:44:37 +0000 (14:14 +0530)]
event/octeontx2: reduce chunk pool memory usage
Reduce amount of memory used by chunk pool when the mempool used
is OCTEONTX2 NPA.
Previously, the number of chunks configured when NPA is used is
equal to the number of timers requested plus the number of buckets
and if the max timeout is long enough w.r.t. resolution requested
there will a large number of buckets which would cause high memory
usage.
Reduce the number of chunks when NPA is used to the number of timers
requested as buckets that are processed chunk lists are automatically
freed.
Shijith Thotton [Wed, 17 Mar 2021 08:04:20 +0000 (13:34 +0530)]
test/event: add unit tests for periodic timer
Add tests to arm and cancel periodic timer.
Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Shijith Thotton [Wed, 17 Mar 2021 08:04:19 +0000 (13:34 +0530)]
eventdev: introduce adapter flags for periodic mode
A timer adapter in periodic mode can be used to arm periodic timers.
This patch adds flags used to advertise capability and configure timer
adapter in periodic mode. Capability flag should be set for adapters
which support periodic mode.
Below is a programming sequence on the usage:
/* check for periodic mode support by reading capability. */
rte_event_timer_adapter_caps_get(...);
/* create adapter in periodic mode by setting periodic flag
(RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) and resolution. */
rte_event_timer_adapter_create_ext(...);
/* arm periodic timer of configured resolution */
rte_event_timer_arm_burst(...);
/* timer event will be periodically generated at configured
resolution till cancel is called. */
while (running) { rte_event_dequeue_burst(...); }
/* cancel periodic timer which stops generating events */
rte_event_timer_cancel_burst(...);
Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 19 Mar 2021 21:08:15 +0000 (02:38 +0530)]
event/octeontx2: fix XAQ pool reconfigure
When XAQ pool is being re-configured, and if the same memzone
is used for fc_mem when freeing the old mempool the fc_mem
will be incorrectly updated with the free count.
Today it is difficult to know if the SW Eventdev PMD is making
forward progress when it runs an iteration of its service. This
commit adds two xstats to give better visibility to the application.
The new xstats provide an application with which Eventdev ports
received work in the last iteration of scheduling, as well if
forward progress was made by the scheduler.
This patch implements an xstat for the SW PMD that exposes a
bitmask of ports that were scheduled to. In the unlikely case
that the SW PMD instance has 64 or more ports, return UINT64_MAX.
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Tal Shnaiderman [Mon, 12 Apr 2021 10:37:44 +0000 (13:37 +0300)]
eal/windows: fix return codes of pthread shim layer
The macro definitions of the following pthread functions
return incorrect values from the inner function return code.
While pthread_barrier_init(), pthread_barrier_destroy() and
pthread_cancel() return 0 in a case of success and non-zero (errno) value
otherwise the shimming functions InitializeSynchronizationBarrier,
DeleteSynchronizationBarrier and TerminateThread return FALSE (0)
in a case of failure and TRUE(1) in a case of success.
This issue was undetected as none of the functions return codes were
checked until such check was added in
commit 34cc55cce6b1 ("eal: fix race in control thread creation")
exposing the issue by failing pthread_barrier_init()
and rte_eal_init() on Windows as a result.
The fix aligned the return value of the 3 function with the expected
pthread API return values.
Fixes: e8428a9d89f1 ("eal/windows: add some basic functions and macros") Cc: stable@dpdk.org Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Tal Shnaiderman [Sun, 11 Apr 2021 12:21:36 +0000 (15:21 +0300)]
common/mlx5: add missing internal tags
Several functions introduced in the addition of the Windows support
to mlx5 were missing the __rte_internal tag.
This miss is better revealed when symbols became exported on Linux too,
and it is caught by the symbol checker with --buildtype=debug.
Fixes: 1552fb287166 ("common/mlx5: add alloc/dealloc PD on Windows") Fixes: 1969ee424405 ("common/mlx5: add UMEM reg/dereg functions on Windows") Fixes: ba420719823c ("common/mlx5: add reg/dereg MR on Windows") Fixes: 56ea803e878e ("build: remove Windows export symbol list") Cc: stable@dpdk.org Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Wisam Jaddo [Sun, 14 Mar 2021 09:54:27 +0000 (11:54 +0200)]
app/flow-perf: fix encap/decap actions
When using decap actions it's been set to the data to decap
into the encap_data instead of decap_data, as a results we end
up with bad encap and decap data in many cases.
Fixes: 0c8f1f4ab90e ("app/flow-perf: support raw encap/decap actions") Cc: stable@dpdk.org Signed-off-by: Wisam Jaddo <wisamm@nvidia.com> Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
Wisam Jaddo [Sun, 14 Mar 2021 09:54:23 +0000 (11:54 +0200)]
app/flow-perf: rename records of used CPU time
create_flow and create_meter are not correct names since those
are records that contain creation and deletion, which makes
them more of a record for such data.
Wisam Jaddo [Sun, 14 Mar 2021 09:54:22 +0000 (11:54 +0200)]
app/flow-perf: add runtime option to use unique data
Current support for unique data is to compile with config.h
var FIXED_VALUES as 0, and this is only supported on
compilation time, as a result the user may use only single
mode for each compilation.
Starting with this commit the user will have the ability to
use this feature on the fly by using this new option:
--unique-data
Example of unique data usage:
Insert many rules with different encap data for a flows that
have encap action in it.
Signed-off-by: Wisam Jaddo <wisamm@nvidia.com> Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
RSS distribution field is U64, while the DPAA2 code
was using integer value, which is causing a issue
for MPLS having bit position 33.
This patch fixes the code to use unsigned long long.
Hongbo Zheng [Wed, 31 Mar 2021 10:01:44 +0000 (18:01 +0800)]
net/hns3: fix code style
Add one space before the left brace to solve the static warning.
Fixes: 63e05f19b82b ("net/hns3: support Rx descriptor status query") Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Chengwen Feng [Wed, 31 Mar 2021 10:01:41 +0000 (18:01 +0800)]
net/hns3: fix VF mailbox head field
Currently, the VF mailbox synchronization communication is based on
three fields: head/tail/lost, when head equals tail plus lost, it
means the response is received successfully.
The head field indicates the number of requests that are successfully
sent. If the request sending fails, it should not be updated.
This patch fix the above bug by roll back updates when the sending
fails.
Fixes: 463e748964f5 ("net/hns3: support mailbox") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Chengwen Feng [Wed, 31 Mar 2021 10:01:40 +0000 (18:01 +0800)]
net/hns3: fix flow counter value
User could create flow rules with specified counter by the action of
RTE_FLOW_ACTION_TYPE_COUNT, but the counter may retain the original
value when create.
This patch fix the bug by read the counter when creating the rule
because the counter is read-clear.
Fixes: fcba820d9b9e ("net/hns3: support flow director") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Wed, 31 Mar 2021 10:01:39 +0000 (18:01 +0800)]
net/hns3: fix flow control exception
In multi-TC scenarios, MAC pause is not supported. Otherwise, only
TC0 can trigger pause frames, and other TCs cannot trigger pause
frames. In this case, flow control does not meet the expectation.
Fixes: 62e3ccc2b94c ("net/hns3: support flow control") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Chengchang Tang [Wed, 31 Mar 2021 10:01:38 +0000 (18:01 +0800)]
net/hns3: fix rollback after setting PVID failure
Currently, three hardware operations are involved in setting the PVID.
If any operation fails, a failure will be returned. And there may be
residual hardware configurations because no rollback is performed.
This patch adds rollback operation for setting PVID to avoid residual
hardware configuration after the PVID fails to be configured.
Fixes: 411d23b9eafb ("net/hns3: support VLAN") Cc: stable@dpdk.org Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Hongbo Zheng [Wed, 31 Mar 2021 10:01:37 +0000 (18:01 +0800)]
net/hns3: fix FLR miss detection
When FLR occurs, the head pointer register of
the command queue will be cleared, resulting in
abnormal detection of the head pointer register
of the command queue. At present, FLR is detected
in this way, and the reset recovery process is
executed.
However, when FLR occurs, the header pointer
register of the command queue is not necessarily
abnormal. For example, when the driver runs
normally, the value of the header pointer register
of the command queue may also be 0, which will
lead to the miss detection of FLR.
Therefore, the judgment that whether the base
address register of command queue is 0 is added
to ensure that FLR not miss detection.
Fixes: 2790c6464725 ("net/hns3: support device reset") Cc: stable@dpdk.org Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Chengwen Feng [Wed, 31 Mar 2021 10:01:36 +0000 (18:01 +0800)]
net/hns3: fix setting default MAC address in bonding of VF
When start testpmd with two hns3 VFs(0000:bd:01.0, 0000:bd:01.7), and
then execute the following commands:
testpmd> create bonded device 1 0
testpmd> set bonding mac_addr 2 3c:12:34:56:78:9a
testpmd> add bonding slave 0 2
testpmd> add bonding slave 1 2
testpmd> set portmask 0x4
testpmd> port start 2
It will occurs the following error in a low probability:
0000:bd:01.0 hns3_get_mbx_resp(): VF could not get mbx(3,0)
head(16) tail(15) lost(1) from PF in_irq:0
0000:bd:01.0 hns3vf_set_default_mac_addr(): Failed to set mac
addr(3C:**:**:**:78:9A) for vf: -62
mac_address_slaves_update(1541) - Failed to update port Id 0
MAC address
The problem replay:
1. The 'port start 2' command will start slave ports and then set slave
mac address, the function call flow: bond_ethdev_start ->
mac_address_slaves_update.
2. There are also a monitor task which running in intr thread will check
slave ports link status and update slave ports mac address, the
function call flow: bond_ethdev_slave_link_status_change_monitor ->
bond_ethdev_lsc_event_callback -> mac_address_slaves_update.
3. Because the above step1&2 running on different threads, they may both
call drivers ops mac_addr_set which is hns3vf_set_default_mac_addr.
4. hns3vf_set_default_mac_addr will first acquire hw.lock and then send
mailbox to PF and wait PF's response message. Note: the PF's
response is an independent message which will received in hw.cmq.crq,
the receiving operation can only performed in intr thread.
5. So if the step1 operation hold the hw.lock and try get response
message, and step2 operation try acquire the hw.lock and so it can't
process the response message, this will lead to step1 fail.
The solution:
1. make all threads could process the mailbox response message, which
protected by the hw.cmq.crq.lock.
2. use the following rules to avoid deadlock:
2.1. ensure use the correct locking sequence: hw.lock >
hw.mbx_resp.lock > hw.cmq.crq.lock.
2.2. make sure don't acquire such as hw.lock & hw.mbx_resp.lock again
when process mailbox response message.
Fixes: 463e748964f5 ("net/hns3: support mailbox") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Wed, 31 Mar 2021 10:01:35 +0000 (18:01 +0800)]
net/hns3: fix some function names for copper media type
PHY is a common concept for the copper and optical media type interface.
There are some inappropriate function names for copper ports, which
needs to be adjusted.
Fixes: 2e4859f3b362 ("net/hns3: support PF device with copper PHYs") Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Wed, 7 Apr 2021 09:19:13 +0000 (17:19 +0800)]
net/hns3: fix copyright date
This patch updates copyright date for hns3 PMD files.
Fixes: 565829db8b8f ("net/hns3: add build and doc infrastructure") Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx") Fixes: e31f123db06b ("net/hns3: support NEON Tx") Fixes: c09c7847d892 ("net/hns3: support traffic management") Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Action port_id was not supported until now.
In this patch the action port_id supports passing from input
port PF to output port which is one of input port respective VF
Signed-off-by: Smadar Fuks <smadarf@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Huisong Li [Tue, 30 Mar 2021 12:53:25 +0000 (20:53 +0800)]
net/hns3: support wait in link update
There are two APIs in ethdev layer to get link status of device, namely,
"rte_eth_link_get" and "rte_eth_link_get_nowait". When the device link
is unstable or auto-negotiation is in progress, the first API supports
the function of waiting for the NIC to link up, and the maximum waiting
time is 9 seconds based on DPDK Documentation. For the hns3 PMD driver,
the link can be established within 2 seconds.
Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
doc: add fields enum for modify action in flow guide
Fix the documentation about the MODIFY_FIELD flow action.
1. Include the rte_flow_field_id enumeration reference to point
to the full list of all supported Field IDs available.
2. Correct the formatting of the MODIFY_FIELD action and the
destination/source field definition tables.
The PMD_DRV_LOG macro in netvsc (like other drivers) adds a newline to
the log message as part of the macro expansion; therefore the
message should not have its own newline.
In a couple places, log messages were split across source lines
which can make looking them up in the source tree harder.
Fixes: a2a23a794b3a ("net/netvsc: support VF device hot add/remove") Cc: stable@dpdk.org Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Long Li <longli@microsoft.com>
Salem Sol [Wed, 7 Apr 2021 11:50:51 +0000 (14:50 +0300)]
app/testpmd: support NVGRE encap as sample action
Add support for rte_flow_action_nvge_encap as a sample action.
The example of test-pmd command:
1. set nvgre ip-version ... tni ... ip-src ... ip-dst ...
set raw_encap 1 eth src... / ipv4... /...
set sample_actions 2 nvgre / port_id id 0 / end
flow create 0 ... pattern eth / end actions
sample ratio 1 index 2 / raw_encap index 1 / port_id id 0...
The flow will result in all the matched egress packets will be
encapsulated and sent to wire, and also mirrored the packets
using NVGRE encapsulation data and sent to wire.
Signed-off-by: Salem Sol <salems@nvidia.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Salem Sol [Wed, 7 Apr 2021 11:50:14 +0000 (14:50 +0300)]
app/testpmd: support VXLAN encap as sample action
Add support for rte_flow_action_vxlan_encap as a sample action.
The example of test-pmd command:
1. set vxlan ip-version ... vni ... udp-src ...
set raw_encap 1 eth src.../ ipv4.../...
set sample_actions 2 vxlan_encap / port_id id 0 / end
flow create 0 ... pattern eth / end actions
sample ratio 1 index 2 / raw_encap index 1 / port_id id 0...
The flow will result in all the matched egress packets will be
encapsulated and sent to wire, and also mirrored the packets
using VXLAN encapsulation data and sent to wire.
Signed-off-by: Salem Sol <salems@nvidia.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Jiawei Wang [Wed, 7 Apr 2021 11:48:15 +0000 (14:48 +0300)]
app/testpmd: store VXLAN/NVGRE encap data globally
With the current code the VXLAN/NVGRE parsing routine
stored the configuration of the header on stack, this
might lead to overwriting the data on the stack.
Currently having VXLAN/NVGRE encap as sample actions
is done using RAW_ENCAP, for example:
1. set raw_encap 1 eth src.../ vxlan vni.../ ipv4.../ ...
set sample_actions 0 raw_encap / port_id id 0 / end
flow create 0 ... pattern eth / end actions
sample ration 1 index 0 / jump group 1 / end
The goal is to utilize the rte_flow_action_vxlan_encap
and rte_flow_action_nvgre_encap for sample actions.
This patch prepares storing the external data of vxlan and
nvgre encap into global data as a pre-step to supporting
vxlan and nvgre encap as a sample actions.
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Under this conditions callback unregistering always fails. This means
that listenfd is never unregistered and continue to trigger interrupts.
For example, if second client will try to connect to the same socket,
the server will receive interrupts infinitely because it will not
accept them while listen fd is readable and generates epoll events.
Fix that by moving reconfiguration of interrupts out of the
interrupt context to alarm handler.
'virtio_user_dev_delayed_handler' renamed to
'virtio_user_dev_delayed_disconnect_handler' to better reflect its
purpose.
Additionally improved error logging around interrupt management.
Fixes: bd8f50a45d0f ("net/virtio-user: support server mode") Cc: stable@dpdk.org Signed-off-by: Ilya Maximets <i.maximets@ovn.org> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Junjie Wan [Tue, 2 Feb 2021 08:38:45 +0000 (16:38 +0800)]
vhost: avoid IOTLB mempool allocation while IOMMU disabled
If vhost device's IOMMU feature is disabled, IOTLB mempool allocation
is unnecessary.
Reported-by: Peng He <hepeng.0320@bytedance.com> Signed-off-by: Junjie Wan <wanjunjie@bytedance.com> Reviewed-by: Zhihong Wang <wangzhihong.wzh@bytedance.com> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Kalesh AP [Thu, 1 Apr 2021 02:53:34 +0000 (08:23 +0530)]
net/bnxt: fix double free in port start failure
During port start when bnxt_start_nic() fails, it tries to free
"intr_handle->intr_vec" but the variable is not set to NULL after that.
If port start fails, driver invokes bnxt_dev_stop() which will lead
to a double free of "intr_handle->intr_vec".
Fix it by removing the call to free "intr_handle->intr_vec" in the
bnxt_start_nic() failure path as it is anyway doing in bnxt_dev_stop().
There are multiple branches in rdma-core library backing
the rte flows:
- Verbs
- Direct Verbs (DV)
- Direct Rules (DR)
The Verbs API always requires the specifying the queue even
if there is the drop action in the flow, though the kernel
optimizes out the actual queue usage for the flows containing
the drop action. The PMD handles the dedicated Rx queue to
provide Verbs API compatibility.
The DV/DR API does not require explicit specifying the queue
at the flow creation, but PMD still specified the dedicated
drop queue as action. It performed the packet forwarding to
the dummy queue (that was not polled at all) causing the
steering pipeline resources usage and degrading the overall
packet processing rate. For example, with inserted flow to
drop all the ingress packets the statistics reported only
15Mpps of 64B packets were received over 100Gbps line.
Since the Direct Rule API for E-Switch was introduced the
rdma-core supports the dedicated drop action, that is recognized
both for DV and DR and can be used for the entire device in
unified fashion, regardless of steering domain. The similar drop
action was introduced for E-Switch, the usage of this one can be
extended for other steering domains, not for E-Switch's one only.
This patch:
- renames esw_drop_action to dr_drop_action to emphasize
the global nature of the variable (not only E-Switch domain)
- specifies this global drop action instead of dedicated
drop queue for the DR/DV flows
Fixes: 34fa7c0268e7 ("net/mlx5: add drop action to Direct Verbs E-Switch") Fixes: 65b3cd0dc39b ("net/mlx5: create global drop action") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Xiaoyu Min [Fri, 26 Mar 2021 05:20:21 +0000 (13:20 +0800)]
net/mlx5: fix missing shared RSS hash types
Shared RSS action create all supported RSS hash combination
in advance and lookup the right hash TIR when flow is actually
applied by comparing hash field value.
Unfortunately some hash combination is missed, for example,
UDP/TCP dest port only, L3-src-only, etc.
This patch add the missing hash combination.
In order to reduce the usage of pre-created TIRs and because
for one L3+L4 combination only one IBV hash type is possible,
for example, either IBV_RX_HASH_SRC_PORT_UDP or IBV_RX_HASH_DST_PORT_UDP
or both of them could be set so they can share same slot in
mlx5_rss_hash_fields, means only one TIR will be created.
Fixes: d2046c09aa64 ("net/mlx5: support shared action for RSS") Cc: stable@dpdk.org Signed-off-by: Xiaoyu Min <jackmin@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Xiaoyu Min [Fri, 26 Mar 2021 05:20:20 +0000 (13:20 +0800)]
net/mlx5: fix shared inner RSS
The shared RSS action use the _tunnel_ information which is derived
from flow items to decide whether need to do inner RSS or not.
However, inner RSS should be decided by RSS level (>1) in configuration
and then to create TIR with 'IBV_RX_HASH_INNER' hash bit set.
Also, for one shared RSS action there is only one set of TIRs -
outer or inner could be so the unnecessary set of TIRs are removed
in order to reduce resource.
Fixes: d2046c09aa64 ("net/mlx5: support shared action for RSS") Cc: stable@dpdk.org Signed-off-by: Xiaoyu Min <jackmin@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Zhirun Yan [Thu, 1 Apr 2021 01:33:23 +0000 (09:33 +0800)]
net/ice: support VXLAN VNI field in flow director
Add support for VNI field in FDIR. Treat VXLAN flow type as
ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN to align with shared code. It
allows to match outer L2/L3, VNI and inner L2/L3 fields with VXLAN
pattern.
VNI takes 24 bits in VXLAN header, but uses 32 bits for matching in
shared code. The 8 bits reserved field adjacent should always be 0.
Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Wei Huang [Wed, 17 Mar 2021 08:21:35 +0000 (04:21 -0400)]
raw/ifpga/base: check file length
In fpga_update_flash(), "smgr->rsu_length" is passed to a
parameter that cannot be negative. So return value of
function "lseek" should be checked before being assigned
to "smgr->rsu_length".
Wei Huang [Wed, 17 Mar 2021 08:21:34 +0000 (04:21 -0400)]
raw/ifpga/base: check lseek failure
In write_flash_image(), calling function "lseek" without checking
return value has risk. Negative return value should be handled as
an error condition.
When the size of a packet in Rx channel is less than the minimum
or greater than the maximum, the packet will be simultaneously
counted by RLEC(Receive Length Error Count) and
RUC(Receive Under Size Count)/ROC(Receive Oversize Count) registers.
This patch fixes the issue of counting a length error packet twice
when counting the total number of received error packets.
Fixes: 70bdb18657da ("ethdev: add Rx error counters for missed, badcrc and badlen packets") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> Acked-by: Haiyue Wang <haiyue.wang@intel.com>
When the size of a packet in Rx channel is less than the minimum
or greater than the maximum, the packet will be simultaneously
counted by RLEC(Receive Length Error Count) and
RUC(Receive Under Size Count)/ROC(Receive Oversize Count) registers.
This patch fixes the issue of counting a length error packet twice
when counting the total number of received error packets.
David Harton [Tue, 6 Apr 2021 00:27:19 +0000 (20:27 -0400)]
net/ena: fix releasing Tx ring mbufs
When ena_tx_queue_release_bufs() frees the mbufs it does not clear
the mbuf pointers. So, when the device starts and stops multiple
times it can cause the application to receive duplicate mbufs for
two different packets. Fix the issue by clearing the mbuf pointer.
Also, while tracking down the "double free" issue the ena calls to
allocate and free mbufs in bulk were migrated to the mbuf based APIs
so the common mbuf alloc/free routines are exercised.
Fixes: 79405ee17585 ("net/ena: fix out of order completion") Fixes: 1173fca25af9 ("ena: add polling-mode driver") Cc: stable@dpdk.org Signed-off-by: David Harton <dharton@cisco.com> Acked-by: Michal Krawczyk <mk@semihalf.com>
- Add Intel ice PMD support on Windows.
- Remove #include sys/ioctl header file as it is not needed.
- Replace x86intrin.h with rte_vect.h to avoid __m_prefetchw conflicting
types.
- Replace POSIX usleep() API with rte API.
- Add a new macro for the access() API as the original function
has been deprecated on Windows.
- Add extra cflags '-fno-asynchronous-unwind-tables'
to avoid MinGW build error:
Error: invalid register for .seh_savexmm
- Add documentation to support ice PMD on Windows.
Update the release notes and features list for the same.
Min Hu (Connor) [Tue, 6 Apr 2021 00:57:36 +0000 (08:57 +0800)]
net/hns3: update HiSilicon copyright syntax
According to the suggestion of our legal department,
to standardize the copyright license of our code to
avoid potential copyright risks, we make a unified
modification to the "Hisilicon", which was nonstandard,
in the main modules we maintain.
We change it to "HiSilicon", which is consistent with
the terms used on the following official website:
https://www.hisilicon.com/en/terms-of-use.
Fixes: 565829db8b8f ("net/hns3: add build and doc infrastructure") Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx") Fixes: e31f123db06b ("net/hns3: support NEON Tx") Fixes: c09c7847d892 ("net/hns3: support traffic management") Cc: stable@dpdk.org Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:54 +0000 (17:52 +0800)]
net/igc: refine debug build option
1. replace RTE_LIBRTE_IGC_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_IGC_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_ETHDEV_DEBUG into RTE_ETHDEV_DEBUG_TX
Qi Zhang [Wed, 31 Mar 2021 09:52:53 +0000 (17:52 +0800)]
net/ixgbe: refine debug build option
1. replace RTE_LIBRTE_IXGBE_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_IXGBE_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_IXGBE_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_ETHDEV_DEBUG_TX
Qi Zhang [Wed, 31 Mar 2021 09:52:52 +0000 (17:52 +0800)]
net/ice: refine debug build option
1. replace RTE_LIBRTE_ICE_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_ICE_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_ICE_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_LIBRTE_DEBUG_TX