Fan Zhang [Thu, 4 Nov 2021 10:34:57 +0000 (10:34 +0000)]
crypto/qat: add gen-specific implementation
This patch replaces the mixed QAT symmetric and asymmetric
support implementation by separate files with shared or
individual implementation for specific QAT generation.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:56 +0000 (10:34 +0000)]
crypto/qat: define gen-specific structs and functions
This patch adds the symmetric and asymmetric crypto data
structure and function prototypes for different QAT
generations.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:55 +0000 (10:34 +0000)]
crypto/qat: unify device private data structure
This patch unifies the QAT symmetric and asymmetric device
private data structures and functions.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:54 +0000 (10:34 +0000)]
compress/qat: add gen-specific implementation
This patch replaces the mixed QAT compression support
implementation by separate files with shared or individual
implementation for specific QAT generation.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:53 +0000 (10:34 +0000)]
compress/qat: define gen-specific structs and functions
This patch adds the compression data structure and function
prototypes for different QAT generations.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:52 +0000 (10:34 +0000)]
common/qat: add gen-specific queue implementation
This patch replaces the mixed QAT queue pair configuration
implementation by separate files with shared or individual
implementation for specific QAT generation.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Signed-off-by: Przemyslaw Zegan <przemyslawx.zegan@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
This patch replaces the mixed QAT device configuration
implementation by separate files with shared or
individual implementation for specific QAT generation.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:49 +0000 (10:34 +0000)]
common/qat: define gen-specific structs and functions
This patch adds the data structure and function prototypes for
different QAT generations.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
Fix supported IV length for ZUC 256
Add support in capability for 4 byte mac len for ZUC 256
Pack the last 8 bytes of IV to 6 bytes by ignoring the 2 msb bits of
each byte.
Fixes: 29742632ac9e ("crypto/cnxk: support ZUC with 256-bit key") Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Raja Zidane [Tue, 2 Nov 2021 09:32:56 +0000 (09:32 +0000)]
crypto/mlx5: support 1MB data-unit
Add 1MB data-unit length to the capability's bitmap.
Handle 1MB data-unit length in the mlx5 session create operation,
and expose its capability in the mlx5 capabilities.
Signed-off-by: Raja Zidane <rzidane@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Rebecca Troy [Fri, 29 Oct 2021 09:04:17 +0000 (09:04 +0000)]
test/crypto: refactor DOCSIS to show hidden cases
In the current implementation, the DOCSIS test cases are running
and being reported as one test, despite the fact that multiple
test cases are hidden inside i.e. "test_DOCSIS_PROTO_all" runs
52 test cases. Each DOCSIS test case should be reported individually
instead.
This commit achieves this by removing the use of the
test_DOCSIS_PROTO_all function and statically listing the test cases
to run when building the test suite, which are then reported to the
user by description.
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com> Acked-by: Ciara Power <ciara.power@intel.com> Reviewed-by: David Coyle <david.coyle@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Srujana Challa [Wed, 3 Nov 2021 03:24:07 +0000 (08:54 +0530)]
examples/ipsec-secgw: support event vector
Adds event vector support to inline protocol offload mode.
By default vector support is disabled, it can be enabled by
using the option --event-vector.
Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector-size and
--vector-tmo.
Radu Nicolau [Mon, 1 Nov 2021 12:58:14 +0000 (12:58 +0000)]
examples/ipsec-secgw: add ethdev reset callback
Applications should not quietly ignore an ethdev reset event.
Register an event handler for ethdev reset callback
RTE_ETH_EVENT_INTR_RESET that prints a message and
quits the application.
Rework create inline session function as to update the session
configuration parameters before create session is called.
Also updated the rss key array size to prevent buffers overflows
with PMDs that copy more than 40 bytes.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Wed, 3 Nov 2021 11:56:18 +0000 (11:56 +0000)]
examples/ipsec-secgw: move global array from header
When STATS_INTERVAL is set to a non-zero value the
core_statistics array will be defined in multiple
compilation units and this can trigger a linker error
on particular environments. In order to fix this the
core_statistics definition was moved out of the header file.
Jim Harris [Fri, 29 Oct 2021 17:16:22 +0000 (17:16 +0000)]
test/compress-perf: remove unused variable
clang-13 rightfully complains that the total_deq_ops
variable in cperf_cyclecount_op_setup is set but not
used, since the final accumulated total_deq_ops
results isn't used anywhere. So just remove the
total_deq_ops variable.
Fixes: 2695db95a147 ("test/compress: add cycle-count mode to perf tool") Cc: stable@dpdk.org Signed-off-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
Kiran Kumar K [Fri, 29 Oct 2021 04:36:58 +0000 (10:06 +0530)]
test/crypto-perf: fix memory allocation in asym case
While populating the crypto ops in case of asymmetric, result
is being allocated from stack. This is causing crash in the
application. And operation type is also not being initialized
properly. Adding a fix by allocating the result from global
memory and initialized the operation memory properly.
Fixes: ba588ce3f9339 ("test/crypto-perf: test asymmetric crypto throughput") Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Thu, 28 Oct 2021 12:22:46 +0000 (13:22 +0100)]
examples/ipsec-secgw: support TCP TSO
Add support to allow user to specific MSS for TCP TSO offload on a per SA
basis. MSS configuration in the context of IPsec is only supported for
outbound SA's in the context of an inline IPsec Crypto offload.
Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Thu, 28 Oct 2021 12:22:45 +0000 (13:22 +0100)]
ipsec: support TSO
Add support for transmit segmentation offload to inline crypto processing
mode. This offload is not supported by other offload modes, as at a
minimum it requires inline crypto for IPsec to be supported on the
network interface.
Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Signed-off-by: Abhijit Sinha <abhijit.sinha@intel.com> Signed-off-by: Daniel Martin Buckley <daniel.m.buckley@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Raja Zidane [Tue, 26 Oct 2021 01:52:42 +0000 (01:52 +0000)]
compress/mlx5: add block size option
Currently, the compression block size is 15 by default, which
is the maximum.
Add "log-block-size" devarg to select compression block size manually.
The value provided should be between 4 to 15.
Any out-of-range value will be defaulted to 15.
Signed-off-by: Raja Zidane <rzidane@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
The mlx5 compress PMD uses HW acceleration for the compress operations.
The mlx5 HW device has no level style mode, which does a tradeoff between
throughput and compression ratio, unlike SW drivers where the CPU is doing
the compress, and more CPU effort can cause a better compression ratio.
The mlx5 driver wrongly defined the Huffman block size configuration
according to the level that doesn't fill the level API requirement for
the tradeoff.
Remove the effect of the level configuration in compress operation.
Kiran Kumar K [Mon, 25 Oct 2021 04:00:04 +0000 (09:30 +0530)]
crypto/cnxk: fix bus error on RSA verify
While creating RSA session, private key length is not being
calculated properly. This is causing bus error on RSA verify.
This patch fix the issue with length calculation.
Fixes: 5a3513caeb455 ("crypto/cnxk: add asymmetric session") Cc: stable@dpdk.org Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Anoob Joseph <anoobj@marvell.com>
Kai Ji [Fri, 8 Oct 2021 11:33:45 +0000 (12:33 +0100)]
test/crypto: fix max length for raw data path
Update the calculation of the max length needed when converting mbuf to
data vec in partial digest test case. This update make sure the enough
vec buffers are allocated for the appended digest in sgl op for raw
datapath api.
Fixes: 4868f6591c6f ("test/crypto: add cases for raw datapath API") Cc: stable@dpdk.org Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:16 +0000 (11:46 +0300)]
drivers/crypto: move Windows build check
Remove the check and build failure from crypto/meson.build
in case building for Windows OS.
Add this check/failure in the meson.build file of each crypto PMD
that is not enforcing it to allow PMD support for Windows
per driver when applicable.
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:15 +0000 (11:46 +0300)]
crypto/mlx5: fix size of UMR WQE
The size of the UMR WQE allocated object is decided by a sizof
operation on the struct, however since the struct contains
a union of flexible array members this sizeof results can differ
between compilers.
GCC for example treats the union as 0 sized, MSVC adds a padding
of 16Bits.
To resolve the ambiguity the allocation size will be calculated
by the sizes of the members excluding the flexible union.
Fixes: a1978aa23bf4 ("crypto/mlx5: add maximum segments configuration") Cc: stable@dpdk.org Signed-off-by: Tal Shnaiderman <talshn@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Rebecca Troy [Tue, 26 Oct 2021 12:00:45 +0000 (12:00 +0000)]
cryptodev: support telemetry
The cryptodev library now registers commands with telemetry, and
implements the corresponding callback functions. These commands
allow a list of cryptodevs to be queried, as well as info and stats
for the corresponding cryptodev.
net/sfc: merge Rx and Tx doorbell counters into one
Datapath queue is either Rx or Tx, so just one counter is sufficient
for doorbells. It can count Tx doorbells in the case of Tx queue and
Rx doorbells in the case of Rx queue.
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Gregory Etelson [Thu, 4 Nov 2021 16:00:14 +0000 (18:00 +0200)]
doc: add flow flex item to default NIC features
Flex item or flex parser is port infrastructure that allows
application to add support for a custom network header and
offload flows to match the header elements.
Huisong Li [Tue, 2 Nov 2021 01:38:29 +0000 (09:38 +0800)]
net/hns3: refactor multi-process initialization
Currently, the logic of the PF and VF initialization codes for multiple
process is the same. A common function can be extracted to initialize
and unload multiple process.
Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Tue, 2 Nov 2021 01:38:27 +0000 (09:38 +0800)]
net/hns3: fix multi-process action register and unregister
The multi-process has the following problems:
1) After a port in primary process is closed, the mp action of the
process is unregistered. Which will cause that other device in the
primary process cannot respond to requests from secondary processes.
2) Because variable "hns3_inited" is set to true without returning an
initial value, the mp action cannot be registered again after it is
unregistered.
3) The mp action of primary and secondary process need to be registered
only once regardless of port numbers in the process. That's what
variable "hns3_inited" does. But the variable is difficult to
understand.
This patch adds a hns3_process_local_data structure to resolve above
problems.
Fixes: 9570b1fdbdad ("net/hns3: check multi-process action register result") Fixes: 23d4b61fee5d ("net/hns3: support multiple process") Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Tue, 2 Nov 2021 01:38:26 +0000 (09:38 +0800)]
net/hns3: fix secondary process reference count
The "secondary_cnt" will be increased when a secondary process
initialized. But the value of this variable is not decreased when the
secondary process exits, which causes the primary process senses that
the secondary process still exists. As a result, the primary process
fails to send messages to the secondary process after the secondary
process exits.
Fixes: 23d4b61fee5d ("net/hns3: support multiple process") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Dapeng Yu [Thu, 4 Nov 2021 08:45:35 +0000 (16:45 +0800)]
net/ice: fix flow redirect
It's possible that a switch rule can't be redirect successfully due
to kernel driver is busy to handle an ongoing VF reset, so the
redirect action need to be deferred into next redirect request which
is promised by kernel driver after VF reset done.
This patch uses the saved flow rule's data to replay switch rule
remove/add during next flow redirect.
Dapeng Yu [Thu, 4 Nov 2021 08:45:34 +0000 (16:45 +0800)]
net/ice: save rule on switch filter creation
The VSI number, lookup elements and rule information for creating switch
filter are abandoned when switch filter is created in original
implementation.
This patch saved the abandoned data in RTE flow, it is for future
use on replay when handling exception at flow redirect.
Yuying Zhang [Tue, 2 Nov 2021 10:45:05 +0000 (10:45 +0000)]
net/ice: fix order of flow filter parser list
The order of flow filter parser list was not definite and
linked to the register order of parsers. It caused ACL filter
covered by switch filter in some cases.
This patch fixed order of parser list to guarantee the usage
of each filter. Below lists the order.
ACL filter > Switch filter > FDIR > Hash filter.
Fixes: e4a0a7599d97 ("net/ice: fix flow priority support in non-pipeline mode") Cc: stable@dpdk.org Signed-off-by: Yuying Zhang <yuying.zhang@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Gregory Etelson [Thu, 4 Nov 2021 11:27:21 +0000 (13:27 +0200)]
ethdev: fix variable length flow elements support
RTE flow API defines two flow elements types - common and PMD private.
Common RTE flow types are defined in rte_flow.h while PMD private
types exists inside specific PMD only. Application can create a flow
rule with PMD private items or actions. RTE flow API restricts
private PMD types to negative values.
Current implementation tried to use negative PMD private item type
value as index in the rte_flow_desc_item[] array.
The patch allows access to rte_flow_desc_item[] and
rte_flow_desc_action[] arrays to non-private PMD types only.
Fixes: 6cf72047332b ("ethdev: support flow elements with variable length") Signed-off-by: Gregory Etelson <getelson@nvidia.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
John Daley [Thu, 28 Oct 2021 20:04:24 +0000 (13:04 -0700)]
net/enic: support GTP header flow matching
The GTP, GTP-U, GTP-C header fields can be matched, however NIC does not
support GTP tunneling so no items after the GTP header can be specified.
If a GTP-U or GTP-C item is specified without a preceding UDP item, the
UDP destination port is implicitly matched. For GTP, the destination UDP
port must be specified but its value is not enforced.
Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
Ting Xu [Thu, 4 Nov 2021 02:22:28 +0000 (10:22 +0800)]
net/ice: enable protocol agnostic flow offloading in RSS
Enable protocol agnostic flow offloading to support raw pattern input
for RSS hash flow rule creation. It is based on Parser Library feature.
Current rte_flow raw API is utilized.
Hyong Youb Kim [Tue, 26 Oct 2021 00:04:18 +0000 (17:04 -0700)]
net/enic: avoid error message when no advanced filtering
Probing the availability of Flow Manager API may print the following
error log.
PMD: rte_enic_pmd: Devcmd 88 failed with error code -1
The error indicates a flow manager operation failed and happens when
advanced filtering is disabled on vNIC. It is harmless but confusing
to the user. Since advanced filtering is a prerequisite, check first
if it is available and avoid the error message altogether.
Fixes: ea7768b5bba8 ("net/enic: add flow implementation based on Flow Manager API") Cc: stable@dpdk.org Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com> Reviewed-by: John Daley <johndale@cisco.com>
Hyong Youb Kim [Tue, 26 Oct 2021 00:02:56 +0000 (17:02 -0700)]
net/enic: fix crash caused by changing MTU
Changing MTU after the device start causes a segfault in the Rx
handler. The MTU handler (enic_set_mtu) performs the following steps.
1. Stop NIC Rx
2. Change Rx handler '(struct rte_eth_dev)->rx_pkt_burst' to
the dummy handler and sleep a while to quiesce
3. Re-allocate/initialize Rx structures
4. Change Rx handler back to the real handler
(e.g. enic_noscatter_recv_pkts)
enic_set_mtu does not update the recently introduced fast-path pointer
'(struct rte_eth_fp_ops)->rx_pkt_burst'. Since rte_eth_rx_burst only
uses the fast-path pointer, it keeps invoking the real Rx handler, not
the dummy one set by (2). And, (3) causes a segfault in the real Rx
handler (e.g. dereferencing freed structures).
Fix the segfault by updating the fast-path pointer as well.
Fixes: c87d435a4d79 ("ethdev: copy fast-path API into separate structure") Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com> Reviewed-by: John Daley <johndale@cisco.com>
Generally it is good practice to include all headers that provide APIs
which are being used. This is especially true in situations where 3rd
party apps include our public headers and assume that all should work
out of the box.
Including all headers explicitly helps to achieve that.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Device naming might be misleading which is especially true if one takes
it from lspci output. In order to keep naming consistent keep leading
zero in front of pci bus number.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Harman Kalra [Wed, 3 Nov 2021 07:59:14 +0000 (13:29 +0530)]
common/cnxk: fix device MSI-X greater than default value
Handling the case where number of MSIX interrupts are greater
than default value i.e. PLT_MAX_RXTX_INTR_VEC_ID. On PCI probe
device is queried for supported MSIX interrupts, and respective
interrupt resources are reallocated with this value. Same MSIX
count should be used while registering new interrupt vectors.
Fixes: fa8f86a14e2e ("common/cnxk: add build infrastructre and HW definition") Fixes: f6d567b03d28 ("common/cnxk: support NIX IRQ") Fixes: 5e076b609f2a ("common/cnxk: add SE set key for crypto") Cc: stable@dpdk.org Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
common/cnxk: enable TM to listen on Rx pause frames
Enable TM topology to listen on backpressure received when
Rx pause frame is enabled. Only one TM node in Tl3/TL2 per
channel can listen on backpressure on that channel.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Chenbo Xia [Wed, 3 Nov 2021 05:00:26 +0000 (13:00 +0800)]
doc: remove deprecation notice for vhost
Ten vhost APIs were announced to be stable and promoted in below
commit, so remove the related deprecation notice.
Fixes: 945ef8a04098 ("vhost: promote some APIs to stable") Reported-by: Maxime Coquelin <maxime.coquelin@redhat.com> Signed-off-by: Chenbo Xia <chenbo.xia@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Junfeng Guo [Wed, 3 Nov 2021 04:40:03 +0000 (12:40 +0800)]
net/ice: enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this
patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto)
is optional in our cases. To avoid redundancy, we just omit the mask
of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix
'0x' for the spec and mask byte (hex) strings are also omitted here.
Also update the ice feature list with rte_flow item raw.
git.droids-corp.org / dpdk.git / log