Qi Zhang [Thu, 7 Jan 2021 05:15:04 +0000 (13:15 +0800)]
common/iavf: support VLAN offload by DCF
Add new opcode VIRTCHNL_OP_DCF_VLAN_OFFLOAD to set VLAN offload
by DCF, the virtchnl message includes:
1. A valid target VF
2. Type of VLAN to be supported: outer or inner
3. Ethertype of the VLAN (either 0x8100 or 0x88A8 or 0x9100)
4. VLAN insert settings
a). No insert offload, VLAN ID in the packet (default)
b). Offload via transmit descriptor
c). Insert as a port VLAN (via VSI)
5. VLAN strip settings
a). Strip (and discard)
b). Strip and place in descriptor
c). No Strip
6. VLAN ID for the target VF
Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Haiyue Wang <haiyue.wang@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Qi Zhang [Thu, 7 Jan 2021 05:07:08 +0000 (13:07 +0800)]
common/iavf: support new VLAN capabilities
Currently VIRTCHNL only allows for VLAN filtering and offloads to happen
on a single 802.1Q VLAN. Add support to filter and offload on inner,
outer, and/or inner + outer VLANs.
This is done by introducing the new capability
VIRTCHNL_VF_OFFLOAD_VLAN_V2. The flow to negotiate this new capability
is shown below.
1. VF - sets the VIRTCHNL_VF_OFFLOAD_VLAN_V2 bit in the
virtchnl_vf_resource.vf_caps_flags during the
VIRTCHNL_OP_GET_VF_RESOURCES request message. The VF should also set
the VIRTCHNL_VF_OFFLOAD_VLAN bit in case the PF driver doesn't
support the new capability.
2. PF - sets the VLAN capability bit it supports in the
VIRTCHNL_OP_GET_VF_RESOURCES response message. This will either be
VIRTCHNL_VF_OFFLOAD_VLAN_V2, VIRTCHNL_VF_OFFLOAD_VLAN, or none.
3. VF - If the VIRTCHNL_VF_OFFLOAD_VLAN_V2 capability was ACK'd by the
PF, then the VF needs to request the VLAN capabilities of the
PF/Device by issuing a VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS request.
If the VIRTCHNL_VF_OFFLOAD_VLAN capability was ACK'd then the VF
knows only single 802.1Q VLAN filtering/offloads are supported. If no
VLAN capability is ACK'd then the PF/Device doesn't support hardware
VLAN filtering/offloads for this VF.
4. PF - Populates the virtchnl_vlan_caps structure based on what it
allows/supports for that VF and sends that response via
VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS.
After VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS is successfully negotiated
the VF driver needs to interpret the capabilities supported by the
underlying PF/Device. The VF will be allowed to filter/offload the
inner 802.1Q, outer (various ethertype), inner 802.1Q + outer
(various ethertypes), or none based on which fields are set.
The VF will also need to interpret where the VLAN tag should be inserted
and/or stripped based on the negotiated capabilities.
Also, update the virtchnl_op_str() function to support the added opcodes.
This patch adds these combinations in 'invalid_rss_comb' array to do
valid check, if the combination check failed, the rule will be created
unsuccessful.
Fixes: 91f27b2e39ab ("net/iavf: refactor RSS") Cc: stable@dpdk.org Signed-off-by: Murphy Yang <murphyx.yang@intel.com> Acked-by: Jeff Guo <jia.guo@intel.com>
Andrew Boyer [Wed, 16 Dec 2020 21:12:55 +0000 (13:12 -0800)]
net/ionic: improve link state handling
Add UP and FW_RESET state flags.
Update the stack info when the link state changes.
Convert set_link_up/set_link_down to lif_start/lif_stop.
Condition reported link state on UP flag.
Jiayu Hu [Mon, 11 Jan 2021 12:16:27 +0000 (07:16 -0500)]
vhost: enhance async enqueue for small packets
Async enqueue offloads large copies to DMA devices, and small copies
are still performed by the CPU. However, it requires users to get
enqueue completed packets by rte_vhost_poll_enqueue_completed(), even
if they are completed by the CPU when rte_vhost_submit_enqueue_burst()
returns. This design incurs extra overheads of tracking completed
pktmbufs and function calls, thus degrading performance on small packets.
This patch enhances async enqueue for small packets by enabling
rte_vhost_submit_enqueue_burst() to return completed packets.
Signed-off-by: Jiayu Hu <jiayu.hu@intel.com> Tested-by: Yinan Wang <yinan.wang@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Maxime Coquelin [Fri, 8 Jan 2021 09:41:49 +0000 (10:41 +0100)]
net/virtio: fix memory init with vDPA backend
This patch fixes an overhead met with mlx5-vdpa Kernel
driver, where for every page in the mapped area, all the
memory tables gets updated. For example, with 2MB hugepages,
a single IOTLB_UPDATE for a 1GB region causes 512 memory
updates on mlx5-vdpa side.
Using batching mode, the mlx5 driver will only trigger a
single memory update for all the IOTLB updates that happen
between the batch begin and batch end commands.
Maxime Coquelin [Fri, 8 Jan 2021 09:41:48 +0000 (10:41 +0100)]
net/virtio: add missing backend features negotiation
This patch adds missing backend features negotiation for
in Vhost-vDPA. Without it, IOTLB messages v2 could be sent
by Virtio-user PMD while not supported by the backend.
Karra Satwik [Sun, 20 Dec 2020 22:44:43 +0000 (04:14 +0530)]
net/cxgbe: accept VLAN flow items without ethertype
When apps pass the RTE_FLOW_ITEM_TYPE_VLAN without setting the
ethertype field in RTE_FLOW_ITEM_TYPE_ETH, then assume 0x8100
VLAN by default and don't reject the rule.
Fixes: 55f003d8884c ("net/cxgbe: support flow API for matching QinQ VLAN") Cc: stable@dpdk.org Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Xuan Ding [Fri, 8 Jan 2021 08:38:44 +0000 (08:38 +0000)]
net/ice: refactor PF RSS
This patch refactors the PF RSS code based on the below design:
1. ice_pattern_match_item->input_set_mask is the superset of
ETH_RSS_xxx.
2. ice_pattern_match_item->meta is the ice_rss_hash_cfg template.
3. ice_hash_parse_pattern will generate pattern hint.
4. ice_hash_parse_action will refine the ice_rss_hash_cfg based on
the pattern hint and rss_type.
5. The refine process includes:
1) refine protocol headers(VLAN/PPPOE/GTPU).
2) refine hash bit fields of l2, l3, l4.
3) refine hash bit fields for gtpu header.
Signed-off-by: Xuan Ding <xuan.ding@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Ruifeng Wang [Tue, 12 Jan 2021 02:57:07 +0000 (02:57 +0000)]
common/octeontx2: fix build with SVE
Building with gcc 10.2 with SVE extension enabled got error:
{standard input}: Assembler messages:
{standard input}:4002: Error: selected processor does not support `mov z3.b,#0'
{standard input}:4003: Error: selected processor does not support `whilelo p1.b,xzr,x7'
{standard input}:4005: Error: selected processor does not support `ld1b z0.b,p1/z,[x8]'
{standard input}:4006: Error: selected processor does not support `whilelo p4.s,wzr,w7'
This is because inline assembly code explicitly resets cpu model to
not have SVE support. Thus SVE instructions generated by compiler
auto vectorization got rejected by assembler.
Added SVE to the cpu model specified by inline assembly for SVE support.
Not replacing the inline assembly with C atomics because the driver relies
on specific LSE instruction to interface to co-processor [1].
Ruifeng Wang [Tue, 12 Jan 2021 02:57:06 +0000 (02:57 +0000)]
net/octeontx: fix build with SVE
Building with gcc 10.2 with SVE extension enabled got error:
{standard input}: Assembler messages:
{standard input}:91: Error: selected processor does not support `addvl x4,x8,#-1'
{standard input}:95: Error: selected processor does not support `ptrue p1.d,all'
{standard input}:135: Error: selected processor does not support `whilelo p2.d,xzr,x5'
{standard input}:137: Error: selected processor does not support `decb x1'
This is because inline assembly code explicitly resets cpu model to
not have SVE support. Thus SVE instructions generated by compiler
auto vectorization got rejected by assembler.
Added SVE to the cpu model specified by inline assembly for SVE support.
Not replacing the inline assembly with C atomics because the driver relies
on specific LSE instruction to interface to co-processor [1].
Ruifeng Wang [Thu, 14 Jan 2021 06:59:25 +0000 (06:59 +0000)]
test: improve coverage on LPM tbl8
Existing test cases create 256 tbl8 groups for testing. The number covers
only 8 bit next_hop/group field. Since the next_hop/group field had been
extended to 24-bits, creating more than 256 groups in tests can improve
the coverage.
Coverage was not expanded to reach the max supported group number, because
it would take too much time to run for this fast-test.
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Tested-by: David Christensen <drc@linux.vnet.ibm.com> Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Ruifeng Wang [Thu, 14 Jan 2021 06:59:22 +0000 (06:59 +0000)]
lpm: fix vector IPv4 lookup
rte_lpm_lookupx4 could return wrong next hop when more than 256 tbl8
groups are created. This is caused by incorrect type casting of tbl8
group index that been stored in tbl24 entry. The casting caused group
index truncation and hence wrong tbl8 group been searched.
Issue fixed by applying proper mask to tbl24 entry to get tbl8 group index.
Fixes: dc81ebbacaeb ("lpm: extend IPv4 next hop field") Fixes: cbc2f1dccfba ("lpm/arm: support NEON") Fixes: d2cc7959342b ("lpm: add AltiVec for ppc64") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Tested-by: David Christensen <drc@linux.vnet.ibm.com> Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Improved performance for AVX512 FIB6 lookup by doubling the number
of flows being processed
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Ray Kinsella <mdr@ashroe.eu>
Return back 'profiling with vtune' section to profiling programmers
guide with updated instruction on how to enable vtune profiling
with meson configuration option.
Fixes: 89c67ae2cba7 ("doc: remove references to make from prog guide") Cc: stable@dpdk.org Signed-off-by: Eugeny Parshutin <eugeny.parshutin@linux.intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Thomas Monjalon [Wed, 2 Dec 2020 17:15:21 +0000 (18:15 +0100)]
devtools: adjust verbosity of ABI check
The scripts gen-abi.sh and check-abi.sh are updated
to print error messages to stderr so they are likely never ignored.
When called from test-meson-builds.sh, the standard messages on stdout
can be more quiet depending on the verbosity settings.
The beginning of the ABI check is announced in verbose mode.
The commands are printed in very verbose mode.
The check result details are available in verbose mode.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Ophir Munk [Sun, 10 Jan 2021 11:10:23 +0000 (11:10 +0000)]
app/regex: measure performance with precise clock
Performance measurement (elapsed time and Gbps) are based on Linux
clock() API. The resolution is improved by replacing the clock() API
with rte_rdtsc_precise() API.
Signed-off-by: Ophir Munk <ophirmu@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com>
Ophir Munk [Sun, 10 Jan 2021 11:10:22 +0000 (11:10 +0000)]
app/regex: measure performance per queue pair
Up to this commit measuring the parsing elapsed time and Giga bits per
second performance was done on the aggregation of all QPs (per core).
This commit separates the time measurements per individual QP.
Signed-off-by: Ophir Munk <ophirmu@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com>
Ophir Munk [Sun, 10 Jan 2021 11:10:21 +0000 (11:10 +0000)]
app/regex: support multiple cores
Up to this commit the regex application was running with multiple QPs on
a single core. This commit adds the option to specify a number of cores
on which multiple QPs will run.
A new parameter 'nb_lcores' was added to configure the number of cores:
--nb_lcores <num of cores>.
If not configured the number of cores is set to 1 by default. On
application startup a few initial steps occur by the main core: the
number of QPs and cores are parsed. The QPs are distributed as evenly
as possible on the cores. The regex device and all QPs are initialized.
The data file is read and saved in a buffer. Then for each core the
application calls rte_eal_remote_launch() with the worker routine
(run_regex) as its parameter.
Signed-off-by: Ophir Munk <ophirmu@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com>
Ophir Munk [Sun, 10 Jan 2021 11:10:20 +0000 (11:10 +0000)]
app/regex: read data file once at startup
Up to this commit the input data file was read from scratch for each QP,
which is redundant. Starting from this commit the data file is read only
once at startup. Each QP will clone the data.
Signed-off-by: Ophir Munk <ophirmu@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com>
Ophir Munk [Sun, 10 Jan 2021 11:10:19 +0000 (11:10 +0000)]
app/regex: support multiple queue pairs
Up to this commit the regex application used one QP which was assigned a
number of jobs, each with a different segment of a file to parse. This
commit adds support for multiple QPs assignments. All QPs will be
assigned the same number of jobs, with the same segments of file to
parse. It will enable comparing functionality with different numbers of
QPs. All queues are managed on one core with one thread. This commit
focuses on changing routines API to support multi QPs, mainly, QP scalar
variables are replaced by per-QP struct instance. The enqueue/dequeue
operations are interleaved as follows:
enqueue(QP #1)
enqueue(QP #2)
...
enqueue(QP #n)
dequeue(QP #1)
dequeue(QP #2)
...
dequeue(QP #n)
A new parameter 'nb_qps' was added to configure the number of QPs:
--nb_qps <num of qps>.
If not configured, nb_qps is set to 1 by default.
Signed-off-by: Ophir Munk <ophirmu@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com>
Ophir Munk [Sun, 10 Jan 2021 11:10:18 +0000 (11:10 +0000)]
app/regex: move mempool creation to worker routine
Function rte_pktmbuf_pool_create() is moved from init_port() routine to
run_regex() routine. Looking forward on multi core support - init_port()
will be called only once as part of application startup while mem pool
creation should be called multiple times (per core).
Signed-off-by: Ophir Munk <ophirmu@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com>
Tal Shnaiderman [Wed, 6 Jan 2021 20:35:53 +0000 (22:35 +0200)]
eal: add generic thread-local-storage functions
Add support for TLS functionality in EAL.
The following functions are added:
rte_thread_tls_key_create - create a TLS data key.
rte_thread_tls_key_delete - delete a TLS data key.
rte_thread_tls_value_set - set value bound to the TLS key
rte_thread_tls_value_get - get value bound to the TLS key
TLS key is defined by the new type rte_tls_key.
The API allocates the thread local storage (TLS) key.
Any thread of the process can subsequently use this key
to store and retrieve values that are local to the thread.
Those functions are added in addition to TLS capability
in rte_per_lcore.h to allow abstraction of the pthread
layer for all operating systems.
Windows implementation is under librte_eal/windows and
implemented using WIN32 API for Windows only.
Unix implementation is under librte_eal/unix and
implemented using pthread for UNIX compilation.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com> Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
Alvin Zhang [Fri, 8 Jan 2021 05:35:40 +0000 (13:35 +0800)]
net/i40e: refactor RSS flow
1. Delete original code.
2. Add 2 tables(One maps flow pattern and RSS type to PCTYPE,
another maps RSS type to input set).
3. Parse RSS pattern and RSS type to get PCTYPE.
4. Parse RSS action to get queues, RSS function and hash field.
5. Create and destroy RSS filters.
6. Create new files for hash flows.
Alvin Zhang [Fri, 8 Jan 2021 05:35:39 +0000 (13:35 +0800)]
net/i40e: fix returned code for RSS hardware failure
The API should return the system error status, but it returned the
hardware error status, this is confuses the caller.
This patch adds check on hardware execution status and returns -EIO
in case of hardware execution failure.
Fixes: 1d4b2b4966bb ("net/i40e: fix VF overwrite PF RSS LUT for X722") Fixes: d0a349409bd7 ("i40e: support AQ based RSS config") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Qi Zhang [Fri, 8 Jan 2021 04:10:55 +0000 (12:10 +0800)]
net/ice/base: limit forced overrides based on FW version
Beyond a specific version of firmware, there is no need to provide
override values to the firmware when setting PHY capabilities. In this
case, we do not need to indicate whether we're in Strict or Lenient Link
Mode.
In the case of translating capabilities to the configuration structure,
the module compliance enforcement is already correctly set by firmware,
so the extra code block is redundant.
Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Qi Zhang [Fri, 8 Jan 2021 04:03:52 +0000 (12:03 +0800)]
net/ice/base: fix memory handling
Fixed memory handling when memory allocated in user space was handled
as memory allocated in kernel space within QV os_dep implementation
of the ice_memdup function.
Maxime Coquelin [Tue, 5 Jan 2021 12:57:28 +0000 (13:57 +0100)]
vhost: refactor memory regions mapping
This patch moves memory region mmaping and related
preparation in a dedicated function in order to simplify
VHOST_USER_SET_MEM_TABLE request handling function.
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Maxime Coquelin [Tue, 5 Jan 2021 12:57:27 +0000 (13:57 +0100)]
vhost: refactor postcopy registration
This patch moves the registration of postcopy to a
dedicated function, with the goal of simplifying
VHOST_USER_SET_MEM_TABLE request handling function.
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Maxime Coquelin [Tue, 5 Jan 2021 12:57:26 +0000 (13:57 +0100)]
vhost: refactor postcopy region registration
This patch moves the registration of memory regions to
userfaultfd to a dedicated function, with the goal of
simplifying VHOST_USER_SET_MEM_TABLE request handling
function.
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Xueming Li [Wed, 6 Jan 2021 03:06:30 +0000 (03:06 +0000)]
vdpa/mlx5: add hardware queue moderation
The next parameters control the HW queue moderation feature.
This feature helps to control the traffic performance and latency
trade-off.
Each packet completion report from HW to SW requires CQ processing by SW
and triggers interrupt for the guest driver. Interrupt report and
handling cost CPU cycles and time and the amount of this affects
directly on packet performance and latency.
hw_latency_mode parameters [int]
0, HW default.
1, Latency is counted from the first packet completion report.
2, Latency is counted from the last packet completion.
hw_max_latency_us parameters [int]
0 - 4095, The maximum time in microseconds that packet completion
report can be delayed.
hw_max_pending_comp parameter [int]
0 - 65535, The maximum number of pending packets completions in an HW
queue.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Joyce Kong [Mon, 21 Dec 2020 15:50:33 +0000 (23:50 +0800)]
vhost: replace SMP with thread fence for control path
Simply replace the smp barriers with atomic thread fence for vhost control
path, if there are no synchronization points.
Signed-off-by: Joyce Kong <joyce.kong@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Joyce Kong [Mon, 21 Dec 2020 15:50:32 +0000 (23:50 +0800)]
vhost: replace SMP with thread fence for packed vring
Simply replace smp barriers with atomic thread fence for
virtio packed vring.
Signed-off-by: Joyce Kong <joyce.kong@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Joyce Kong [Mon, 21 Dec 2020 15:50:31 +0000 (23:50 +0800)]
vhost: relax full barriers for used idx
Used idx can be synchronized by one-way barrier instead of full
write barrier for split vring.
Signed-off-by: Joyce Kong <joyce.kong@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Joyce Kong [Mon, 21 Dec 2020 15:50:30 +0000 (23:50 +0800)]
vhost: relax full barriers for desc flags
Relax the full read barrier to one-way barrier for desc flags in
packed vring.
Signed-off-by: Joyce Kong <joyce.kong@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Joyce Kong [Mon, 21 Dec 2020 15:50:29 +0000 (23:50 +0800)]
vhost: remove unnecessary SMP barrier for avail idx
The ordering between avail index and desc reads has been enforced
by load-acquire for split vring, so smp_rmb barrier is not needed
behind it.
Signed-off-by: Joyce Kong <joyce.kong@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Joyce Kong [Mon, 21 Dec 2020 15:50:28 +0000 (23:50 +0800)]
vhost: remove unnecessary SMP barrier for desc flags
As function desc_is_avail performs a load-acquire barrier to
enforce the ordering between desc flags and desc content, it is
unnecessary to add a rte_smp_rmb barrier around the trace which
follows desc_is_avail.
Signed-off-by: Joyce Kong <joyce.kong@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
git.droids-corp.org / dpdk.git / log