common/iavf: use macro to define offload/capability
Currently raw hex values are used to define specific bits for each
offload/capability in virtchnl.h. The can and has led to duplicate
defined bits. Fix this by using the BIT() macro so it's
immediately obvious which bits are used/available.
Support for allowing VFs to negotiate the descriptor format was added
previously.
This support requires that the VF specify which descriptor format to use
when requesting Rx queues. The VF is supposed to request the set of
supported formats via the new VIRTCHNL_OP_GET_SUPPORTED_RXDIDS, and then
set one of the supported formats in the rxdid field of the
virtchnl_rxq_info structure.
The virtchnl.h header does not provide an enumeration of the format
values. The existing implementations in the PF directly use the values
from the DDP package.
Make the formats explicit by defining an enumeration of the RXDIDs.
Provide an enumeration for the values as well as the bit positions as
returned by the supported_rxdids data from the
VIRTCHNL_OP_GET_SUPPORTED_RXDIDS.
The value of offload VIRTCHNL_VF_OFFLOAD_CRC bit already existed as
VIRTCHNL_VF_CAP_ADV_LINK_SPEED. Fix this now by changing the value of
VIRTCHNL_VF_OFFLOAD_CRC to a currently unused value.
Also, move the define for VIRTCHNL_VF_CAP_ADV_LINK_SPEED in the correct
place to line up with the other bit values and add a comment for its
purpose. Hopefully this will prevent from defining duplicate bits moving
forward.
net/ice: refactor input set fields for switch filter
Input set has been divided into inner and outer part to distinguish
different fields. However, the parse method of switch filter doesn't
match this update. Refactor switch filter to distinguish inner and outer
input set in the same way as other filters.
net/ice: clean redundant macro definition of filters
The input set has been divided into two parts to distinguish
inner and outer field. ICE_INSET_TUN_* is the same as non tunnel
macro definition. Clean redundant ICE_INSET_TUN_* codes.
When the command sent by VF to PF fails, iavf may need to run
different code paths according to the specific reason of the
failure (not supported or other reasons).
This patch adds support of identifying PF return error type.
The iavf does not support configuring RSS type on i40e VF,
because the i40e kernel driver does not support
VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF capability.
This patch adds support of RSS type configuration for i40e VF by
sending VIRTCHNL_OP_SET_RSS_HENA message to the PF after checking
that the PF does not support VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF
capability.
The link fails code should be parsed using the structure
hns3_mbx_vf_to_pf_cmd, else it will parse fail.
Fixes: 109e4dd1bd7a ("net/hns3: get link state change through mailbox") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
The socket ID entered by user is cast to an unsigned integer. However,
the value may be an illegal negative value, which may cause some
problems. In this case, an error should be returned.
In addition, the socket ID may be an invalid positive number, which is
also processed in this patch.
Fixes: 2efb58cbab6e ("bond: new link bonding library") Cc: stable@dpdk.org Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
The --txpkts command line parameter was silently ignored due to
application was unable to check the Tx queue ring sizes for non
configured ports.
The "set txpkts <len0[,len1]*>" was also rejected if there
was some stopped or /unconfigured port.
This provides the following:
- If fails to get ring size from the port, this can be because port is
not initialized yet, ignore the check and just be sure segment size
won't cause an out of bound access. The port descriptor check will
be done during Tx setup.
- The capability to send single packet is supposed to be very basic
and always supported, the setting segment number to 1 is always
allowed, no check performed
- At the moment of Tx queue setup the descriptor number is checked
against configured segment number
Disable the MAC status report interrupt which hns3 driver not concern
currently.
Fixes: 5f8845f4ba8f ("net/hns3: process MAC interrupt") Cc: stable@dpdk.org Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Thu, 22 Apr 2021 03:56:29 +0000 (11:56 +0800)]
test/kni: check init result
Return value 'rte_kni_init' of a function is not checked. If
it fails, error handling (logging and return) should be done.
This patch fixed it.
Fixes: 0c6bc8ef70ba ("kni: memzone pool for alloc and release") Cc: stable@dpdk.org Signed-off-by: Min Hu (Connor) <humin29@huawei.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Min Hu (Connor) [Thu, 22 Apr 2021 03:56:27 +0000 (11:56 +0800)]
test/kni: fix a comment
This patch changed 'subsytem' to 'subsystem'.
Fixes: 0c6bc8ef70ba ("kni: memzone pool for alloc and release") Cc: stable@dpdk.org Signed-off-by: Min Hu (Connor) <humin29@huawei.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
net/hns3: fix processing link status message on PF
The opcode of the link status notification message reported by the
firmware is zero, it will be filtered out because driver treats it as
already processed message. As a result, the PF can't update the link
status in a timely manner.
Because only VF can set opcode to zero when processing mailbox message,
we add a judgment to make sure the PF messages will not be filtered out.
Fixes: dbbbad23e380 ("net/hns3: fix VF handling LSC event in secondary process") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
The hns3_dev_handle_mbx_msg() could be called under both PF and VF,
but the error messages show VF.
Fixes: 109e4dd1bd7a ("net/hns3: get link state change through mailbox") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Fixes a few different things:
* Remove 'fw_version' NULL checks, it is allowed if the 'fw_size' is
zero, 'fw_version' being NULL but 'fw_size' not zero condition checked
in ethdev layer
* Be sure required buffer size is returned if provided one is not big
enough, instead of returning success (0)
* Document in doxygen comment the '-EINVAL' is a valid return type
* Take into account that 'snprintf' can return negative value
* Cast length to 'size_t' to compare it with 'fw_size'
Fixes: bb42aa9ffe4e ("net/atlantic: configure device start/stop") Fixes: ff70acdf4299 ("net/axgbe: support reading FW version") Fixes: e2652b0a20a0 ("net/bnxt: support get FW version") Fixes: cf0fab1d2ca5 ("net/dpaa: support firmware version get API") Fixes: 748eccb97cdc ("net/dpaa2: add support for firmware version get") Fixes: b883c0644a24 ("net/e1000: add firmware version get") Fixes: 293430677e9c ("net/enic: add handler to return firmware version") Fixes: 1f5ca0b460cd ("net/hns3: support some device operations") Fixes: bd5b86732bc7 ("net/hns3: modify format for firmware version") Fixes: ed0dfdd0e976 ("net/i40e: add firmware version get") Fixes: e31cb9a36298 ("net/ice: support FW version getting") Fixes: 4f09bc55ac3d ("net/igc: implement device base operations") Fixes: eec10fb0ce6b ("net/ionic: support FW version") Fixes: 8b0b56574269 ("net/ixgbe: add firmware version get") Fixes: 4d9f5b8adc02 ("net/octeontx2: add FW version get operation") Fixes: f97b56f9f12e ("net/qede: support FW version query") Fixes: 83fef46a22b2 ("net/sfc: add callback to retrieve FW version") Fixes: bc84ac0fadef ("net/txgbe: support getting FW version") Fixes: 21913471202f ("ethdev: add firmware version get") Cc: stable@dpdk.org Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Haiyue Wang <haiyue.wang@intel.com> Acked-by: Rasesh Mody <rmody@marvell.com> Acked-by: Jiawen Wu <jiawenwu@trustnetic.com> Acked-by: Beilei Xing <beilei.xing@intel.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Currently, when we set the acpi governor to "userspace", we check if
it is already set to this value, and if it is, we skip setting it.
However, we never save this value anywhere, so that next time we come
back and request the governor to be set to its original value, the
original value is empty.
Fix it by saving the original pstate governor first. While we're at it,
replace `strlcpy` with `rte_strscpy`.
Fixes: 445c6528b55f ("power: common interface for guest and host") Cc: stable@dpdk.org Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Reshma Pattan <reshma.pattan@intel.com>
In function 'eval_jcc', judgment 'op == EBPF_JLT' occurs
twice, as a result, the corresponding second statement
cannot be accessed.
This patch fix this problem.
Fixes: 8021917293d0 ("bpf: add extra validation for input BPF program") Cc: stable@dpdk.org Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
gcc 11 with '-O2' complains about some variables being used without
being initialized:
In function ‘start_flow_avx512x8’,
inlined from ‘search_trie_avx512x8.constprop’ at acl_run_avx512_common.h:317:
lib/librte_acl/acl_run_avx512_common.h:210:13: warning:
‘pdata’ is used uninitialized [-Wuninitialized]
In function ‘search_trie_avx512x8.constprop’:
lib/librte_acl/acl_run_avx512_common.h:314:32: note: ‘pdata’ declared here
...
Indeed, these variables are not explicitly initialized,
but this is done intentionally.
We rely on constant mask value that we pass to start_flow*() functions
as a parameter to mask out uninitialized values.
Note that '-O3' doesn't produce this warning.
Anyway, to support clean build with gcc-11 this patch adds
explicit initialization for these variables.
I checked the output binary: with '-O3' both clang and gcc 10/11
generate no extra code for it.
Also performance test didn't reveal any regressions.
Shijith Thotton [Tue, 4 May 2021 00:27:25 +0000 (05:57 +0530)]
event/cnxk: add option to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.
Pavan Nikhilesh [Tue, 4 May 2021 00:27:15 +0000 (05:57 +0530)]
event/cnxk: add option to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.
Shijith Thotton [Tue, 4 May 2021 00:27:14 +0000 (05:57 +0530)]
event/cnxk: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM LF based on number of LF's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
* Buckets based on min and max timeout supplied.
* Allocate the chunk pool based on the number of timers.
On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.
Pavan Nikhilesh [Tue, 4 May 2021 00:27:04 +0000 (05:57 +0530)]
event/cnxk: add option to configure getwork mode
Add devargs to configure the platform specific getwork mode.
CN9K getwork mode by default is set to use dual workslot mode.
Add option to force single workslot mode.
Example:
--dev "0002:0e:00.0,single_ws=1"
CN10K supports multiple getwork prefetch modes, by default the
prefetch mode is set to none.
Add option to select getwork prefetch mode
Example:
--dev "0002:1e:00.0,gw_mode=1"
Shijith Thotton [Tue, 4 May 2021 00:27:01 +0000 (05:57 +0530)]
event/cnxk: add option to control SSO HWGRP QoS
SSO HWGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO HWGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to HWGRPs based on a preconfigured threshold.
We can control the QoS of SSO HWGRP by modifying the above mentioned
thresholds. HWGRPs that have higher importance can be assigned higher
thresholds than the rest.
Shijith Thotton [Tue, 4 May 2021 00:27:00 +0000 (05:57 +0530)]
event/cnxk: add option for in-flight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.
Shijith Thotton [Tue, 4 May 2021 00:26:57 +0000 (05:56 +0530)]
event/cnxk: add platform specific device config
Add platform specific event device configuration that attaches the
requested number of SSO HWS(event ports) and HWGRP(event queues) LFs
to the RVU PF/VF.
Update the dlb documentation for v2.5. Notable differences include
the new cobined credit scheme. Also cleaned up a couple of sections,
and removed a duplicate section.
event/dlb2: update config defines as runtime options
The new devarg names and their default values
are listed below. The defaults have not changed, and
none of these parameters are accessed in the fast path.
All references to the old register map have been removed,
so it is safe to rename the new combined file that supports
both DLB v2.0 and DLB v2.5. Also fixed all places where this
file is included.
event/dlb2: use new implementation of HW types header
As support for DLB v2.5 was added, modifications were made to
dlb_hw_types_new.h, but the old file needed to be preserved during
the port in order to meet the requirement that individual patches in
a series each compile successfully. Since the DLB v2.5 support is
completely integrated, it is now safe to remove the old (original)
file, as well as the DLB2_USE_NEW_HEADERS define that was used to
control which version of the file was to be included in certain
source files.
It is now safe to rename the new file, and use it unconditionally
in all DLB source files.
event/dlb2: use new implementation of resource file
The file dlb_resource_new.c now contains all of the low level
functions required to support both DLB v2.0 and DLB v2.5, and
the original file (dlb_resource.c) was removed in the previous
commit, so rename dlb_resource_new.c to dlb_resource.c, and
update the meson build file so that the new file is built.
event/dlb2: use new implementation of resource header
A temporary version of dlb_resource.h (dlb_resource_new.h) was used
by the previous commits in this patch series. Merge the two files
now that DLB v2.5 support has been fully added to dlb_resource.c.
Update the low level HW functions that perform the sequence number
management functions. These include getting a groups number of
sequence numbers per queue, managing in-use slots, getting the
current occupancy, and setting sequence numbers for a group.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Update the low level HW functions responsible for
configuring sparse CQ mode, where each cache line
contains just one QE instead of 4.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Update the low level HW functions responsible for
finishing the queue map/unmap operation, which is an
asynchronous operation.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Update the low level hardware functions responsible for
getting the queue depth. The command arguments are also
validated.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
DLB v2.5 uses a different credit scheme than was used in DLB v2.0 .
Specifically, there is a single credit pool for both load balanced
and directed traffic, instead of a separate pool for each as is
found with DLB v2.0.
Update the low level HW functions responsible for
starting the scheduling domain. Once a domain is
started, its resources can no longer be configured,
except for QID remapping and port enable/disable.
The start domain arguments are validated, and an error
is returned if validation fails, or if the domain is
not configured or has already been started.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Update the low level HW functions responsible for
removing the linkage between a queue and a load
balanced port. Runtime checks are performed on the
port and queue to make sure the state is appropriate
for the unmap operation, and the unmap arguments
are also validated.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Update the low level HW functions responsible for
mapping queues to ports. These functions also validate
the map arguments and verify that the maximum number
of queues linked to a load balanced port does not
exceed the capabilities of the hardware.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Update the low level HW functions responsible for
creating directed queues. These functions configure
the depth threshold, configure queue depth, and
validate the queue creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Update the low level HW functions responsible for
creating directed ports. These functions create the
producer port (PP), configure the consumer queue (CQ),
configure queue depth, and validate the port creation
arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Update the low level HW functions responsible for
creating load balanced ports. These functions create the
producer port (PP), configure the consumer queue (CQ), and
validate the port creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Updated low level hardware functions related to configuring
load balanced queues. These functions create the queues,
as well as attach related resources required by load
balanced queues, such as sequence numbers.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action based on the hardware
version, v2.0 or v2.5.
Reset hardware registers, consumer queues, ports,
interrupts and software. Queues must also be drained
as part of the reset process.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.
Add support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.
DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differences, the low level hardware functions must take the device
version into consideration. This requires that the hardware version be
passed to many of the low level functions, so that the PMD can
take the appropriate action based on the device version.
To ease the transition and keep the individual patches small, three
temporary files are added in this commit. These files have "new"
in their names. The files with "new" contain changes specific to a
consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
files of the same name (minus "new") contain the old DLB v2.0 specific
code. The intent is to remove code from the original files as that code
is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
files in a series of commits. At end of the patch series, the old files
will be empty and the "new" files will have the logic needed
to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
At that time, the original DLB v2.0 specific files will be deleted,
and the "new" files will be renamed and replace them.
This commit adds dlb v2.5 probe support, and updates
parameter parsing.
The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.
- Remove references of FPGA.
- Do not include dlb2_mbox.h as it is not needed.
- Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidated.
git.droids-corp.org / dpdk.git / log