dpdk.git
4 years agomaintainers: update for bonding
Min Hu (Connor) [Fri, 9 Oct 2020 13:37:32 +0000 (21:37 +0800)]
maintainers: update for bonding

Adding Connor as additional maintainer to bonding.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/virtio: check raw checksum failure
Chas Williams [Thu, 1 Oct 2020 10:22:45 +0000 (06:22 -0400)]
net/virtio: check raw checksum failure

rte_raw_cksum_mbuf can fail, so we should check to see if it
has. If so, return with an error.

Fixes: 96cb6711939e ("net/virtio: support Rx checksum offload")
Cc: stable@dpdk.org
Signed-off-by: Chas Williams <3chas3@gmail.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
4 years agonet: check segment pointer in raw checksum processing
Chas Williams [Thu, 1 Oct 2020 10:22:44 +0000 (06:22 -0400)]
net: check segment pointer in raw checksum processing

If the overall pkt_len and segment lengths are out of agreement,
it is possible for the seg to be NULL after the loop. Add assert
to check this condition in debug builds. Otherwise, return failure.

Fixes: c442fed81bb9 ("net: add function to calculate checksum in mbuf")
Cc: stable@dpdk.org
Signed-off-by: Chas Williams <3chas3@gmail.com>
4 years agodoc: fix diagram in dpaa2 guide
Sachin Saxena [Thu, 8 Oct 2020 03:13:57 +0000 (08:43 +0530)]
doc: fix diagram in dpaa2 guide

The diagram to show dpaa2 drivers brief
was missing in dpaa2.html file.

fix a typo in encoding for a literal block
to make it visible in generated doc file.

Fixes: 846a8305f277 ("doc: add DPAA2 NIC details")
Cc: stable@dpdk.org
Signed-off-by: Sachin Saxena <sachin.saxena@oss.nxp.com>
4 years agobuild: skip detecting libpcap via pcap-config
Bruce Richardson [Fri, 9 Oct 2020 14:19:14 +0000 (15:19 +0100)]
build: skip detecting libpcap via pcap-config

When compiling for a slightly different architecture, e.g. 32-bit on 64-bit
systems using CFLAGS rather than a cross-file, the pcap-config utility can
often return parameters that are unusable for the build in question, i.e.
providing the native 64-bit library paths rather than checking for 32-bit
equivalent.

Since many distros now include a version of libpcap with a
pkg-config file, and for those that don't find-library should work ok as a
fallback, we can explicitly just use pkg-config in the dependency search,
causing meson to skip trying to use pcap-config.

Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Luca Boccassi <bluca@debian.org>
Tested-by: David Marchand <david.marchand@redhat.com>
4 years agoeal: fix doxygen for EAL cleanup
David Marchand [Fri, 9 Oct 2020 07:15:54 +0000 (09:15 +0200)]
eal: fix doxygen for EAL cleanup

Align rte_eal_cleanup return codes description to the rest of dpdk.

Fixes: aec9c13c5257 ("eal: add function to release internal resources")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
4 years agoraw/dpaa2_qdma: fix reset
Yunjian Wang [Wed, 9 Sep 2020 01:11:46 +0000 (09:11 +0800)]
raw/dpaa2_qdma: fix reset

This issue detected by coverity, CID#279443(Structurally dead code).

Coverity issue: 279443
Fixes: c22fab9a6c34 ("raw/dpaa2_qdma: support configuration APIs")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
4 years agoraw/octeontx2_dma: support multiple DPI blocks
Radha Mohan Chintakuntla [Tue, 6 Oct 2020 05:30:21 +0000 (22:30 -0700)]
raw/octeontx2_dma: support multiple DPI blocks

This patch adds support for multiple DPI blocks by removing the fixed
macro that was writing to same sysfs entry for different DPI blocks.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Reviewed-by: Satananda Burla <sburla@marvell.com>
Acked-by: Satha Rao <skoteshwar@marvell.com>
4 years agoraw/octeontx2_dma: assign PEM id for external transfer
Radha Mohan Chintakuntla [Tue, 6 Oct 2020 05:30:20 +0000 (22:30 -0700)]
raw/octeontx2_dma: assign PEM id for external transfer

DPI needs to know the PEM number for all external transfers.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Reviewed-by: Satananda Burla <sburla@marvell.com>
Acked-by: Satha Rao <skoteshwar@marvell.com>
4 years agoapp/testpmd: add FEC command
Min Hu (Connor) [Thu, 8 Oct 2020 10:02:56 +0000 (18:02 +0800)]
app/testpmd: add FEC command

This commit adds testpmd capability to query and config FEC
function of device. This includes:
- show FEC capabilities, example:
testpmd> show port 0 fec capabilities
- show FEC mode, example:
testpmd> show port 0 fec_mode
- config FEC mode, example:
testpmd> set port <port_id> fec_mode auto|off|rs|baser

where:

auto|off|rs|baser are four kinds of FEC mode which dev
support according to MAC link speed.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: Chengchang Tang <tangchengchang@huawei.com>
4 years agonet/hns3: support FEC
Min Hu (Connor) [Thu, 8 Oct 2020 10:02:55 +0000 (18:02 +0800)]
net/hns3: support FEC

Forward error correction (FEC) is a bit error correction mode.
It adds error correction information to data packets at the
transmit end, and uses the error correction information to correct
the bit errors generated during data packet transmission at the
receive end. This improves signal quality but also brings a delay
to signals. This function can be enabled or disabled as required.

This patch adds FEC support for ethdev.Introduce ethdev
operations which support query and config FEC information in
hardware.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: Chengchang Tang <tangchengchang@huawei.com>
4 years agoethdev: introduce FEC API
Min Hu (Connor) [Thu, 8 Oct 2020 10:02:54 +0000 (18:02 +0800)]
ethdev: introduce FEC API

This patch adds Forward error correction(FEC) support for ethdev.
Introduce APIs which support query and config FEC information in
hardware.

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: Chengchang Tang <tangchengchang@huawei.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/iavf: add extended stats
Robin Zhang [Sun, 27 Sep 2020 07:26:25 +0000 (07:26 +0000)]
net/iavf: add extended stats

Add implementation of xstats() functions in iavf PMD.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: cleanup Tx buffers
Robin Zhang [Sun, 27 Sep 2020 07:26:24 +0000 (07:26 +0000)]
net/iavf: cleanup Tx buffers

Add support to the iavf driver for the API rte_eth_tx_done_cleanup
to force free consumed buffers on Tx ring.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: disable promiscuous mode on close
Robin Zhang [Sun, 27 Sep 2020 07:26:23 +0000 (07:26 +0000)]
net/iavf: disable promiscuous mode on close

In scenario of Kernel Driver runs on PF and PMD runs on VF, PMD exit
doesn't disable promiscuous mode, this will cause vlan filter set by
Kernel Driver will not take effect.

This patch will fix it, add promiscuous disable at device disable.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: optimize promiscuous device operations
Robin Zhang [Sun, 27 Sep 2020 07:26:22 +0000 (07:26 +0000)]
net/iavf: optimize promiscuous device operations

This patch is to improve efficiency and eliminate code
redundancy of promiscuous ops.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: re-program promiscuous mode on VF interface
Robin Zhang [Sun, 27 Sep 2020 07:26:21 +0000 (07:26 +0000)]
net/iavf: re-program promiscuous mode on VF interface

During a kernel PF reset, this event is propagated to the VF.
The DPDK VF PMD will execute the reset task before the PF is done
with his. This results in the admin queue message not being responded
to leaving the port in "promiscuous" mode.

This patch makes sure the promiscuous mode is configured independently
of the current admin state.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: set min and max MTU for VF
Robin Zhang [Sun, 27 Sep 2020 07:26:20 +0000 (07:26 +0000)]
net/iavf: set min and max MTU for VF

This commit sets the min and max supported MTU values for iavf VF
devices via the iavf_dev_info_get() function. Min MTU supported
is set to RTE_ETHER_MIN_MTU and max MTU is calculated as the max
packet length supported minus the transport overhead.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: use link status helper functions
Robin Zhang [Sun, 27 Sep 2020 07:26:19 +0000 (07:26 +0000)]
net/iavf: use link status helper functions

Use new rte_eth_linkstatus_get/set helper functions to handle link
status update.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: fix flow flush after PF reset
Jeff Guo [Wed, 30 Sep 2020 05:44:12 +0000 (13:44 +0800)]
net/iavf: fix flow flush after PF reset

When VF begin reset after PF reset, VF will be uninitialized at first
and then be initialized, during the time any invalid cmd such as flow
flush should not be sent to PF until the uninitialization is finished.

Fixes: 1eab95fe2e36 ("net/iavf: fix command after PF reset")
Cc: stable@dpdk.org
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/fm10k: fix memory leak when Tx thresh check fails
Yunjian Wang [Wed, 7 Oct 2020 07:36:46 +0000 (15:36 +0800)]
net/fm10k: fix memory leak when Tx thresh check fails

In fm10k_tx_queue_setup(), we allocate memory for the queue
structure but not released when Tx thresh check fails.

Fixes: 98068e0e044e ("fm10k: add Tx queue setup/release")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Xiao Wang <xiao.w.wang@intel.com>
4 years agocommon/mlx5: fix PCI address lookup
Viacheslav Ovsiienko [Sun, 13 Sep 2020 19:55:06 +0000 (19:55 +0000)]
common/mlx5: fix PCI address lookup

mlx5 PMDs use the mlx5_dev_to_pci_addr() routine to convert
Infiniband device name to the Bus-Device-Function location
on the PCI bus. The routine returned success even in case of
not found identification string. On caller side it likely
caused the wrong match with the BDF of previous device
resulting in wrong representor and master recognitions.

Fixes: 771fa900b73a ("mlx5: introduce new driver for Mellanox ConnectX-4 adapters")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
4 years agonet/mlx5: disable dump of Verbs flows
Xueming Li [Thu, 10 Sep 2020 04:24:57 +0000 (04:24 +0000)]
net/mlx5: disable dump of Verbs flows

There was a segment fault when dump flows with device argument of
dv_flow_en=0. In such case, Verbs flow engine was enabled and fdb
resources were not initialized. It's suggested to use mlx_fs_dump
for Verbs flow dump.

This patch adds verbs engine check, prints warning message and return
gracefully.

Fixes: f6d7202402c9 ("net/mlx5: support flow dump API")
Cc: stable@dpdk.org
Reported-by: Jørgen Østergaard Sloth <jorgen.sloth@xci.dk>
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
4 years agonet/bnxt: support fast mbuf free
Lance Richardson [Tue, 6 Oct 2020 17:37:52 +0000 (13:37 -0400)]
net/bnxt: support fast mbuf free

Add support for DEV_TX_OFFLOAD_MBUF_FAST_FREE to bnxt
vector mode transmit. This offload may be enabled
only when multi-segment transmit is not needed, all
transmitted mbufs for a given queue will be allocated
from the same pool, and all transmitted mbufs will
have a reference count of 1.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: fix link update
Kalesh AP [Tue, 6 Oct 2020 16:01:56 +0000 (21:31 +0530)]
net/bnxt: fix link update

1. When port is stopped, we can forcibly set the link status for the
   device to down.
2. VFs and MH PFs do not have the privilege to bring the link down.
   As a result driver prints "Link Up" when port is stopped.
3. When driver receives link status/speed/config async event from fw,
   driver invokes bnxt_link_update() with exp_link_status as ETH_LINK_UP
   This is not logically correct as the async event could be for Link up
   or link down or for speed change.

Fixes: 074cacb9907a ("net/bnxt: fix link during port toggle")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/mlx5: remove Rx queue object type field
Michael Baum [Thu, 1 Oct 2020 14:09:26 +0000 (14:09 +0000)]
net/mlx5: remove Rx queue object type field

Once the separation between Verbs and DevX is done using function
pointers, the type field of the Rx queue object structure becomes
redundant and no more code is used.
Remove the unnecessary field from the structure.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: separate Rx queue state modification
Michael Baum [Thu, 1 Oct 2020 14:09:25 +0000 (14:09 +0000)]
net/mlx5: separate Rx queue state modification

Separate Rx state modification to the Verbs and DevX modules.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: remove Tx queue object type field
Michael Baum [Thu, 1 Oct 2020 14:09:24 +0000 (14:09 +0000)]
net/mlx5: remove Tx queue object type field

Once the separation between Verbs and DevX is done using function
pointers, the type field of the Tx queue object structure becomes
redundant and no more code is used.
Remove the unnecessary field from the structure.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: share Tx queue object modification
Michael Baum [Thu, 1 Oct 2020 14:09:23 +0000 (14:09 +0000)]
net/mlx5: share Tx queue object modification

Use new modify_qp functions for Tx object creation in DevX and Verbs
modules.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: separate Tx queue object modification
Michael Baum [Thu, 1 Oct 2020 14:09:22 +0000 (14:09 +0000)]
net/mlx5: separate Tx queue object modification

Separate Tx object modification to the Verbs and DevX modules.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: rearrange QP creation in Verbs module
Michael Baum [Thu, 1 Oct 2020 14:09:21 +0000 (14:09 +0000)]
net/mlx5: rearrange QP creation in Verbs module

1. Rename function to mention the internal resources.
2. Reduce the number of function arguments.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: rearrange SQ and CQ creation in DevX module
Michael Baum [Thu, 1 Oct 2020 14:09:20 +0000 (14:09 +0000)]
net/mlx5: rearrange SQ and CQ creation in DevX module

1. Rename functions to mention the internal resources.
2. Reduce the number of function arguments.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: share Tx control code
Michael Baum [Thu, 1 Oct 2020 14:09:19 +0000 (14:09 +0000)]
net/mlx5: share Tx control code

Move Tx object similar resources allocations and debug logs from DevX
and Verbs modules to a shared location.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: separate Tx queue object creations
Michael Baum [Thu, 1 Oct 2020 14:09:18 +0000 (14:09 +0000)]
net/mlx5: separate Tx queue object creations

As an arrangement to Windows OS support, the Verbs operations should be
separated to another file.
By this way, the build can easily cut the unsupported Verbs APIs from
the compilation process.

Define operation structure and DevX module in addition to the existing
Linux Verbs module.
Separate Tx object creation into the Verbs/DevX modules and update the
operation structure according to the OS support and the user
configuration.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: reposition event queue number field
Michael Baum [Thu, 1 Oct 2020 14:09:17 +0000 (14:09 +0000)]
net/mlx5: reposition event queue number field

The eqn field has become a field of sh directly since it is also
relevant for Tx and Rx.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: reorder Tx queue Verbs object creation
Michael Baum [Thu, 1 Oct 2020 14:09:16 +0000 (14:09 +0000)]
net/mlx5: reorder Tx queue Verbs object creation

Move the creation of the completion queue from the mlx5_txq_obj_new
function into an auxiliary function.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: reorder Tx queue DevX object creation
Michael Baum [Thu, 1 Oct 2020 14:09:15 +0000 (14:09 +0000)]
net/mlx5: reorder Tx queue DevX object creation

Move the creation of the send queue and the completion queue resources
from the mlx5_txq_obj_devx_new function into auxiliary functions.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: mitigate Tx queue reference counters
Michael Baum [Thu, 1 Oct 2020 14:09:14 +0000 (14:09 +0000)]
net/mlx5: mitigate Tx queue reference counters

The Tx queue structures manage 2 different reference counter per queue:
txq_ctrl reference counter and txq_obj reference counter.

There is no real need to use two different counters, it just complicates
the release functions.
Remove the txq_obj counter and use only the txq_ctrl counter.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: remove unused variable in Tx queue creation
Michael Baum [Thu, 1 Oct 2020 14:09:13 +0000 (14:09 +0000)]
net/mlx5: remove unused variable in Tx queue creation

When a CQ is not created by DevX, it be allocated by either DV function
or by regular Verbs function.

The CQ DV attributes variable was wrongly defined and initialized in Tx
queue creation while the CQ is created by the regular Verbs function
what remained the attributes variable unused.

Remove the unused variable.

Fixes: faf2667fe8d5 ("net/mlx5: separate DPDK from verbs Tx queue objects")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/mlx5: fix send queue doorbell
Michael Baum [Thu, 1 Oct 2020 14:09:12 +0000 (14:09 +0000)]
net/mlx5: fix send queue doorbell

As part of SQ creation for Tx queue objects, a HW doorbell memory should
be allocated and mapped to the HW.

The SQ doorbell handler was wrongly saved on the CQ fields what caused
wrong doorbell release in the Tx queue object destroy flow.

Save the SQ doorbell handler in the SQ fields.

Fixes: 3a87b964edd3 ("net/mlx5: create Tx queues with DevX")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agoethdev: fix data type in TC queues
Huisong Li [Sun, 27 Sep 2020 03:16:36 +0000 (11:16 +0800)]
ethdev: fix data type in TC queues

Currently, base and nb_queue in the tc_rxq and tc_txq information
of queue and TC mapping on both TX and RX paths are uint8_t.
However, these data will be truncated when queue number under a TC
is greater than 256. So it is necessary for base and nb_queue to
change from uint8_t to uint16_t.

Fixes: 89d6728c7837 ("ethdev: get DCB information")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Reviewed-by: Dongdong Liu <liudongdong3@huawei.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agoethdev: move RSS expansion code to mlx5 driver
Dekel Peled [Thu, 24 Sep 2020 14:52:14 +0000 (17:52 +0300)]
ethdev: move RSS expansion code to mlx5 driver

Patch [1] added support for RSS flow expansion.
It was added in ethdev for public use, but until now it is used only
by MLX5 PMD.
To allow local changes in this code, this patch removes it from ethdev
and moves it to MLX5 PMD file.

[1] commit 4ed05fcd441b ("ethdev: add flow API to expand RSS flows")

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agoethdev: fix RSS flow expansion in case of mismatch
Dekel Peled [Thu, 24 Sep 2020 14:52:13 +0000 (17:52 +0300)]
ethdev: fix RSS flow expansion in case of mismatch

Function rte_flow_expand_rss() is used to expand a flow rule with
partial pattern into several rules, to ensure all relevant packets
are matched.
It uses utility function rte_flow_expand_rss_item_complete(), to check
if the last valid item in the flow rule pattern needs to be completed.
For example the pattern "eth / ipv4 proto is 17 / end" will be completed
with a "udp" item.
This function returns "void" item in two cases:
1) The last item has empty spec, for example "eth / ipv4 / end".
2) The last itme has spec that can't be expanded for RSS.
   For example the pattern "eth / ipv4 proto is 47 / end" ends with IPv4
   item that has next protocol GRE.

In both cases the flow rule may be expanded, but in the second case such
expansion may create rules with invalid pattern.
For example "eth / ipv4 proto is 47 / udp / end".
In such a case the flow rule should not be expanded.

This patch updates function rte_flow_expand_rss_item_complete().
Return value RTE_FLOW_ITEM_TYPE_END is used to indicate the flow rule
should not be expanded.
In such a case, rte_flow_expand_rss() will return with the original flow
rule only, without any expansion.

Fixes: fc2dd8dd492f ("ethdev: fix expand RSS flows")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
4 years agoethdev: check if queues are allocated before getting info
Ferruh Yigit [Thu, 1 Oct 2020 18:14:02 +0000 (19:14 +0100)]
ethdev: check if queues are allocated before getting info

A crash is detected when '--txpkts=#' parameter provided to the testpmd,
this is because queue information is requested before queues have been
allocated.

Adding check to queue info APIs
('rte_eth_rx_queue_info_get()' & 'rte_eth_tx_queue_info_get')
to protect against similar cases.

Fixes: ba2fb4f022fc ("ethdev: check if queue setup when getting queue info")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/qede: fix getting link details
Rasesh Mody [Fri, 2 Oct 2020 19:59:45 +0000 (12:59 -0700)]
net/qede: fix getting link details

This patch fixes get current link details, without this change the link
details can be inaccurate if proper lock is not acquired.

Fixes: 739a5b2f2b49 ("net/qede/base: use passed ptt handler")
Cc: stable@dpdk.org
Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
4 years agonet/mlx5: fix Rx queue count calculation
Alexander Kozyrev [Tue, 29 Sep 2020 18:36:23 +0000 (18:36 +0000)]
net/mlx5: fix Rx queue count calculation

There are a few discrepancies in the Rx queue count calculation.

The wrong index is used to calculate the number of used descriptors
in an Rx queue in case of the compressed CQE processing. The global
CQ index is used while we really need an internal index in a single
compressed session to get the right number of elements processed.

The total number of CQs should be used instead of the number of mbufs
to find out about the maximum number of Rx descriptors. These numbers
are not equal for the Multi-Packet Rx queue.

Allow the Rx queue count calculation for all possible Rx bursts since
CQ handling is the same for regular, vectorized, and multi-packet Rx
queues.

Fixes: 26f04883441a ("net/mlx5: support Rx queue count API")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
4 years agonet/mlx5: fix meter table definitions
Suanming Mou [Wed, 30 Sep 2020 06:47:01 +0000 (14:47 +0800)]
net/mlx5: fix meter table definitions

As metering and metadata features were developed at the same time. The
metering and metadata tables are defined conflicted.

This cause the meter suffix flow jump to the same metadata table and
cause flow deadloop.

Adjust the metering table define to fix that issue.

Fixes: 46a5e6bc6a85 ("net/mlx5: prepare meter flow tables")
Cc: stable@dpdk.org
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
4 years agonet/mlx5: fix DevX CQ attributes values
Dekel Peled [Wed, 30 Sep 2020 12:19:36 +0000 (15:19 +0300)]
net/mlx5: fix DevX CQ attributes values

Previous patch wrongly used rdma-core defined values, when preparing
attributes for creating DevX CQ object.
This patch adds the correct value definition and uses them instead.

Fixes: 08d1838f645a ("net/mlx5: implement CQ for Rx using DevX API")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
4 years agonet/bnxt: update HWRM structures
Ajit Khaparde [Tue, 22 Sep 2020 23:55:43 +0000 (16:55 -0700)]
net/bnxt: update HWRM structures

HWRM API to a newer 1.10.1.70 version.

Few fields have been renamed because of this.
rx_err_pkt -> rx_discard_pkts
rx_drop_pkts -> rx_error_pkts

tx_err_pkts -> tx_discard_pkts
tx_drop_pkts -> tx_error_pkts

link_signal_mode -> active_fec_signal_mode

tx_bd_long_hi.mss -> tx_bd_long_hi.kid_or_ts_high_mss
tx_bd_long_hi.hdr_size -> tx_bd_long_hi.kid_or_ts_low_hdr_size

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agonet/bnxt: support RSS hash selection
Ajit Khaparde [Fri, 18 Sep 2020 23:33:41 +0000 (16:33 -0700)]
net/bnxt: support RSS hash selection

Add support to select RSS hash based on innermost or outermost
headers. If an application is started without any specific settings
the default mode configured by FW or HW shall be used.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
4 years agoethdev: use mbuf bulk free API
Stephen Hemminger [Wed, 30 Sep 2020 21:27:18 +0000 (14:27 -0700)]
ethdev: use mbuf bulk free API

The mbuf library now has routine to free multiple buffers.
Loop is no longer needed.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
4 years agonet/hns3: remove redundant return value assignment
Hongbo Zheng [Tue, 29 Sep 2020 12:01:17 +0000 (20:01 +0800)]
net/hns3: remove redundant return value assignment

When an error occurs in the reset process, -EIO is returned.
The assignment of ret here is redundant, so deleted it.

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: check PCI config space reads
Hongbo Zheng [Tue, 29 Sep 2020 12:01:16 +0000 (20:01 +0800)]
net/hns3: check PCI config space reads

This patch add return value check when calling rte_pci_read_config
function.

Fixes: cea37e513329 ("net/hns3: fix FLR reset")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: support queue start and stop
Chengchang Tang [Tue, 29 Sep 2020 12:01:15 +0000 (20:01 +0800)]
net/hns3: support queue start and stop

The new generation hns3 network engine supports independent enabling and
disabling of a single Tx/Rx queue. So, it can support the queue start
and stop feature. In addition, when different numbers of Tx and Rx
queues need to be enabled in some applications, hns3 pmd does not need
to create fake queues to enable these scenarios.

This patch Add queue start and stop feature for the new generation hns3
networking engine. Cancel the creation of fake queue on the new
generation network engine. And the previously improperly named queue
related function was renamed to improve readability.

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: set max scheduling rate based on actual board
Huisong Li [Tue, 29 Sep 2020 12:01:14 +0000 (20:01 +0800)]
net/hns3: set max scheduling rate based on actual board

Currently, max scheduling rates configuration of pg, pri and port are
set to 100000Mbps, which is the maximum bandwidth of hns3 network engine
with revision_id equals 0x21. However, max scheduling rate configuration
should be set to hardware based on the actual hardware board
environment.

The max_tm_rate in struct hns3_hw, meaning the rate, is obtained from
firmware. So we should use the variable to configure the max scheduling
rate.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: offload calculating shapping to firmware
Huisong Li [Tue, 29 Sep 2020 12:01:13 +0000 (20:01 +0800)]
net/hns3: offload calculating shapping to firmware

In order to have more flexible selection of shapping algorithm based on
different versions of hns3 network engine, moves the algorithm of
calculating shapping parameter to firmware to execute. If bit
HNS3_TM_RATE_VLD_B of flag field of struct named hns3_pri_shapping_cmd,
hns3_pg_shapping_cmd or hns3_port_shapping_cmd is set to 1, firmware of
network engine, which device revision_id is greater than and equal to
0x30, will recalculate the shapping parameters according to the xxx_rate
field of struct hns3_xxx_shapping_cmd and the opcode of scheduling
level, and configure to hardware.

But driver still needs to calculate shapping parameters and configure
firmware, so as to be compatible with the network engine with
revision_id eqauls 0x21. And the rate and the flag will be ignored based
on the network engine with revision_id equals 0x21.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: fix flow error type
Wei Hu (Xavier) [Tue, 29 Sep 2020 12:01:12 +0000 (20:01 +0800)]
net/hns3: fix flow error type

The API of rte_flow_error_set is used to pass detail error information
to caller, this patch sets suitable type when calling rte_flow_error_set
API.

Fixes: fcba820d9b9e ("net/hns3: support flow director")
Fixes: c37ca66f2b27 ("net/hns3: support RSS")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: fix error type when validating RSS flow action
Wei Hu (Xavier) [Tue, 29 Sep 2020 12:01:11 +0000 (20:01 +0800)]
net/hns3: fix error type when validating RSS flow action

Because the macro named RTE_FLOW_ERROR_TYPE_ACTION_CONF indicates a
action configuration and the macro named RTE_FLOW_ERROR_TYPE_ACTION
indicates a specific action, the driver needs to return
RTE_FLOW_ERROR_ACTION_CONF type and notify the user when a RSS
configuration is invalid with actions list in the internal function
named hns3_parse_rss_filter called by the '.validate' ops implementation
function named hns3_flow_validate.

Besides, this patch removes some unnecessary judgment lines in
hns3_parse_rss_filter.

Fixes: c37ca66f2b27 ("net/hns3: support RSS")
Cc: stable@dpdk.org
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: maximize queue number
Wei Hu (Xavier) [Tue, 29 Sep 2020 12:01:10 +0000 (20:01 +0800)]
net/hns3: maximize queue number

The maximum number of queues for hns3 PF and VF driver is 64 based on
hns3 network engine with revision_id equals 0x21. Based on hns3 network
engine with revision_id equals 0x30, the hns3 PF PMD driver can support
up to 1280 queues, and hns3 VF PMD driver can support up to 128 queues.

The following points need to be modified to support maximizing queue
number and maintain better compatibility:
1) Maximizing the number of queues for hns3 PF and VF PMD driver In
   current version, VF is not supported when PF is driven by hns3 PMD
   driver. If maximum queue numbers allocated to PF PMD driver is less
   than total tqps_num allocated to this port, all remaining number of
   queues are mapped to VF function, which is unreasonable. So we fix
   that all remaining number of queues are mapped to PF function.

   Using RTE_LIBRTE_HNS3_MAX_TQP_NUM_PER_PF which comes from
   configuration file to limit the queue number allocated to PF device
   based on hns3 network engine with revision_id greater than 0x30. And
   PF device still keep the maximum 64 queues based on hns3 network
   engine with revision_id equals 0x21.

   Remove restriction of the macro HNS3_MAX_TQP_NUM_PER_FUNC on the
   maximum number of queues in hns3 VF PMD driver and use the value
   allocated by hns3 PF kernel netdev driver.

2) According to the queue number allocated to PF device, a variable
   array for Rx and Tx queue is dynamically allocated to record the
   statistics of Rx and Tx queues during the .dev_init ops
   implementation function.
3) Add an extended field in hns3_pf_res_cmd to support the case that
   numbers of queue are greater than 1024.
4) Use new base address of Rx or Tx queue if QUEUE_ID of Rx or Tx queue
   is greater than 1024.
5) Remove queue id mask and use all bits of actual queue_id as the
   queue_id to configure hardware.
6) Currently, 0~9 bits of qset_id in hns3_nq_to_qs_link_cmd used to
   record actual qset id and 10 bit as VLD bit are configured to
   hardware. So we also need to use 11~15 bits when actual qset_id is
   greater than 1024.
7) The number of queue sets based on different network engine are
   different. We use it to calculate group number and configure to
   hardware in the backpressure configuration.
8) Adding check operations for number of Rx and Tx queue user configured
   when mapping queue to tc Rx queue numbers under a single TC must be
   less than rss_size_max supported by a single TC. Rx and Tx queue
   numbers are allocated to every TC by average. So Rx and Tx queue
   numbers must be an integer multiple of 2, or redundant queues are not
   available.
9) We can specify which packets enter the queue with a specific queue
   number, when creating flow table rules by rte_flow API. Currently,
   driver uses 0~9 bits to record the queue_id. So it is necessary to
   extend one bit field to record queue_id and configure to hardware, if
   the queue_id is greater than 1024.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: expand number of queues for one TC up to 512
Huisong Li [Tue, 29 Sep 2020 12:01:09 +0000 (20:01 +0800)]
net/hns3: expand number of queues for one TC up to 512

The maximum number of queues for one TC hns3 PF PMD driver supported is
64 based on hns3 network engine with revision_id equals 0x21, while it
is expanded up to 512 on hns3 network engine with revision_id equals
0x30.

So the following points need to be modified to maintain better
compatibility.
1) Using a extended rss_size_max field as the maximum queue number of
   one TC PF driver supported.
2) The data type of the RSS redirection table needs to be changed from
   uint8_t to uint16_t.
3) rss_tc_mode modification
   The bitwidth of tc_offset, meaning the rx queue index, has to expand
   from 10 bit to 11 bits. The tc_size, meaning the exponent with base 2
   of queues supported on TC, needs to expand from 3 bits to 4 bits.
4) RSS indirection table modification
   Currently, a field with 7 bits width is used to record the queue
   index for RSS indirection table. It means that PF needs to expand the
   queue index field to 9 bits. As the RSS indirection table config
   command reserved 4 bytes to configure the RSS queue index, a extern
   field can be added. So an entries of RSS indirection table queue
   index has two fields to set: rss_result_l and rss_result_h, while
   rss_result_l records the lower 8 bits and rss_result_h records the
   higher 1 bit.

In addition, 2~4 modifications is also compatible with hns3 VF PMD
driver.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/enic: share flow actions with same signature
John Daley [Wed, 30 Sep 2020 03:45:04 +0000 (20:45 -0700)]
net/enic: share flow actions with same signature

Flow actions are a limited resource on the Cisco VIC, but they
can be shared between flows if they are exactly the same.
Use a hash table and a reference count in the PMD to enable sharing
actions with the same signature between flows.

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
4 years agomaintainers: update for MCS lock
Honnappa Nagarahalli [Thu, 8 Oct 2020 23:13:59 +0000 (18:13 -0500)]
maintainers: update for MCS lock

Updating MAINTAINERS file for MCS lock.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Phil Yang <phil.yang@arm.com>
4 years agoeal: fix experimental block for 20.11
David Marchand [Thu, 8 Oct 2020 12:49:27 +0000 (14:49 +0200)]
eal: fix experimental block for 20.11

In EAL, we try to sort the experimental symbols per the release they
were introduced in.

Fixes: 8929de043eb4 ("service: retrieve lcore active state")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
4 years agoexamples/pipeline: fix files for table update
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:50 +0000 (21:37 +0100)]
examples/pipeline: fix files for table update

Coverity issue: 362744, 362745, 362882
Fixes: 5074e1d551 ("examples/pipeline: add configuration commands")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agopipeline: fix instruction config free
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:55 +0000 (21:37 +0100)]
pipeline: fix instruction config free

Coverity issue: 362901
Fixes: a1711f948d ("pipeline: add SWX Rx and extract instructions")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agopipeline: fix unused variable
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:54 +0000 (21:37 +0100)]
pipeline: fix unused variable

Coverity issue: 362855
Fixes: 75634474ca ("pipeline: add SWX instruction verifier")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agopipeline: fix memory free
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:52 +0000 (21:37 +0100)]
pipeline: fix memory free

Coverity issue: 362796, 362804, 362819, 362836, 362858, 362865, 362869
Fixes: 3ca60ceed7 ("pipeline: add SWX pipeline specification file")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agopipeline: fix argument check
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:51 +0000 (21:37 +0100)]
pipeline: fix argument check

Coverity issue: 362789
Fixes: 3ca60ceed7 ("pipeline: add SWX pipeline specification file")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agopipeline: fix resource leak
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:53 +0000 (21:37 +0100)]
pipeline: fix resource leak

Coverity issue: 362812
Fixes: b32c0a2c5e ("pipeline: add SWX table update high level API")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agopipeline: fix memory leak
Cristian Dumitrescu [Tue, 6 Oct 2020 20:37:49 +0000 (21:37 +0100)]
pipeline: fix memory leak

Coverity issue: 362741
Fixes: b32c0a2c5e ("pipeline: add SWX table update high level API")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
4 years agoexamples/ioat: fix stats print
Kevin Laatz [Thu, 17 Sep 2020 13:07:40 +0000 (14:07 +0100)]
examples/ioat: fix stats print

Currently some of the status string at the top of the stats output is being
cut off. To fix this, the status string array size has been increased.
In addition to this, the "\n" has been moved to the printf, rather than
having it in the last string, in case of future formatting issues due to
truncation.

Bugzilla ID: 536
Fixes: 632bcd9b5d4f ("examples/ioat: print statistics")
Cc: stable@dpdk.org
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agoraw/ioat: add fill operation
Kevin Laatz [Thu, 8 Oct 2020 09:51:33 +0000 (10:51 +0100)]
raw/ioat: add fill operation

Add fill operation enqueue support for IOAT and IDXD. The fill enqueue is
similar to the copy enqueue, but takes a 'pattern' rather than a source
address to transfer to the destination address. This patch also includes an
additional test case for the new operation type.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: clean up use of common test function
Bruce Richardson [Thu, 8 Oct 2020 09:51:32 +0000 (10:51 +0100)]
raw/ioat: clean up use of common test function

Now that all devices can pass the same set of unit tests, eliminate the
temporary idxd_rawdev_test function and move the prototype for
ioat_rawdev_test to the proper internal header file, to be used by all
device instances.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add xstats tracking for idxd device
Bruce Richardson [Thu, 8 Oct 2020 09:51:31 +0000 (10:51 +0100)]
raw/ioat: add xstats tracking for idxd device

Add update of the relevant stats for the data path functions and point the
overall device struct xstats function pointers to the existing ioat
functions.

At this point, all necessary hooks for supporting the existing unit tests
are in place so call them for each device.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: move xstats functions to common file
Bruce Richardson [Thu, 8 Oct 2020 09:51:30 +0000 (10:51 +0100)]
raw/ioat: move xstats functions to common file

The xstats functions can be used by all ioat devices so move them from the
ioat_rawdev.c file to ioat_common.c, and add the function prototypes to the
internal header file.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: create separate statistics structure
Bruce Richardson [Thu, 8 Oct 2020 09:51:29 +0000 (10:51 +0100)]
raw/ioat: create separate statistics structure

Rather than having the xstats as fields inside the main driver structure,
create a separate structure type for them.

As part of the change, when updating the stats functions referring to the
stats by the old path, we can simplify them to use the id to directly index
into the stats structure, making the code shorter and simpler.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add info query for idxd device
Bruce Richardson [Thu, 8 Oct 2020 09:51:28 +0000 (10:51 +0100)]
raw/ioat: add info query for idxd device

Add the info get function for DSA devices, returning just the ring size
info about the device, same as is returned for existing IOAT/CBDMA devices.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add data path for idxd device
Bruce Richardson [Thu, 8 Oct 2020 09:51:27 +0000 (10:51 +0100)]
raw/ioat: add data path for idxd device

Add support for doing copies using DSA hardware. This is implemented by
just switching on the device type field at the start of the inline
functions. Since there is no hardware which will have both device types
present this branch will always be predictable after the first call,
meaning it has little to no perf penalty.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: start and stop idxd device
Bruce Richardson [Thu, 8 Oct 2020 09:51:26 +0000 (10:51 +0100)]
raw/ioat: start and stop idxd device

Add the start and stop functions for DSA hardware devices using the
vfio/uio kernel drivers. For vdevs using the idxd kernel driver, the device
must be started using sysfs before the device node appears for vdev use -
making start/stop functions in the driver unnecessary.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: configure idxd devices
Bruce Richardson [Thu, 8 Oct 2020 09:51:25 +0000 (10:51 +0100)]
raw/ioat: configure idxd devices

Add configure function for idxd devices, taking the same parameters as the
existing configure function for ioat. The ring_size parameter is used to
compute the maximum number of bursts to be supported by the driver, given
that the hardware works on individual bursts of descriptors at a time.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add datapath data structures for idxd devices
Bruce Richardson [Thu, 8 Oct 2020 09:51:24 +0000 (10:51 +0100)]
raw/ioat: add datapath data structures for idxd devices

Add in the relevant data structures for the data path for DSA devices. Also
include a device dump function to output the status of each device.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: probe idxd vdev
Kevin Laatz [Thu, 8 Oct 2020 09:51:23 +0000 (10:51 +0100)]
raw/ioat: probe idxd vdev

For each vdev (DSA work queue) instance, create a rawdev instance.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: probe idxd PCI
Bruce Richardson [Thu, 8 Oct 2020 09:51:22 +0000 (10:51 +0100)]
raw/ioat: probe idxd PCI

When a matching device is found via PCI probe create a rawdev instance for
each queue on the hardware. Use empty self-test function for these devices
so that the overall rawdev_autotest does not report failures.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: include example configuration script
Bruce Richardson [Thu, 8 Oct 2020 09:51:21 +0000 (10:51 +0100)]
raw/ioat: include example configuration script

Devices managed by the idxd kernel driver must be configured for DPDK use
before it can be used by the ioat driver. This example script serves both
as a quick way to get the driver set up with a simple configuration, and as
the basis for users to modify it and create their own configuration
scripts.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: introduce vdev probe for DSA/idxd device
Kevin Laatz [Thu, 8 Oct 2020 09:51:20 +0000 (10:51 +0100)]
raw/ioat: introduce vdev probe for DSA/idxd device

The Intel DSA devices can be exposed to userspace via kernel driver, so can
be used without having to bind them to vfio/uio. Therefore we add support
for using those kernel-configured devices as vdevs, taking as parameter the
individual HW work queue to be used by the vdev.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add skeleton for VFIO/UIO based DSA device
Bruce Richardson [Thu, 8 Oct 2020 09:51:19 +0000 (10:51 +0100)]
raw/ioat: add skeleton for VFIO/UIO based DSA device

Add in the basic probe/remove skeleton code for DSA devices which are bound
directly to vfio or uio driver. The kernel module for supporting these uses
the "idxd" name, so that name is used as function and file prefix to avoid
conflict with existing "ioat" prefixed functions.

Since we are adding new files to the driver and there will be common
definitions shared between the various files, we create a new internal
header file ioat_private.h to hold common macros and function prototypes.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agousertools: support binding Intel DSA device
Kevin Laatz [Thu, 8 Oct 2020 09:51:18 +0000 (10:51 +0100)]
usertools: support binding Intel DSA device

Intel Data Streaming Accelerator (Intel DSA) is a high-performance data
copy and transformation accelerator which will be integrated in future
Intel processors [1].

Add DSA device support to dpdk-devbind.py script.

[1] https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: make HW register spec private
Bruce Richardson [Thu, 8 Oct 2020 09:51:17 +0000 (10:51 +0100)]
raw/ioat: make HW register spec private

Only a few definitions from the hardware spec are actually used in the
driver runtime, so we can copy over those few and make the rest of the spec
a private header in the driver.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add separate API for fence call
Bruce Richardson [Thu, 8 Oct 2020 09:51:16 +0000 (10:51 +0100)]
raw/ioat: add separate API for fence call

Rather than having the fence signalled via a flag on a descriptor - which
requires reading the docs to find out whether the flag needs to go on the
last descriptor before, or the first descriptor after the fence - we can
instead add a separate fence API call. This becomes unambiguous to use,
since the fence call explicitly comes between two other enqueue calls. It
also allows more freedom of implementation in the driver code.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: rename functions to be operation-agnostic
Bruce Richardson [Thu, 8 Oct 2020 09:51:15 +0000 (10:51 +0100)]
raw/ioat: rename functions to be operation-agnostic

Since the hardware supported by the ioat driver is capable of operations
other than just copies, we can rename the doorbell and completion-return
functions to not have "copies" in their names. These functions are not
copy-specific, and so would apply for other operations which may be added
later to the driver.

Also add a suitable warning using deprecation attribute for any code using
the old functions names.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: split header file for readability
Bruce Richardson [Thu, 8 Oct 2020 09:51:14 +0000 (10:51 +0100)]
raw/ioat: split header file for readability

Rather than having a single long complicated header file for general use we
can split things so that there is one header with all the publicly needed
information - data structs and function prototypes - while the rest of the
internal details are put separately. This makes it easier to read,
understand and use the APIs.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: add flag to control copying handle parameters
Cheng Jiang [Thu, 8 Oct 2020 09:51:13 +0000 (10:51 +0100)]
raw/ioat: add flag to control copying handle parameters

Add a flag which controls whether rte_ioat_enqueue_copy and
rte_ioat_completed_copies function should process handle parameters. Not
doing so can improve the performance when handle parameters are not
necessary.

Signed-off-by: Cheng Jiang <cheng1.jiang@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: include extra info in test errors
Bruce Richardson [Thu, 8 Oct 2020 09:51:12 +0000 (10:51 +0100)]
raw/ioat: include extra info in test errors

In case of any failures, include the function name and the line number of
the error message in the message, to make tracking down the failure easier.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: enable use from C++
Bruce Richardson [Thu, 8 Oct 2020 09:51:11 +0000 (10:51 +0100)]
raw/ioat: enable use from C++

To allow the header file to be used from C++ code we need to ensure all
typecasts are explicit, and include an 'extern "C"' guard.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agoraw/ioat: fix missing close function
Kevin Laatz [Thu, 8 Oct 2020 09:51:10 +0000 (10:51 +0100)]
raw/ioat: fix missing close function

When rte_rawdev_pmd_release() is called, rte_rawdev_close() looks for a
dev_close function for the device causing a segmentation fault when no
close() function is implemented for a driver.

This patch resolves the issue by adding a stub function ioat_dev_close().

Fixes: f687e842e328 ("raw/ioat: introduce IOAT driver")
Cc: stable@dpdk.org
Reported-by: Sunil Pai G <sunil.pai.g@intel.com>
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Sunil Pai G <sunil.pai.g@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agodoc: add ioat driver to API index
Bruce Richardson [Thu, 8 Oct 2020 09:51:09 +0000 (10:51 +0100)]
doc: add ioat driver to API index

Add the ioat driver to the doxygen documentation.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
4 years agopmdinfogen: fix build with gcc 11
Ferruh Yigit [Mon, 21 Sep 2020 13:38:30 +0000 (14:38 +0100)]
pmdinfogen: fix build with gcc 11

Error observed with gcc 11 under development
gcc (GCC) 11.0.0 20200920 (experimental)

build error:
In file included from ../buildtools/pmdinfogen/pmdinfogen.c:17:
../buildtools/pmdinfogen/pmdinfogen.c: In function ‘parse_elf’:
../buildtools/pmdinfogen/pmdinfogen.h:78:1:
warning: this ‘else’ clause does not guard...
[-Wmisleading-indentation]
   78 | else \
      | ^~~~
../buildtools/pmdinfogen/pmdinfogen.h:83:35:
note: in expansion of macro ‘CONVERT_NATIVE’
   83 | #define TO_NATIVE(fend, width, x) CONVERT_NATIVE(fend, width, x)
      |                                   ^~~~~~~~~~~~~~
../buildtools/pmdinfogen/pmdinfogen.c:152:28:
note: in expansion of macro ‘TO_NATIVE’
  152 |         hdr->e_type      = TO_NATIVE(endian, 16, hdr->e_type);
      |                            ^~~~~~~~~
../buildtools/pmdinfogen/pmdinfogen.h:80:9:
note: ...this statement, but the latter is misleadingly indented
as if it were guarded by the ‘else’
   80 |         ___x; \
      |         ^~~~

Fixes: 98b0fdb0ffc6 ("pmdinfogen: add buildtools and pmdinfogen utility")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
4 years agoapp/testpmd: fix build with gcc 11
Ferruh Yigit [Mon, 21 Sep 2020 13:38:29 +0000 (14:38 +0100)]
app/testpmd: fix build with gcc 11

Error observed with gcc 11 under development
gcc (GCC) 11.0.0 20200920 (experimental)

../app/test-pmd/config.c:1777:61:
warning: argument 3 of type ‘const uint32_t[n]’
{aka ‘const unsigned int[n]’} declared as a variable length
array [-Wvla-parameter]
 1777 | port_flow_list(portid_t port_id, uint32_t n,
  const uint32_t group[n])
      |                 ~~~~~~~~~~~~~~~^~~~~~~~
In file included from ../app/test-pmd/config.c:53:
../app/test-pmd/testpmd.h:764:67:
note: previously declared as a pointer ‘const uint32_t *’
{aka ‘const unsigned int *’}
  764 | void port_flow_list(portid_t port_id, uint32_t n,
   const uint32_t *group);
      |                         ~~~~~~~~~~~~~~~~^~~~~

Fixes: 938a184a1870 ("app/testpmd: implement basic support for flow API")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Asaf Penso <asafp@nvidia.com>
4 years agotimer: add limitation note for sync stop and reset
Erik Gabriel Carrillo [Wed, 9 Sep 2020 14:41:14 +0000 (09:41 -0500)]
timer: add limitation note for sync stop and reset

If a timer's callback function calls rte_timer_reset_sync() or
rte_timer_stop_sync() on another timer that is in the RUNNING state and
owned by the current lcore, the *_sync() calls will loop indefinitely.

Relatedly, if a timer's callback function calls *_sync() on another
timer that is in the RUNNING state and is owned by a different lcore,
but a timer callback function runs on that different lcore and calls
*_sync() on a timer that is in the RUNNING state and owned by the
current lcore, the two lcores will loop indefinitely.

Add a note in the rte_timer_stop_sync and rte_timer_reset_sync
documentation that indicates that these APIs should not be used inside
timer callback functions in order to avoid the hangs described above,
and suggests an alternative.

Bugzilla ID: 491
Cc: stable@dpdk.org
Signed-off-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
4 years agodoc: add stack mempool guide
Gage Eads [Wed, 7 Oct 2020 14:18:32 +0000 (09:18 -0500)]
doc: add stack mempool guide

This guide describes the two stack modes, their tradeoffs, and (via a
reference to the mempool guide) how to enable them.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>