dpdk.git
2 years agonet/netvsc: fix hot adding multiple VF PCI devices
Long Li [Thu, 24 Mar 2022 17:46:17 +0000 (10:46 -0700)]
net/netvsc: fix hot adding multiple VF PCI devices

This patch fixes two issues with hot removing/adding a VF PCI device:
1. The original device argument is lost when it's hot added
2. If there are multiple VFs hot adding at the same time, some of the
   VFs may not get added successfully because only one single VF status
   is stored in the netvsc.

Fix these by storing the original device arguments and maintain a list
of hot add contexts to deal with multiple VF devices.

Fixes: a2a23a794b ("net/netvsc: support VF device hot add/remove")
Cc: stable@dpdk.org
Signed-off-by: Long Li <longli@microsoft.com>
2 years agoci: build some job with ASan
David Marchand [Thu, 5 May 2022 09:29:52 +0000 (11:29 +0200)]
ci: build some job with ASan

Enable ASan, this can greatly help identify leaks and buffer overflows.
Running unit tests relying on multiprocess is unreliable with ASan
enabled, so skip them.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2 years agotest/mem: disable ASan when accessing unallocated memory
David Marchand [Thu, 5 May 2022 09:29:51 +0000 (11:29 +0200)]
test/mem: disable ASan when accessing unallocated memory

As described in bugzilla, ASan reports accesses to all memory segment as
invalid, since those parts have not been allocated with rte_malloc.
Move __rte_no_asan to rte_common.h and disable ASan on a part of the test.

Bugzilla ID: 880
Fixes: 6cc51b1293ce ("mem: instrument allocator for ASan")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2 years agotest/hash: report non HTM numbers for single thread
Stanislaw Kardach [Tue, 10 May 2022 11:57:34 +0000 (13:57 +0200)]
test/hash: report non HTM numbers for single thread

In hash_readwrite_perf_autotest a single read and write operation is
benchmarked for both HTM and non HTM cases. However the result summary
only shows the HTM value. Therefore add the non HTM value for
completeness.

Fixes: 0eb3726ebcf1 ("test/hash: add test for read/write concurrency")

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
2 years agomaintainers: update for Intel i40e
Beilei Xing [Tue, 12 Apr 2022 02:02:57 +0000 (10:02 +0800)]
maintainers: update for Intel i40e

Add Yuying as Intel i40e maintainer.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Yuying Zhang <yuying.zhang@intel.com>
2 years agomaintainers: update for Intel igc
Haiyue Wang [Fri, 8 Apr 2022 05:58:17 +0000 (13:58 +0800)]
maintainers: update for Intel igc

Junfeng and Simei have been appointed the new maintainers for the igc
PMD. Update the MAINTAINERS file to reflect this.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Simei Su <simei.su@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2 years agomaintainers: update for Intel ixgbe
Haiyue Wang [Fri, 8 Apr 2022 05:58:16 +0000 (13:58 +0800)]
maintainers: update for Intel ixgbe

Qiming and Wenjun have been appointed the new maintainers for the ixgbe
PMD. Update the MAINTAINERS file to reflect this.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Wenjun Wu <wenjun1.wu@intel.com>
2 years agomaintainers: update for Intel e1000
Haiyue Wang [Fri, 8 Apr 2022 05:58:15 +0000 (13:58 +0800)]
maintainers: update for Intel e1000

Simei and Wenjun have been appointed the new maintainers for the e1000
PMD. Update the MAINTAINERS file to reflect this.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Simei Su <simei.su@intel.com>
Acked-by: Wenjun Wu <wenjun1.wu@intel.com>
2 years agomaintainers: update for vmxnet3 driver
Jochen Behrens [Fri, 6 May 2022 20:06:31 +0000 (20:06 +0000)]
maintainers: update for vmxnet3 driver

Make Jochen Behrens the maintainer of the net/vmxnet3 device
driver as Yong Wang is not working on vmxnet3 any more.

Signed-off-by: Jochen Behrens <jbehrens@vmware.com>
Acked-by: Yong Wang <yongwang@vmware.com>
2 years agomaintainers: update email address
Konstantin Ananyev [Thu, 21 Apr 2022 15:20:59 +0000 (16:20 +0100)]
maintainers: update email address

Use new email address.

Signed-off-by: Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>
Acked-by: John McNamara <john.mcnamara@intel.com>
2 years agoexamples/l2fwd-crypto: fix stats refresh rate
Raja Zidane [Thu, 7 Apr 2022 11:42:49 +0000 (14:42 +0300)]
examples/l2fwd-crypto: fix stats refresh rate

TIMER_MILLISECOND is defined as the number of cpu cycles per millisecond,
current definition is correct for cores with frequency of 2GHZ, for cores
with different frequency, it caused different periods between refresh,
(i.e. the definition is about 14ms on ARM cores).
The devarg that stated the period between stats print was not used,
instead, it was always defaulted to 10 seconds (on 2GHZ core).

Use DPDK API to get CPU frequency, to define TIMER_MILLISECOND.
Use the refresh period devarg instead of defaulting to 10s always.

Fixes: 387259bd6c67 ("examples/l2fwd-crypto: add sample application")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocompress/octeontx: support OCTEON TX2 SoC family
Mahipal Challa [Mon, 28 Feb 2022 03:40:35 +0000 (09:10 +0530)]
compress/octeontx: support OCTEON TX2 SoC family

The octeontx2 9xxx SoC family support is added.

Signed-off-by: Mahipal Challa <mchalla@marvell.com>
Acked-by: Ashish Gupta <ashishg@marvell.com>
2 years agotest/crypto-perf: add vector file for AES-GCM
Archana Muniganti [Fri, 8 Apr 2022 10:18:35 +0000 (15:48 +0530)]
test/crypto-perf: add vector file for AES-GCM

Added test vector file for AES-128-GCM for
64B and 512B length buffers.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agotest/crypto-perf: populate mbuf in latency test
Archana Muniganti [Fri, 8 Apr 2022 10:18:34 +0000 (15:48 +0530)]
test/crypto-perf: populate mbuf in latency test

For decrypt, ICV mismatch can come as data is dummy and
latency will be calculated for error path. Hence populate
mbuf with test vector data.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocommon/dpaax: fix short MAC-I IV calculation for ZUC
Gagandeep Singh [Thu, 28 Apr 2022 11:47:33 +0000 (17:17 +0530)]
common/dpaax: fix short MAC-I IV calculation for ZUC

Fixing the IV calculation for ZUC based short MAC-I
as per the HW security engine guidelines.

Fixes: 73a24060cd70 ("crypto/dpaa2_sec: add sample PDCP descriptor APIs")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa_sec: move cdb preparation to session create
Gagandeep Singh [Thu, 28 Apr 2022 11:47:32 +0000 (17:17 +0530)]
crypto/dpaa_sec: move cdb preparation to session create

Driver is preparing the shared descriptor of session while
attaching the session to a queue pair.
It should be prepared on session create.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agobus/dpaa: remove unused thread-specific variables
Gagandeep Singh [Thu, 28 Apr 2022 11:47:31 +0000 (17:17 +0530)]
bus/dpaa: remove unused thread-specific variables

There are some crypto driver related thread specific
variables which are no longer used, so removing them.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa2_sec: fix operation status for simple FD
Gagandeep Singh [Thu, 28 Apr 2022 11:47:30 +0000 (17:17 +0530)]
crypto/dpaa2_sec: fix operation status for simple FD

Driver is not filling the operation status on dequeue
in case the FD is simple.

So setting the status as per the results.

Fixes: 0a23d4b6f4c2 ("crypto/dpaa2_sec: support protocol offload IPsec")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa2_sec: fix crypto operation pointer
Gagandeep Singh [Thu, 28 Apr 2022 11:47:29 +0000 (17:17 +0530)]
crypto/dpaa2_sec: fix crypto operation pointer

Driver is filling the crypto_op variable with an invalid value
for atomic and ordered events which can results into
segmentation fault.

This patch assigning the correct crypto_op and event buffer
pointers by extracting from FD.

Fixes: a77db24643b7 ("crypto/dpaa2_sec: support atomic queues")
Fixes: 4562de326d30 ("crypto/dpaa2_sec: support ordered queue")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa2_sec: create fle pool per queue pair
Gagandeep Singh [Thu, 28 Apr 2022 11:47:28 +0000 (17:17 +0530)]
crypto/dpaa2_sec: create fle pool per queue pair

Driver is creating a fle pool with a fixed number of
buffers for all queue pairs of a DPSECI object.
These fle buffers are equivalent to the number of descriptors.

In this patch, creating the fle pool for each queue pair
so that user can control the number of descriptors of a
queue pair using API rte_cryptodev_queue_pair_setup().

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa_sec: fix secondary process probing
Vanshika Shukla [Thu, 28 Apr 2022 11:47:27 +0000 (17:17 +0530)]
crypto/dpaa_sec: fix secondary process probing

DPAA hardware supports non-i/o performing secondary
applications only. So we do not have to probe crypto
devices in secondary applications.

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: stable@dpdk.org
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocommon/dpaax: remove obsolete code
Gagandeep Singh [Thu, 28 Apr 2022 11:47:26 +0000 (17:17 +0530)]
common/dpaax: remove obsolete code

Remove sec era 1 to 7 IPsec and caam operations code
as none of the NXP platform use it.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa_sec: replace use of old build macros
Gagandeep Singh [Thu, 28 Apr 2022 11:47:25 +0000 (17:17 +0530)]
crypto/dpaa_sec: replace use of old build macros

Use the newer security macros defined by meson.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa_sec: enable QI physically
Gagandeep Singh [Thu, 28 Apr 2022 11:47:24 +0000 (17:17 +0530)]
crypto/dpaa_sec: enable QI physically

To perform crypto operations on DPAA platform,
QI interface of HW must be enabled.
Earlier DPAA crypto driver was dependent on
kernel for QI enable. Now with this patch
there is no such dependency on kernel.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa2_sec: fix chained FD length in raw datapath
Gagandeep Singh [Thu, 28 Apr 2022 11:47:23 +0000 (17:17 +0530)]
crypto/dpaa2_sec: fix chained FD length in raw datapath

DPAA2 sec raw driver is calculating the wrong lengths while
creating the FD for chain.
This patch fixes lengths for chain FD.

Fixes: aa6ec1fd8443 ("crypto/dpaa2_sec: support authenc with raw buffer API")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa_sec: fix chained FD length in raw datapath
Gagandeep Singh [Thu, 28 Apr 2022 11:47:22 +0000 (17:17 +0530)]
crypto/dpaa_sec: fix chained FD length in raw datapath

DPAA sec raw driver is calculating the wrong lengths while
creating the FD for chain.
This patch fixes lengths for chain FD.

Fixes: 78156d38e112 ("crypto/dpaa_sec: support authonly and chain with raw API")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa2_sec: fix buffer pool ID check
Gagandeep Singh [Thu, 28 Apr 2022 11:47:21 +0000 (17:17 +0530)]
crypto/dpaa2_sec: fix buffer pool ID check

Simple fd rely on bpid of the buffers whereas
other FD types can support buffers without bpid
of pool.

So moving the bpid check to simple fd to mbuf
conversion function.

Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/dpaa2_sec: fix fle buffer leak
Gagandeep Singh [Thu, 28 Apr 2022 11:47:20 +0000 (17:17 +0530)]
crypto/dpaa2_sec: fix fle buffer leak

Driver allocates a fle buffer for each packet
before enqueue and free the buffer on dequeue. But in case if
there are enqueue failures, then code should free the fle buffers.

Fixes: 4562de326d30 ("crypto/dpaa2_sec: support ordered queue")
Fixes: 3ffce51a1f04 ("crypto/dpaa2_sec: add enqueue retry timeout")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agotest/crypto-perf: extend asymmetric crypto throughput test
Kiran Kumar K [Fri, 29 Apr 2022 06:23:15 +0000 (11:53 +0530)]
test/crypto-perf: extend asymmetric crypto throughput test

Extended support for asymmetric crypto perf throughput test.
Added support for new modulus lengths.
Added new parameter --modex-len.
Supported lengths are 60, 128, 255, 448. Default length is 128.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/mlx5: fix login cleanup
Raja Zidane [Mon, 18 Apr 2022 11:05:16 +0000 (14:05 +0300)]
crypto/mlx5: fix login cleanup

In case of a probing failure caused by wrong devarg provided,
login isn't destroyed when exiting.

Destroy login on failure.

Fixes: ba707cdb6da2 ("crypto/mlx5: fix queue size configuration")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocrypto/cnxk: prevent out-of-bound access in capabilities
Gowrishankar Muthukrishnan [Thu, 21 Apr 2022 07:58:19 +0000 (13:28 +0530)]
crypto/cnxk: prevent out-of-bound access in capabilities

In a situation where crypto_caps elements are checked only for
RTE_CRYPTO_OP_TYPE_UNDEFINED until valid op defined, there is
possibility for an out of bound access. Add this array by one
element for current capabilities.

Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agocrypto/cnxk: use set ctx operation for session destroy
Anoob Joseph [Mon, 25 Apr 2022 05:38:25 +0000 (11:08 +0530)]
crypto/cnxk: use set ctx operation for session destroy

Usage of flush and invalidate would involve delays to account
for flush delay. Use set_ctx operation instead. When set_ctx fails,
fall back to flush + invalidate scheme.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocommon/cnxk: add timeout for ctx write operation
Anoob Joseph [Mon, 25 Apr 2022 05:38:24 +0000 (11:08 +0530)]
common/cnxk: add timeout for ctx write operation

Add busy wait and polling for ctx write operation
rather than waiting with 1 ms delay.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: remove useless return code
Anoob Joseph [Mon, 25 Apr 2022 05:38:23 +0000 (11:08 +0530)]
crypto/cnxk: remove useless return code

The function doesn't return error. Remove return.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: support AES-GMAC
Archana Muniganti [Mon, 25 Apr 2022 05:38:22 +0000 (11:08 +0530)]
crypto/cnxk: support AES-GMAC

Added lookaside IPsec AES-GMAC support in CNXK PMD.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: support AH mode
Archana Muniganti [Mon, 25 Apr 2022 05:38:21 +0000 (11:08 +0530)]
crypto/cnxk: support AH mode

Added IPsec AH mode support in CN9K and CN10K PMD

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agosecurity: fix SA lifetime comments
Anoob Joseph [Wed, 27 Apr 2022 06:01:45 +0000 (11:31 +0530)]
security: fix SA lifetime comments

Fix comments to reflect the hard expiry fields.

Fixes: ad7515a39f2a ("security: add SA lifetime configuration")
Cc: stable@dpdk.org
Reported-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
2 years agocrypto/dpaa_sec: fix digest size
Gagandeep Singh [Thu, 17 Mar 2022 08:55:58 +0000 (14:25 +0530)]
crypto/dpaa_sec: fix digest size

DPAA crypto driver can support 64 bytes size digest size
for SHA512-HMAC.
This patch changes the value of macro max supported digest size to
64.

Fixes: c3e85bdcc6e6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agocommon/dpaax: remove dead code
Gagandeep Singh [Thu, 17 Mar 2022 08:55:57 +0000 (14:25 +0530)]
common/dpaax: remove dead code

This patch remove structural and logical dead code from
caamflib.

Coverity issue: 375251, 375258, 375261, 375267, 375269
Coverity issue: 375285, 373161, 375249, 375257

Fixes: 6127fff842a7 ("common/dpaax: remove outdated caamflib code")
Fixes: 81eb760d2207 ("common/dpaax/caamflib: remove some inline keys")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agotest/crypto: add AH AES-GMAC test vectors
Archana Muniganti [Fri, 8 Apr 2022 10:16:25 +0000 (15:46 +0530)]
test/crypto: add AH AES-GMAC test vectors

Added AES_GMAC test vectors along with combined mode support.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agotest/crypto: add AH test vectors
Archana Muniganti [Fri, 8 Apr 2022 10:16:24 +0000 (15:46 +0530)]
test/crypto: add AH test vectors

Added tunnel and transport AH known test vectors for
SHA256 HMAC.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agotest/crypto: add AH under combined mode
Archana Muniganti [Fri, 8 Apr 2022 10:16:23 +0000 (15:46 +0530)]
test/crypto: add AH under combined mode

Added auth only and null cipher + auth under combined mode
for following combinations.
1. Tunnel IPv4
2. Transport IPv4

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoci: add MinGW cross-compilation in GHA
David Marchand [Fri, 6 May 2022 11:57:36 +0000 (13:57 +0200)]
ci: add MinGW cross-compilation in GHA

Add mingw cross compilation in our public CI so that users with their
own github repository have a first level of checks for Windows compilation
before submitting to the mailing list.
This does not replace our better checks in other entities of the CI.

Only the helloworld example is compiled (same as what is tested in
test-meson-builds.sh).

Note: the mingw cross compilation toolchain (version 5.0) in Ubuntu
18.04 was broken (missing a ENOMSG definition).

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2 years agoci: switch to Ubuntu 20.04
David Marchand [Fri, 6 May 2022 11:57:35 +0000 (13:57 +0200)]
ci: switch to Ubuntu 20.04

Ubuntu 18.04 is now rather old.
Besides, other entities in our CI are also testing this distribution.

Switch to a newer Ubuntu release and benefit from more recent
tool(chain)s: for example, net/cnxk now builds fine and can be
re-enabled.

Note: Ubuntu 18.04 and 20.04 seem to preserve the same paths for the ARM
and PPC cross compilation toolchains, so we can use a single
configuration file (with the hope, future releases of Ubuntu will do the
same).

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agoeal: fix C++ include for device event and DMA
Tianhao Chai [Thu, 5 May 2022 04:39:35 +0000 (23:39 -0500)]
eal: fix C++ include for device event and DMA

Currently the "extern C" section ends right before rte_dev_dma_unmap
and other DMA function declarations, causing some C++ compilers to
produce C++ mangled symbols to rte_dev_dma_unmap instead of C symbols.
This leads to build failures later when linking a final executable
against this object.

Fixes: a753e53d517b ("eal: add device event monitor framework")
Cc: stable@dpdk.org
Signed-off-by: Tianhao Chai <cth451@gmail.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agomalloc: fix ASan handling for unmapped memory
Anatoly Burakov [Wed, 4 May 2022 14:31:58 +0000 (14:31 +0000)]
malloc: fix ASan handling for unmapped memory

Currently, when we free previously allocated memory, we mark the area as
"freed" for ASan purposes (flag 0xfd). However, sometimes, freeing a
malloc element will cause pages to be unmapped from memory and re-backed
with anonymous memory again. This may cause ASan's "use-after-free"
error down the line, because the allocator will try to write into
memory areas recently marked as "freed".

To fix this, we need to mark the unmapped memory area as "available",
and fixup surrounding malloc element header/trailers to enable later
malloc routines to safely write into new malloc elements' headers or
trailers.

Bugzilla ID: 994
Fixes: 6cc51b1293ce ("mem: instrument allocator for ASan")
Cc: stable@dpdk.org
Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
2 years agomem: skip attaching external memory in secondary process
Deepak Khandelwal [Thu, 21 Apr 2022 09:11:21 +0000 (14:41 +0530)]
mem: skip attaching external memory in secondary process

Currently, EAL init in secondary processes will attach all fbarrays
in the memconfig to have access to the primary process's page tables.
However, fbarrays corresponding to external memory segments should
not be attached at initialization, because this will happen as part
of `rte_extmem_attach` [1] or `rte_malloc_heap_memory_attach` [2] calls.

1: https://doc.dpdk.org/api/rte__memory_8h.html#a2796da68de6825f8edf53759f8e4d230
2: https://doc.dpdk.org/api/rte__malloc_8h.html#af6360dea35bdf162feeb2b62cf149fd3

Fixes: ff3619d6244b ("malloc: allow attaching to external memory chunks")
Cc: stable@dpdk.org
Suggested-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: Deepak Khandelwal <deepak.khandelwal@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2 years agotest/table: fix buffer overflow on lpm entry
Vladimir Medvedkin [Thu, 21 Apr 2022 17:35:27 +0000 (17:35 +0000)]
test/table: fix buffer overflow on lpm entry

This patch fixes stack buffer overflow reported by ASan.

Bugzilla ID: 820
Fixes: 5205954791cb ("app/test: packet framework unit tests")
Cc: stable@dpdk.org
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agonet/mlx5: fix LRO configuration in drop Rx queue
Michael Baum [Mon, 25 Apr 2022 09:30:20 +0000 (12:30 +0300)]
net/mlx5: fix LRO configuration in drop Rx queue

The driver wrongly set the LRO configurations to the TIR of the DevX
drop queue even when LRO is not supported.
Actually, the LRO configuration is not relevant to the drop queue at
all.

This causes failure in the initialization of the device, which doesn't
support LRO where the drop queue is created.

Probably, the drop queue creation by DevX missed the fact that LRO is
set by default in the TIR creation function and didn't unset it in the
drop queue case like other cases that unset LRO.

Move the default LRO configuration to unset it and set it only in the
case of all the TIR queues configured with LRO.

Fixes: bc5bee028ebc ("net/mlx5: create drop queue using DevX")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: fix LRO validation in Rx setup
Michael Baum [Mon, 25 Apr 2022 09:30:19 +0000 (12:30 +0300)]
net/mlx5: fix LRO validation in Rx setup

The mlx5_rx_queue_setup() get LRO offload from user.

When LRO is configured, the LRO flag in rxq_data is set to 1.

This patch adds validation to make sure the LRO is supported.

Fixes: 17ed314 ("net/mlx5: allow LRO per Rx queue")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: fix RSS hash types adjustment
Dariusz Sosnowski [Thu, 21 Apr 2022 20:36:56 +0000 (20:36 +0000)]
net/mlx5: fix RSS hash types adjustment

When an indirect action was created with an RSS action configured to
hash on both source and destination L3 addresses (or L4 ports), it caused
shared hrxq to be configured to hash only on destination address
(or port).

This patch fixes this behavior by refining RSS types specified in
configuration before calculating hash types used for hrxq. Refining RSS
types removes *_SRC_ONLY and *_DST_ONLY flags if they are both set.

Fixes: 212d17b6a650 ("net/mlx5: fix missing shared RSS hash types")
Cc: stable@dpdk.org
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agonet/mlx5: fix Rx/Tx stats concurrency
Raja Zidane [Wed, 20 Apr 2022 15:32:17 +0000 (18:32 +0300)]
net/mlx5: fix Rx/Tx stats concurrency

Queue statistics are being continuously updated in Rx/Tx burst
routines while handling traffic. In addition to that, statistics
can be reset (written with zeroes) on statistics reset in other
threads, causing a race condition, which in turn could result in
wrong stats.

The patch provides an approach with reference values, allowing
the actual counters to be writable within Rx/Tx burst threads
only, and updating reference values on stats reset.

Fixes: 87011737b715 ("mlx5: add software counters")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agonet/mlx5: fix GTP handling in header modify action
Dariusz Sosnowski [Wed, 13 Apr 2022 11:18:31 +0000 (11:18 +0000)]
net/mlx5: fix GTP handling in header modify action

GTP items were ignored during conversion of modify header actions. This
caused modify TTL action to generate a wrong modify header command when
tunnel and inner headers used different IP versions.

This patch adds GTP item handling to modify header action conversion.

Fixes: 04233f36c712 ("net/mlx5: fix layer type in header modify action")
Cc: stable@dpdk.org
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agonet/mlx5: support MTU settings on Windows
Adham Masarwah [Sun, 10 Apr 2022 10:31:07 +0000 (13:31 +0300)]
net/mlx5: support MTU settings on Windows

Mlx5Devx library has new API's for setting and getting MTU.
Added new glue functions that wrap the new mlx5devx lib API's.
Implemented the os_ethdev callbacks to use the new glue
functions in Windows.

Signed-off-by: Adham Masarwah <adham@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: support promiscuous modes on Windows
Adham Masarwah [Sun, 10 Apr 2022 10:31:06 +0000 (13:31 +0300)]
net/mlx5: support promiscuous modes on Windows

Support of the set promiscuous modes by calling the new API
In Mlx5DevX Lib.
Added new glue API for Windows which will be used to communicate
with Windows driver to enable/disable PROMISC or ALLMC.

Signed-off-by: Adham Masarwah <adham@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: remove redundant check for hairpin queue
Michael Baum [Sun, 10 Apr 2022 09:25:28 +0000 (12:25 +0300)]
net/mlx5: remove redundant check for hairpin queue

The mlx5_rxq_is_hairpin() function checks whether RxQ type is Hairpin.
It is done by reading a flag in Rx control structure coming from
mlx5_rxq_ctrl_get() function.

The function verifies that the queue index is valid even though it has
been checked within the mlx5_rxq_ctrl_get() function.

This patch removes the redundant check.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: restrict Rx queue array access to boundary
Michael Baum [Sun, 10 Apr 2022 09:25:27 +0000 (12:25 +0300)]
net/mlx5: restrict Rx queue array access to boundary

The mlx5_rxq_get() function gets RxQ index and return RxQ priv
accordingly.

When it gets an invalid index, it accesses out of array bounds which
might cause undefined behavior.

This patch adds a check for invalid indexes before accessing to array.

Fixes: 0cedf34da78f ("net/mlx5: move Rx queue reference count")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: fix setting flags to external Rx queue
Michael Baum [Sun, 10 Apr 2022 09:25:26 +0000 (12:25 +0300)]
net/mlx5: fix setting flags to external Rx queue

The flow_drv_rxq_flags_set sets the Rx queue flags (Mark/Flag and Tunnel
Ptypes) according to the device flow.

It tries to get the RxQ control structure to update its ptype. However,
external RxQs don't have control structure to update and it may cause a
crash.

This patch add check whether this Queue is external.

Fixes: 311b17e669ab ("net/mlx5: support queue/RSS actions for external Rx queue")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: fix counter in non-termination meter
Shun Hao [Wed, 6 Apr 2022 08:54:01 +0000 (11:54 +0300)]
net/mlx5: fix counter in non-termination meter

In rte_flow, if a counter action is before a meter which has
non-termination policy, the counter value only includes packets not
being dropped.

This patch fixes this issue by differentiating the order of counter and
non-termination meter:
1. counter + meter, counts all packets hitting this flow.
2. meter + counter, only counts packets not being dropped.

Fixes: 51ec04dc7bcf ("net/mlx5: connect meter policy to created flows")
Cc: stable@dpdk.org
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: fix probing with secondary bonding member
Rongwei Liu [Wed, 6 Apr 2022 07:12:24 +0000 (10:12 +0300)]
net/mlx5: fix probing with secondary bonding member

Users can probe primary or secondary PCIe id when bonding is
configured.
1. -a 0a:00.0,representor=pf[0-1]vf[0-1], PMD probes 5 ports
totally: bonding device plus 4 representor ports.
2. -a 0a:00.1,representor=pf[0-1]vf[0-1], PMD only probes 2
representor ports.

Under the 2nd condition, bonding IB device doesn't have the same
PCIe id and PMD needs to check bonding relationship otherwise
probe failure.

Fixes: 6856efa54eea ("net/mlx5: fix PF leak on PCI probing failure")
Cc: stable@dpdk.org
Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agonet/mlx5: fix Tx when inlining is impossible
Dmitry Kozlyuk [Thu, 31 Mar 2022 14:38:41 +0000 (17:38 +0300)]
net/mlx5: fix Tx when inlining is impossible

When txq_inline_max is too large and an mbuf is multi-segment
it may be impossible to inline data and build a valid WQE,
because WQE length would be larger then HW can represent.
It is impossible to detect misconfiguration at startup,
because the condition depends on the mbuf composition.
The check on the data path to prevent the error
treated the length limit as expressed in 64B units,
while the calculated length and limit are in 16B units.
Fix the condition to avoid subsequent TxQ failure and recovery.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agocommon/mlx5: fix memory region range calculation
Dmitry Kozlyuk [Thu, 31 Mar 2022 14:33:16 +0000 (17:33 +0300)]
common/mlx5: fix memory region range calculation

MR end for a mempool chunk may be calculated incorrectly.
For example, for chunk with addr=1.5M and len=1M with 2M page size
the range would be [0, 2M), while the proper result is [0, 4M).
Fix the calculation.

Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: handle MPRQ incompatibility with external buffers
Alexander Kozyrev [Fri, 11 Mar 2022 23:08:25 +0000 (01:08 +0200)]
net/mlx5: handle MPRQ incompatibility with external buffers

Multi-Packet Rx queue uses PMD-managed buffers to store packets.
These buffers are externally attached to user mbufs.
This conflicts with the feature that allows using user-managed
externally attached buffers in an application.
Fall back to SPRQ in case external buffers mempool is configured.
The limitation is already documented in mlx5 guide.

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agonet/netvsc: fix calculation of checksums based on mbuf flag
Long Li [Thu, 24 Mar 2022 17:46:08 +0000 (10:46 -0700)]
net/netvsc: fix calculation of checksums based on mbuf flag

The netvsc should use RTE_MBUF_F_TX_L4_MASK and check the masked value
to decide the correct way to calculate checksums.

Not checking for RTE_MBUF_F_TX_L4_MASK results in incorrect RNDIS
packets sent to VSP and incorrect checksums calculated by the VSP.

Fixes: 4e9c73e96e ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org
Signed-off-by: Long Li <longli@microsoft.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@xilinx.com>
2 years agonet/iavf: support quanta size configuration
Wenjun Wu [Fri, 22 Apr 2022 01:43:00 +0000 (09:43 +0800)]
net/iavf: support quanta size configuration

This patch adds quanta size configuration support.
Quanta size should between 256 and 4096, and be a product of 64.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: support queue rate limit configuration
Wenjun Wu [Fri, 22 Apr 2022 01:42:59 +0000 (09:42 +0800)]
net/iavf: support queue rate limit configuration

This patch adds queue rate limit configuration support.
Only max bandwidth is supported.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: remove extra copy step in Rx bulk path
Kathleen Capella [Thu, 24 Mar 2022 22:11:32 +0000 (22:11 +0000)]
net/iavf: remove extra copy step in Rx bulk path

In the Rx bulk path, packets which are taken from the HW ring, are first
copied to the stage data structure and then later copied from the stage
to the rx_pkts array. For the number of packets requested immediately
by the receiving function, this two-step process adds extra overhead
that is not necessary.

Instead, put requested number of packets directly into the rx_pkts array
and only stage excess packets. On N1SDP with 1 core/port, l3fwd saw up
to 4% performance improvement. On x86, no difference in performance was
observed.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Suggested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice: fix raw flow input pattern parsing
Ting Xu [Mon, 18 Apr 2022 06:59:08 +0000 (14:59 +0800)]
net/ice: fix raw flow input pattern parsing

When parsing raw flow pattern in FDIR, the input parameter spec and
mask are used directly and the original value will be changed. It
will cause error if these values are used in other functions. In this
patch, temporary variables are created to store the spec and mask.

Fixes: 25be39cc1760 ("net/ice: enable protocol agnostic flow offloading in FDIR")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2 years agonet/ice: refactor parser usage
Qi Zhang [Thu, 7 Apr 2022 16:06:14 +0000 (12:06 -0400)]
net/ice: refactor parser usage

Not necessary to create / destroy a parser instance for every raw packet
rule. A global parser instance will be created in ice_flow_init and be
destroyed in ice_flow_uninit.

Also, ice_dev_udp_tunnel_port_add has been hooked to perform corresponding
parser configure. This also fix the issue that RSS engine can't support
VXLAN inner through raw packet filter.

Fixes: 1b9c68120a1c ("net/ice: enable protocol agnostic flow offloading in RSS")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xu Ting <ting.xu@intel.com>
2 years agonet/ice: add missing Tx burst mode name
Michael Pfeiffer [Mon, 4 Apr 2022 14:41:44 +0000 (16:41 +0200)]
net/ice: add missing Tx burst mode name

The function ice_xmit_pkts_vec_avx2_offload was left out in the list
of tx functions for ice_tx_burst_mode_get.

Fixes: 52ccdcf2fd41 ("net/ice: add AVX2 offload Tx")
Cc: stable@dpdk.org
Signed-off-by: Michael Pfeiffer <michael.pfeiffer@tu-ilmenau.de>
Suggested-by: Michael Rossberg <michael.rossberg@tu-ilmenau.de>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: populate error in flow director parser
Mike Pattrick [Tue, 22 Mar 2022 03:19:37 +0000 (23:19 -0400)]
net/i40e: populate error in flow director parser

Errors from i40e_flow_parse_fdir_pattern() can bubble up to
rte_flow_create. If rte_flow_error is not initialized a caller may
dereference error->message. This may be uninitialized memory, leading
to a segemntation fault.

Fixes: 4a072ad43442 ("net/i40e: fix flow director config after flow validate")
Cc: stable@dpdk.org
Signed-off-by: Mike Pattrick <mkp@redhat.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agonet/ice: improve performance of Rx timestamp offload
Wenjun Wu [Mon, 28 Feb 2022 07:36:07 +0000 (15:36 +0800)]
net/ice: improve performance of Rx timestamp offload

Previously, each time a burst of packets is received, SW reads HW
register and assembles it and the timestamp from descriptor together to
get the complete 64 bits timestamp.

This patch optimizes the algorithm. The SW only needs to check the
monotonicity of the low 32bits timestamp to avoid crossing borders.
Each time before SW receives a burst of packets, it should check the
time difference between current time and last update time to avoid
the low 32 bits timestamp cycling twice.

The patch proved a 50% ~ 70% single core performance improvement on a
main stream Xeon server, this fix the performance gap for some use cases.

Fixes: f9c561ffbccc ("net/ice: fix performance for Rx timestamp")
Cc: stable@dpdk.org
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: remove redundant number of packets check
Feifei Wang [Thu, 3 Mar 2022 01:53:43 +0000 (01:53 +0000)]
net/i40e: remove redundant number of packets check

For i40e_xmit_pkts_vec_xx function, it checks nb_pkts to ensure nb_pkts
does not cross rs_thresh.

However, in i40e_xmit_fixed_burst_vec_xx function, this check will be
performed again. To improve code, delete this redundant check.

Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: fix HW ring scan method selection
Steve Yang [Mon, 14 Mar 2022 09:31:46 +0000 (09:31 +0000)]
net/iavf: fix HW ring scan method selection

When setup Rx queue, the rxdid would be changed if it's
"IAVF_RXDID_LEGACY_0/1", that caused the scan HW ring used the wrong
function 'iavf_rx_scan_hw_ring_flex_rxd()'.

Ignore the rxdid changed when equals "IAVF_RXDID_LEGACY_0/1".

Fixes: 0ed16e01313e ("net/iavf: fix function pointer in multi-process")
Cc: stable@dpdk.org
Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2 years agonet/iavf: replace SMP barrier with thread fence in Rx
Kathleen Capella [Mon, 7 Mar 2022 19:26:44 +0000 (19:26 +0000)]
net/iavf: replace SMP barrier with thread fence in Rx

Replace the SMP barrier with atomic thread fence for iavf hw ring scan
in the bulk Rx path.

This patch introduces a change to the iavf driver that was already added
to the i40e driver [1] as part of the adoption of the use of compiler
atomics.

[1]Commit 8649e2356689 ("net/i40e: replace SMP barrier with thread fence
in Rx")

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Reviewed-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ixgbe: retry misbehaving SFP read
Stephen Douthit [Wed, 23 Mar 2022 20:03:46 +0000 (16:03 -0400)]
net/ixgbe: retry misbehaving SFP read

Some XGS-PON SFPs have been observed ACKing I2C reads and returning
uninitialized garbage while their uC boots.  This can lead to the SFP ID
code marking an otherwise working SFP module as unsupported if a bogus
ID value is read while its internal PHY/microcontroller is still
booting.

Retry the ID read several times looking not just for NAK, but also for a
valid ID field.

Since the device isn't NAKing the transaction, the existing longer retry
code in ixgbe_read_i2c_byte_generic_int() doesn't apply here.

Signed-off-by: Stephen Douthit <stephend@silicom-usa.com>
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Reviewed-by: Haiyue Wang <haiyue.wang@intel.com>
2 years agonet/ice: support 256 queues
Wenjun Wu [Thu, 24 Mar 2022 05:12:32 +0000 (13:12 +0800)]
net/ice: support 256 queues

256 queues can be allowed now. This patch improves the code
to support 256 queues for per PF.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agotest/bpf: skip test if libpcap is unavailable
Tyler Retzlaff [Tue, 22 Mar 2022 07:12:35 +0000 (00:12 -0700)]
test/bpf: skip test if libpcap is unavailable

test_bpf_convert is being conditionally registered depending on the
presence of RTE_HAS_LIBPCAP except the UT unconditionally lists it as a
test to run.

When the UT runs test_bpf_convert test-dpdk can't find the registration
and assumes the DPDK_TEST environment variable hasn't been defined
resulting in test-dpdk dropping to interactive mode and subsequently
waiting for the remainder of the UT fast-test timeout period before
reporting the test as having timed out.

* unconditionally register test_bpf_convert,
* if ! RTE_HAS_LIBPCAP provide a stub test_bpf_convert that reports the
  test is skipped similar to that done with the test_bpf test.

Fixes: 2eccf6afbea9 ("bpf: add function to convert classic BPF to DPDK BPF")
Cc: stable@dpdk.org
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agoeal/windows: set main lcore affinity
Tyler Retzlaff [Thu, 14 Apr 2022 12:43:43 +0000 (05:43 -0700)]
eal/windows: set main lcore affinity

Add missing code to affinitize main_lcore from lcore configuration.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agoeal: emit warning for unused trylock return value
Mattias Rönnblom [Mon, 11 Apr 2022 15:15:58 +0000 (17:15 +0200)]
eal: emit warning for unused trylock return value

Mark the trylock family of spinlock functions with
__rte_warn_unused_result.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agoeal: add macro to warn for unused function return values
Mattias Rönnblom [Mon, 11 Apr 2022 15:15:57 +0000 (17:15 +0200)]
eal: add macro to warn for unused function return values

This patch adds a wrapper macro __rte_warn_unused_result for the
warn_unused_result function attribute.

Marking a function __rte_warn_unused_result will make the compiler
emit a warning in case the caller does not use the function's return
value.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agoexamples/bond: fix invalid use of trylock
Mattias Rönnblom [Mon, 11 Apr 2022 15:15:59 +0000 (17:15 +0200)]
examples/bond: fix invalid use of trylock

The conditional rte_spinlock_trylock() was used as if it is an
unconditional lock operation in a number of places.

Fixes: cc7e8ae84faa ("examples/bond: add example application for link bonding mode 6")
Cc: stable@dpdk.org
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agoeal: factorize lcore main loop
David Marchand [Tue, 5 Apr 2022 16:34:47 +0000 (18:34 +0200)]
eal: factorize lcore main loop

All OS implementations provide the same main loop.
Introduce helpers (shared for Linux and FreeBSD) to handle synchronisation
between main and threads and factorize the rest as common code.
Thread id are now logged as string in a common format across OS.

Note:
- this change also fixes Windows EAL: worker threads cpu affinity was
  incorrectly reported in log.

- libabigail flags this change as breaking ABI in clang builds:
  1 function with some indirect sub-type change:

  [C] 'function int rte_eal_remote_launch(int (void*)*, void*, unsigned
      int)' at eal_common_launch.c:35:1 has some indirect sub-type
      changes:
    parameter 1 of type 'int (void*)*' changed:
      in pointed to type 'function type int (void*)' at rte_launch.h:31:1:
        entity changed from 'function type int (void*)' to 'typedef
          lcore_function_t' at rte_launch.h:31:1
        type size hasn't changed

  This is being investigated on libabigail side.
  For now, we don't have much choice but to waive reports on this symbol.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agoeal: cleanup lcore ID hand-over
David Marchand [Tue, 5 Apr 2022 16:34:46 +0000 (18:34 +0200)]
eal: cleanup lcore ID hand-over

So far, a worker thread has been using its thread_id to discover which
lcore has been assigned to it.

On the other hand, as noted by Tyler, the pthread API does not strictly
guarantee that a new thread won't start running eal_thread_loop before
pthread_create writes to &lcore_config[xx].thread_id.

Though all OS implementations supported in DPDK (recently) ensure this
property, it is more robust to have the main thread directly pass
the worker thread lcore.

Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agomaintainers: update email address
Ferruh Yigit [Mon, 11 Apr 2022 18:05:07 +0000 (19:05 +0100)]
maintainers: update email address

Use new email address.

Signed-off-by: Ferruh Yigit <ferruh.yigit@xilinx.com>
2 years agogpu/cuda: add more NVIDIA devices
Elena Agostini [Wed, 13 Apr 2022 17:38:48 +0000 (17:38 +0000)]
gpu/cuda: add more NVIDIA devices

Add more NVIDIA GPU devices to the gpu/cuda driver list
compatible with GPUDirect RDMA.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agonet/dpaa2: fix dpdmux default interface
Tianli Lai [Tue, 29 Mar 2022 22:01:07 +0000 (06:01 +0800)]
net/dpaa2: fix dpdmux default interface

if dpdmux objects created by restool tools with
the argument "--default-if=<if-id-number>", this
function would change it to 1

Fixes: 1def64c2d79e ("net/dpaa2: add dpdmux initialization and configuration")
Cc: stable@dpdk.org
Signed-off-by: Tianli Lai <laitianli@tom.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agonet/sfc: drop futile null check
Ivan Malov [Sun, 20 Mar 2022 10:11:00 +0000 (13:11 +0300)]
net/sfc: drop futile null check

The NULL pointer check is clearly unneeded.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2 years agoeal/windows: add missing C++ include guards
David Marchand [Tue, 5 Apr 2022 13:48:58 +0000 (15:48 +0200)]
eal/windows: add missing C++ include guards

Add missing 'extern "C"' to file.

Fixes: 1db72630da0c ("eal/windows: do not expose private facilities")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agoci: add Fedora 35 container in GHA
David Marchand [Mon, 4 Apr 2022 14:24:39 +0000 (16:24 +0200)]
ci: add Fedora 35 container in GHA

Build DPDK with Fedora 35 containers.

GHA container support does not allow caching images and docker hub
seems to limit image pulls.
On the other hand, the Fedora project hub does not seem to limit them,
so prefer this hub.
Nevertheless, let's try to be good citizens and cache (once a day) a
prepared image for subsequent builds.
This preparation is done in a first prepare-container-images job.
The rpm-container-builds job then depends on it with a 'needs:' tag.

Differences with builds in Ubuntu GHA vm images:
- tasks are run as root in containers, no need for sudo,
- compiler must be explicitly installed,
- GHA artifacts can't contain a ':' in their name, and must be filtered,
- environment variables are not inherited and must be passed explicitly,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2 years agogpu/cuda: add NVIDIA A30X identifier for DPU
Elena Agostini [Mon, 4 Apr 2022 14:43:52 +0000 (14:43 +0000)]
gpu/cuda: add NVIDIA A30X identifier for DPU

A30X GPU code for DPU.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agoeal/windows: fix data race when creating threads
Tyler Retzlaff [Thu, 10 Mar 2022 07:35:08 +0000 (23:35 -0800)]
eal/windows: fix data race when creating threads

eal_thread_loop() uses lcore_config[i].thread_id,
which is stored upon the return from CreateThread().
Per documentation, eal_thread_loop() can start
before CreateThread() returns and the ID is stored.

Create lcore worker threads suspended and then subsequently resume to
allow &lcore_config[i].thread_id be stored before eal_thread_loop
execution.

Fixes: 53ffd9f080fc ("eal/windows: add minimum viable code")
Cc: stable@dpdk.org
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2 years agoeal/x86: remove atomic header include loop
Haiyue Wang [Thu, 24 Mar 2022 08:41:43 +0000 (16:41 +0800)]
eal/x86: remove atomic header include loop

Remove the x86 top atomic header include from the architecture related
header file, since this x86 top atomic header file has included them.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
2 years agomaintainers: add sections for some bbdev drivers
Nicolas Chautru [Mon, 21 Mar 2022 18:19:50 +0000 (11:19 -0700)]
maintainers: add sections for some bbdev drivers

These were implicit from DPDK script but adding
separate reference to make it explicit.
Separate sections for API and PMDs

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
2 years agomaintainers: update for NFP
Heinrich Kuhn [Fri, 25 Mar 2022 12:01:33 +0000 (14:01 +0200)]
maintainers: update for NFP

Niklas has been appointed the new maintainer for the NFP PMD.
Update the MAINTAINERS file to reflect this.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@corigine.com>
2 years agodevtools: document ABI check suppression rules
David Marchand [Wed, 23 Mar 2022 09:24:00 +0000 (10:24 +0100)]
devtools: document ABI check suppression rules

Suppression rules are being added during the life of an ABI and cleaned
when bumping the major version.
Sort and document those rules to avoid pruning rules that should be kept.

Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agoversion: 22.07-rc0
David Marchand [Fri, 18 Mar 2022 14:35:08 +0000 (15:35 +0100)]
version: 22.07-rc0

Start a new release cycle with empty release notes.
Bump version and ABI minor.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Aaron Conole <aconole@redhat.com>
2 years agoversion: 22.03.0
Thomas Monjalon [Thu, 17 Mar 2022 09:05:06 +0000 (10:05 +0100)]
version: 22.03.0

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agodoc: update release notes for 22.03
John McNamara [Wed, 16 Mar 2022 17:33:37 +0000 (17:33 +0000)]
doc: update release notes for 22.03

Fix grammar, spelling and formatting of DPDK 22.03 release notes.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
2 years agodoc: add PMD power management errata with RTM and GCC 9
David Hunt [Wed, 9 Mar 2022 13:22:21 +0000 (13:22 +0000)]
doc: add PMD power management errata with RTM and GCC 9

An errata exists where users may see reduced power savings when using
PMD Power Management. This issue occurs when compiling DPDK applications
with GCC-9 on platforms with TSX enabled. In rte_power_monitor_multi(),
the function may return without successfully starting the RTM
transaction (the _xbegin() fails).

Signed-off-by: David Hunt <david.hunt@intel.com>