Zhirun Yan [Thu, 1 Apr 2021 01:33:23 +0000 (09:33 +0800)]
net/ice: support VXLAN VNI field in flow director
Add support for VNI field in FDIR. Treat VXLAN flow type as
ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN to align with shared code. It
allows to match outer L2/L3, VNI and inner L2/L3 fields with VXLAN
pattern.
VNI takes 24 bits in VXLAN header, but uses 32 bits for matching in
shared code. The 8 bits reserved field adjacent should always be 0.
Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Murphy Yang [Thu, 1 Apr 2021 03:23:32 +0000 (03:23 +0000)]
net/i40e: fix flow director config after flow validate
The configuration of FDIR input set should not be set
during flow validate. It should be set when flow create.
Fixes:
fe5d0e85b713 ("net/i40e: fix flow director flex configuration")
Fixes:
15018d79f0be ("net/i40e: add FDIR support for GTP-C and GTP-U")
Cc: stable@dpdk.org
Signed-off-by: Murphy Yang <murphyx.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Wei Huang [Wed, 17 Mar 2021 08:21:36 +0000 (04:21 -0400)]
raw/ifpga/base: check null pointer
In init_sec_mgr(), pointer "hw" may be NULL, so "hw" should
be checked before dereferencing.
Coverity issue: 367483
Fixes:
a05bd1b40bde ("raw/ifpga: add FPGA RSU APIs")
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Wei Huang [Wed, 17 Mar 2021 08:21:35 +0000 (04:21 -0400)]
raw/ifpga/base: check file length
In fpga_update_flash(), "smgr->rsu_length" is passed to a
parameter that cannot be negative. So return value of
function "lseek" should be checked before being assigned
to "smgr->rsu_length".
Coverity issue: 367481
Fixes:
a05bd1b40bde ("raw/ifpga: add FPGA RSU APIs")
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Wei Huang [Wed, 17 Mar 2021 08:21:34 +0000 (04:21 -0400)]
raw/ifpga/base: check lseek failure
In write_flash_image(), calling function "lseek" without checking
return value has risk. Negative return value should be handled as
an error condition.
Coverity issue: 367478
Fixes:
a05bd1b40bde ("raw/ifpga: add FPGA RSU APIs")
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Robin Zhang [Tue, 30 Mar 2021 08:44:23 +0000 (08:44 +0000)]
doc: update recommended versions for i40e
Kernel driver 2.13.10 is removed, so update recommended matching list
for i40e.
Cc: stable@dpdk.org
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Alvin Zhang [Thu, 1 Apr 2021 05:21:32 +0000 (13:21 +0800)]
net/e1000: fix Rx error counter for bad length
When the size of a packet in Rx channel is less than the minimum
or greater than the maximum, the packet will be simultaneously
counted by RLEC(Receive Length Error Count) and
RUC(Receive Under Size Count)/ROC(Receive Oversize Count) registers.
This patch fixes the issue of counting a length error packet twice
when counting the total number of received error packets.
Fixes:
70bdb18657da ("ethdev: add Rx error counters for missed, badcrc and badlen packets")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Alvin Zhang [Thu, 1 Apr 2021 05:20:43 +0000 (13:20 +0800)]
net/igc: fix Rx error counter for bad length
When the size of a packet in Rx channel is less than the minimum
or greater than the maximum, the packet will be simultaneously
counted by RLEC(Receive Length Error Count) and
RUC(Receive Under Size Count)/ROC(Receive Oversize Count) registers.
This patch fixes the issue of counting a length error packet twice
when counting the total number of received error packets.
Fixes:
e6defdfddc3b ("net/igc: enable statistics")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
David Harton [Tue, 6 Apr 2021 00:27:19 +0000 (20:27 -0400)]
net/ena: fix releasing Tx ring mbufs
When ena_tx_queue_release_bufs() frees the mbufs it does not clear
the mbuf pointers. So, when the device starts and stops multiple
times it can cause the application to receive duplicate mbufs for
two different packets. Fix the issue by clearing the mbuf pointer.
Also, while tracking down the "double free" issue the ena calls to
allocate and free mbufs in bulk were migrated to the mbuf based APIs
so the common mbuf alloc/free routines are exercised.
Fixes:
79405ee17585 ("net/ena: fix out of order completion")
Fixes:
1173fca25af9 ("ena: add polling-mode driver")
Cc: stable@dpdk.org
Signed-off-by: David Harton <dharton@cisco.com>
Acked-by: Michal Krawczyk <mk@semihalf.com>
Pallavi Kadam [Fri, 2 Apr 2021 01:26:21 +0000 (18:26 -0700)]
net/ice: disable DDP package on Windows
Disable loading of external DDP package as it is not
supported on Windows.
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Jie Zhou <jizh@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Pallavi Kadam [Fri, 2 Apr 2021 01:26:20 +0000 (18:26 -0700)]
net/ice: build on Windows
- Add Intel ice PMD support on Windows.
- Remove #include sys/ioctl header file as it is not needed.
- Replace x86intrin.h with rte_vect.h to avoid __m_prefetchw conflicting
types.
- Replace POSIX usleep() API with rte API.
- Add a new macro for the access() API as the original function
has been deprecated on Windows.
- Add extra cflags '-fno-asynchronous-unwind-tables'
to avoid MinGW build error:
Error: invalid register for .seh_savexmm
- Add documentation to support ice PMD on Windows.
Update the release notes and features list for the same.
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Jie Zhou <jizh@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Pallavi Kadam [Fri, 2 Apr 2021 01:26:19 +0000 (18:26 -0700)]
common/iavf: build on Windows
Enable IAVF driver to build on Windows as it is required
to build ice PMD.
Disable all other drivers from common directory.
This patch also includes fix for a macro redefinition warning
in the IAVF driver.
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Jie Zhou <jizh@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Min Hu (Connor) [Tue, 6 Apr 2021 00:57:36 +0000 (08:57 +0800)]
net/hns3: update HiSilicon copyright syntax
According to the suggestion of our legal department,
to standardize the copyright license of our code to
avoid potential copyright risks, we make a unified
modification to the "Hisilicon", which was nonstandard,
in the main modules we maintain.
We change it to "HiSilicon", which is consistent with
the terms used on the following official website:
https://www.hisilicon.com/en/terms-of-use.
Fixes:
565829db8b8f ("net/hns3: add build and doc infrastructure")
Fixes:
952ebacce4f2 ("net/hns3: support SVE Rx")
Fixes:
e31f123db06b ("net/hns3: support NEON Tx")
Fixes:
c09c7847d892 ("net/hns3: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Thu, 1 Apr 2021 13:38:04 +0000 (21:38 +0800)]
net/hns3: support IEEE 1588 PTP
Add hns3 support for new ethdev APIs to enable and read IEEE1588/
802.1AS PTP timestamps.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Thu, 1 Apr 2021 13:38:03 +0000 (21:38 +0800)]
net/hns3: fix MTU config complexity
This patch fixed cyclomatic complexity about MTU
in device configure process.
Fixes:
1f5ca0b460cd ("net/hns3: support some device operations")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:54 +0000 (17:52 +0800)]
net/igc: refine debug build option
1. replace RTE_LIBRTE_IGC_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_IGC_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_ETHDEV_DEBUG into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:53 +0000 (17:52 +0800)]
net/ixgbe: refine debug build option
1. replace RTE_LIBRTE_IXGBE_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_IXGBE_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_IXGBE_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:52 +0000 (17:52 +0800)]
net/ice: refine debug build option
1. replace RTE_LIBRTE_ICE_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_ICE_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_ICE_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_LIBRTE_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:51 +0000 (17:52 +0800)]
net/iavf: refine debug build option
1. replace RTE_LIBRTE_IAVF_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_IAVF_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_IAVF_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:50 +0000 (17:52 +0800)]
net/i40e: refine debug build option
1. replace RTE_LIBRTE_I40E_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_I40E_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_I40E_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:49 +0000 (17:52 +0800)]
net/e1000: refine debug build option
1. replace RTE_LIBRTE_E1000_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_E1000_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_E1000_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:48 +0000 (17:52 +0800)]
net/fm10k: refine debug build option
1. replace RTE_LIBRTE_FM10K_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_FM10K_DEBUG_TX with RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_FM10K_DEBUG_TX_FREE and RTE_LIBRTE_ETHDEV_DEBUG
into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Qi Zhang [Wed, 31 Mar 2021 09:52:47 +0000 (17:52 +0800)]
ethdev: refine debug build option
PMDs use RTE_LIBRTE_<PMD_NAME>_DEBUG_RX|TX as build option to wrap
data path debug code. As .config has been removed since the meson build,
It is not friendly for new DPDK users to notice those debug options.
The patch introduces below build options for data path debug, so PMD
can choose to reuse them to avoid maintain their own.
- RTE_ETHDEV_DEBUG_RX
- RTE_ETHDEV_DEBUG_TX
All the build options are documented at programming guide
"3.1 Driver Option", so users can easily find them.
The original undocumented RTE_LIBRTE_ETHDEV_DEBUG will alias to
both RTE_ETHDEV_DEBUG_RX and RTE_ETHDEV_DEBUG_TX for backward
compatibility.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Thomas Monjalon [Mon, 29 Mar 2021 07:28:53 +0000 (09:28 +0200)]
drivers/net: remove useless autoneg capability
The flag ETH_LINK_SPEED_AUTONEG is 0,
so it cannot be used in a capability bitmap.
Having 0 in speed capability means all speeds are accepted.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Jiawei Wang [Thu, 1 Apr 2021 02:39:56 +0000 (05:39 +0300)]
doc: add sampling and mirroring in testpmd guide
Update documentation for sample action usage in testpmd and
show the command line example.
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:49 +0000 (15:20 +0530)]
mempool/cnxk: add cn10k batch dequeue
Add the implementation for Marvell CN10k mempool batch dequeue op.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:48 +0000 (15:20 +0530)]
mempool/cnxk: add cn10k get count
Add the implementation for Marvell CN10k get count op.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:47 +0000 (15:20 +0530)]
mempool/cnxk: add cn10k batch enqueue
Add the implementation for Marvell CN10k mempool batch enqueue op.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:46 +0000 (15:20 +0530)]
mempool/cnxk: add batch operation init
Marvell CN10k mempool supports batch enqueue/dequeue which can
dequeue up to 512 pointers and enqueue up to 15 pointers using
a single instruction.
These batch operations require a DMA memory to enqueue/dequeue
pointers. This patch adds the initialization of this DMA memory.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:45 +0000 (15:20 +0530)]
mempool/cnxk: add cn10k mempool operations
Add Marvell CN10k mempool ops and implement CN10k mempool alloc.
CN10k has 64 bytes L1D cache line size. Hence the CN10k mempool
alloc does not make the element size an odd multiple L1D cache
line size as NPA requires the element sizes to be multiples of
128 bytes.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:44 +0000 (15:20 +0530)]
mempool/cnxk: add cn9k optimized enqueue/dequeue
Add Marvell CN9k mempool enqueue/dequeue. Marvell CN9k
supports burst dequeue which allows to dequeue up to 32
pointers using pipelined casp instructions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:43 +0000 (15:20 +0530)]
mempool/cnxk: add cn9k mempool operations
Add Marvell CN9k mempool ops and implement CN9k mempool
alloc which makes sure that the element size always occupy
odd number of cachelines to ensure even distribution among
of elements among L1D cache sets.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:42 +0000 (15:20 +0530)]
mempool/cnxk: register plt init callback
Register the CNXk mempool plt init callback which will set the
appropriate mempool ops to be used for the platform.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:41 +0000 (15:20 +0530)]
mempool/cnxk: add generic operations
Add generic CNXk mempool ops which will enqueue/dequeue
from pool one element at a time.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:40 +0000 (15:20 +0530)]
mempool/cnxk: add device probe/remove
Add the implementation for CNXk mempool device
probe and remove.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Ashwin Sekhar T K [Thu, 8 Apr 2021 09:50:39 +0000 (15:20 +0530)]
mempool/cnxk: add build infra and doc
Add the meson based build infrastructure for Marvell
CNXK mempool driver along with stub implementations
for mempool device probe.
Also add Marvell CNXK mempool base documentation.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Satheesh Paul [Tue, 6 Apr 2021 14:41:44 +0000 (20:11 +0530)]
common/cnxk: support RSS action in NPC rule
Added support for allocating RSS group and setting
it as action of an NPC rule.
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:43 +0000 (20:11 +0530)]
common/cnxk: support TIM IRQ
Add TIM LF IRQ register and un-register functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:42 +0000 (20:11 +0530)]
common/cnxk: support TIM device
Add TIM device init, fini which are used to attach TIM LF
resources to the RVU PF/VF and TIM LF alloc and free.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:41 +0000 (20:11 +0530)]
common/cnxk: support SSO debug
Add sso debug dump support. This dumps all SSO LF register values
to a given file handle.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:40 +0000 (20:11 +0530)]
common/cnxk: support SSO IRQ
Add support to registering and un-registering SSO HWS and
HWGRP IRQs.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:39 +0000 (20:11 +0530)]
common/cnxk: add SSO HWGRP interface
Add SSO HWGRP interface for configuring XAQ pool, setting priority
and internal HW buffer limits for each HWGRP.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:38 +0000 (20:11 +0530)]
common/cnxk: add SSO HWS interface
Add SSO HWS interface for setting/unsetting links, retrieving
base address and nanoseconds to getwork timeout.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Tue, 6 Apr 2021 14:41:37 +0000 (20:11 +0530)]
common/cnxk: support SSO device
Add SSO device init and fini which attach SSO LF resources to the
RVU PF/VF and SSO HWS and HWGRP LFs alloc, free.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Kiran Kumar K [Tue, 6 Apr 2021 14:41:36 +0000 (20:11 +0530)]
common/cnxk: add NPC init and fini
Adding support initialize and fini the npc. Further, adding APIs to
create and destroy the npc rules.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Kiran Kumar K [Tue, 6 Apr 2021 14:41:35 +0000 (20:11 +0530)]
common/cnxk: add NPC parsing API
Adding npc parsing API support to parse different patterns and actions.
Based on the pattern and actions ltype values will be chosen and
mcam data will be configured at perticular offsets.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Kiran Kumar K [Tue, 6 Apr 2021 14:41:34 +0000 (20:11 +0530)]
common/cnxk: add mcam utility API
Adding mcam utility functions like reading KEX and reserving and writing
mcam rules.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Kiran Kumar K [Tue, 6 Apr 2021 14:41:33 +0000 (20:11 +0530)]
common/cnxk: add NPC helper API
Adding NPC helper APIs to manage MCAM like pre allocating the mcam,
configuring the rules, shifting mcam rules and preparing the data for
mcam based on KEX.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Kiran Kumar K [Tue, 6 Apr 2021 14:41:32 +0000 (20:11 +0530)]
common/cnxk: support NPC
Adding initial support for programming NPC. NPC is Network Parser
and CAM unit that provides Rx and Tx packet parsing and packet
manipulation functionality on Marvell CN9K and CN10K SoC's. It is
mapped to RTE Flow in DPDK.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:31 +0000 (20:11 +0530)]
common/cnxk: support NIX TM debug and misc utils
Add support to dump TM HW registers and hierarchy on error.
This patch also adds support for misc utils such as API to
query TM HW resource availability, resource pre-allocation
and static priority support on root node.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:30 +0000 (20:11 +0530)]
common/cnxk: support NIX TM dynamic update
Add support for dynamic node update of shaper profile,
RR quantum and also support to suspend or resume an active
TM node.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:29 +0000 (20:11 +0530)]
common/cnxk: support NIX TM internal hierarchy
Add support to create internal TM default hierarchy and ratelimit
hierarchy and API to ratelimit SQ to a given rate. This will be
used by cnxk ethdev driver's tx queue ratelimit op.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:28 +0000 (20:11 +0530)]
common/cnxk: add NIX TM hierarchy enable/disable
Add support to enable or disable hierarchy along with
allocating node HW resources such as shapers and schedulers
and configuring them to match the user created or default
hierarchy.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:27 +0000 (20:11 +0530)]
common/cnxk: add NIX TM helper to alloc/free resource
Add TM helper API to estimate, alloc, assign, and free resources
for a NIX LF / ethdev.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Satha Rao [Tue, 6 Apr 2021 14:41:26 +0000 (20:11 +0530)]
common/cnxk: support NIX TM shaper profile
Add support to add/delete/update shaper profile for
a given NIX. Also add support to walk through existing
shaper profiles.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:25 +0000 (20:11 +0530)]
common/cnxk: support add/delete NIX TM node
Add support to add/delete nodes in a hierarchy.
This patch also adds misc utils to get node name,
walk through nodes etc.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:41:24 +0000 (20:11 +0530)]
common/cnxk: support NIX traffic management
Add nix traffic management base support to init/fini node, shaper profile
and topology, setup SQ for a given user hierarchy or default internal
hierarchy.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Sunil Kumar Kori [Tue, 6 Apr 2021 14:41:23 +0000 (20:11 +0530)]
common/cnxk: support NIX LSO and misc utils
Add support to create LSO formats for TCP segmentation offload
for IPv4/IPv6, tunnel and non-tunnel protocols. Tunnel protocol
support is for GRE and UDP based tunnel protocols.
This patch also adds other helper API to retrieve eeprom info
and configure Rx for different switch headers.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Sunil Kumar Kori [Tue, 6 Apr 2021 14:41:22 +0000 (20:11 +0530)]
common/cnxk: support NIX flow control
Add support to enable/disable Rx/Tx flow control and pause
frame configuration on NIX.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Sunil Kumar Kori [Tue, 6 Apr 2021 14:41:21 +0000 (20:11 +0530)]
common/cnxk: suport VLAN filter
Add helper API to support VLAN filtering and stripping
on Rx and VLAN insertion on Tx.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:20 +0000 (20:11 +0530)]
common/cnxk: support NIX debug dump
Add support to dump NIX RQ, SQ and CQ contexts apart
from NIX LF registers.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Satha Rao [Tue, 6 Apr 2021 14:41:19 +0000 (20:11 +0530)]
common/cnxk: support NIX extended stats
Add support for retrieving NIX extended stats that are
per NIX LF and per LMAC.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:18 +0000 (20:11 +0530)]
common/cnxk: support NIX stats
Add API to provide Rx and Tx stats for a given NIX.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Sunil Kumar Kori [Tue, 6 Apr 2021 14:41:17 +0000 (20:11 +0530)]
common/cnxk: support NIX PTP
Add support to enable/disable Rx and Tx PTP timestamping
support. Also provide API's to register ptp info callbacks
to get config change update from Kernel.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:16 +0000 (20:11 +0530)]
common/cnxk: support NIX RSS
Add API's for default/non-default reta table setup,
key set/get, and flow algo setup for CN9K and CN10K.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Vidya Sagar Velumuri [Tue, 6 Apr 2021 14:41:15 +0000 (20:11 +0530)]
common/cnxk: add NIX inline IPsec config API
Add API to configure NIX block for inline IPSec.
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Sunil Kumar Kori [Tue, 6 Apr 2021 14:41:14 +0000 (20:11 +0530)]
common/cnxk: add NIX specific NPC operations
Add NIX specific NPC operations such as NPC mac address get/set,
mcast entry add/delete, promiscuous mode enable/disable etc.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Sunil Kumar Kori [Tue, 6 Apr 2021 14:41:13 +0000 (20:11 +0530)]
common/cnxk: support NIX MAC operations
Add support to different MAC related operations such as
MAC address set/get, link set/get, link status callback,
etc.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:12 +0000 (20:11 +0530)]
common/cnxk: add NIX Tx queue management API
This patch adds support to init/modify/fini NIX
SQ(send queue) for both CN9K and CN10K platforms.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:11 +0000 (20:11 +0530)]
common/cnxk: add NIX Rx queue management API
Add nix Rx queue management API to init/modify/fini
RQ context and also setup CQ(completion queue) context.
Current support is both for CN9K and CN10K devices.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:10 +0000 (20:11 +0530)]
common/cnxk: support NIX IRQ
Add support to register NIX error and completion
queue IRQ's using base device class IRQ helper API's.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:09 +0000 (20:11 +0530)]
common/cnxk: support NIX
Add base nix support as ROC(Rest of Chip) API which will
be used by generic ETHDEV PMD(net/cnxk).
This patch adds support to device init, fini, resource
alloc and free API which sets up a ETHDEV PCI device of either
CN9K or CN10K Marvell SoC.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:08 +0000 (20:11 +0530)]
common/cnxk: support NPA batch alloc/free
Add APIs to do allocations/frees in batch from
NPA pool.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:07 +0000 (20:11 +0530)]
common/cnxk: support NPA performance counter
Add APIs to read NPA performance counters.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:06 +0000 (20:11 +0530)]
common/cnxk: support NPA bulk alloc/free
Add APIs to alloc/free in bulk from NPA pool.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:05 +0000 (20:11 +0530)]
common/cnxk: add NPA pool HW operations
Add APIs for creating, destroying, modifying
NPA pools.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:04 +0000 (20:11 +0530)]
common/cnxk: support NPA debug
Add NPA debug APIs.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:03 +0000 (20:11 +0530)]
common/cnxk: support NPA IRQ
Add support for NPA IRQs.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:41:02 +0000 (20:11 +0530)]
common/cnxk: support NPA device
Add base NPA device support. NPA i.e Network Pool Allocator is
HW block that provides HW mempool functionality on Marvell CN9K
and CN10K SoC's. NPA by providing HW mempool support, also
facilitates Rx and Tx packet alloc and packet free by HW without
SW intervention.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:01 +0000 (20:11 +0530)]
common/cnxk: add VF support to base device class
Add VF specific handling such as BAR4 setup, forwarding
VF mbox messages to AF and vice-versa, VF FLR handling
etc.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:41:00 +0000 (20:11 +0530)]
common/cnxk: add base device class
Introduce 'dev' class to hold cnxk PCIe device specific
information and operations.
All PCIe drivers(ethdev, mempool, cryptodev and eventdev) of cnxk
inherits this base object to avail the common functionalities such
as mailbox creation, interrupt registration, LMT setup, VF message
mbox forwarding, etc.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:40:59 +0000 (20:10 +0530)]
common/cnxk: add mailbox base infrastructure
This patch adds mailbox infra API's to communicate with Kernel AF
driver. These API's will be used by all the other cnxk drivers
for mbox init/fini, send/recv functionality.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:40:58 +0000 (20:10 +0530)]
common/cnxk: add mbox request and response definitions
The admin function driver sits in Linux kernel as mailbox
server. The DPDK AF mailbox client, send the message to mailbox
server to complete the administrative task such as get mac
address.
This patch adds mailbox request and response definition of
existing mailbox defined between AF driver and DPDK driver.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:40:57 +0000 (20:10 +0530)]
common/cnxk: add interrupt helper API
Add interrupt helper API's in common code to register and
unregister for specific interrupt vectors. These API's
will be used by all cnxk drivers.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Ashwin Sekhar T K [Tue, 6 Apr 2021 14:40:56 +0000 (20:10 +0530)]
common/cnxk: add roc plt init callback support
Add support for registering callbacks for roc plt init.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:40:55 +0000 (20:10 +0530)]
common/cnxk: add model init and IO handling API
Add routines for SoC model identification and HW IO handling
routines specific to CN9K and CN10K Marvell SoC's.
These are based on arm64 ISA and behaviour specific to
Marvell SoC's.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Jerin Jacob [Tue, 6 Apr 2021 14:40:54 +0000 (20:10 +0530)]
common/cnxk: add build infrastructre and HW definition
Add meson build infrastructure along with HW definition
header file.
This patch also adds cross-compile configs for arm
for CN9K series and CN10K series of Marvell SoC's.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Nithin Dabilpuram [Tue, 6 Apr 2021 14:40:53 +0000 (20:10 +0530)]
doc: add Marvell cnxk platform guide
Platform specific guide for Marvell OCTEON CN9K/CN10K SoC is added.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Juraj Linkeš [Tue, 30 Mar 2021 06:40:19 +0000 (08:40 +0200)]
build: alias default build as generic
The current machine='default' build name is not descriptive. The actual
default build is machine='native'. Add an alternative string which does
the same build and better describes what we're building:
machine='generic'. Leave machine='default' for backwards compatibility.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Thu, 25 Feb 2021 15:29:03 +0000 (15:29 +0000)]
build: limit symbol checks to developer mode
The checking of symbols within each library and driver is only of
interest to developers, so limit to developer mode only.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Thu, 25 Feb 2021 15:29:02 +0000 (15:29 +0000)]
build: hide debug messages in non-developer mode
The messages about what components have what dependency names, and
information about function versioning not being supported on windows are
only of interest to developers, so hide them when building in
non-developer mode.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Thu, 25 Feb 2021 15:29:01 +0000 (15:29 +0000)]
build: enable a developer mode setting
To allow support for additional build checks and tests only really
relevant for developers, we add support for a developer mode option to
DPDK. The default, "auto", value for this enables developer mode if a
".git" folder is found at the root of the source tree - as was the case
with the previous "make" build system. There is also support for
explicitly enabling or disabling this option using "meson configure" if
so desired.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Luc Pelletier [Wed, 7 Apr 2021 20:16:06 +0000 (16:16 -0400)]
eal: fix hang in control thread creation
The affinity of a control thread is set after it has been launched. If
setting the affinity fails, pthread_cancel is called followed by a call
to pthread_join, which can hang forever if the thread's start routine
doesn't call a pthread cancellation point.
This patch modifies the logic so that the control thread exits
gracefully if the affinity cannot be set successfully and removes the
call to pthread_cancel.
Fixes:
6383d2642b62 ("eal: set name when creating a control thread")
Cc: stable@dpdk.org
Signed-off-by: Luc Pelletier <lucp.at.work@gmail.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Luc Pelletier [Wed, 7 Apr 2021 20:16:04 +0000 (16:16 -0400)]
eal: fix race in control thread creation
The creation of control threads uses a pthread barrier for
synchronization. This patch fixes a race condition where the pthread
barrier could get destroyed while one of the threads has not yet
returned from the pthread_barrier_wait function, which could result in
undefined behaviour.
Fixes:
3a0d465d4c53 ("eal: fix use-after-free on control thread creation")
Cc: stable@dpdk.org
Signed-off-by: Luc Pelletier <lucp.at.work@gmail.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Thomas Monjalon [Mon, 8 Mar 2021 22:24:10 +0000 (23:24 +0100)]
vfio: reformat logs
The log messages had various issues:
- split on 2 lines, making search (grep) difficult
- long lines (can be split after the string)
- indented for no good reason (parent message may have higher log level)
- inconsistent use of __func__, not meaningful context for user
- lack of context (general message not mentioning VFIO)
- log level too high (more below)
Message having its level decreased from WARNING to NOTICE:
"not managed by VFIO driver, skipping"
Message having its level decreased from INFO to DEBUG:
"Probing VFIO support..."
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Thomas Monjalon [Mon, 5 Apr 2021 19:33:25 +0000 (21:33 +0200)]
app/testpmd: fix usage text
The options help text was including an incomplete and redundant
summary of the options before explaining each. The summary is dropped.
The details of the option --hairpin-mode had an extra space,
breaking the alignment with the next line.
There were some mismatches between options in the usage text
sed -rn 's/.*\(" *--([a-z-]*)[=: ].*/\1/p' app/test-pmd/parameters.c
and the options declared in lgopts array
sed -rn 's/.*\{.*"(.*)",.*,.*,.*},.*/\1/p' app/test-pmd/parameters.c
The misses were:
--no-numa
--enable-scatter
--tx-ip
--tx-udp
--noisy-lkup-num-reads-writes
The option --ports was not implemented.
Fixes:
01817b10d27c ("app/testpmd: change hairpin queues setup")
Fixes:
3c156061b938 ("app/testpmd: add noisy neighbour forwarding mode")
Fixes:
bf5b2126bf44 ("app/testpmd: add ability to set Tx IP and UDP parameters")
Fixes:
0499793854f5 ("app/testpmd: add scatter enabling option")
Fixes:
999b2ee0fe45 ("app/testpmd: enable NUMA support by default")
Fixes:
af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Reviewed-by: Jens Freimann <jfreimann@redhat.com>
Reviewed-by: Bing Zhao <bingz@nvidia.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Thomas Monjalon [Mon, 5 Apr 2021 19:33:24 +0000 (21:33 +0200)]
app/regex: fix usage text
The usage syntax help includes the program name which was fake.
It is replaced with the real name from argv.
Fixes:
de06137cb295 ("app/regex: add RegEx test application")
Cc: stable@dpdk.org
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
Thomas Monjalon [Mon, 5 Apr 2021 19:33:23 +0000 (21:33 +0200)]
app: fix exit messages
Some applications were printing useless messages with rte_exit()
after showing the help. Using exit() is enough in this case.
Some applications were using a redundant printf or fprintf() before
calling rte_exit(). The messages are unified in a single rte_exit().
Some rte_exit() calls were missing a line feed or returning a wrong code.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
David Marchand [Fri, 9 Apr 2021 11:04:53 +0000 (13:04 +0200)]
eal: fix evaluation of log level option
--log-level option is handled early, no need to reevaluate it later in
EAL init.
Before:
$ echo quit | ./build/app/test/dpdk-test --no-huge -m 512 \
--log-level=lib.eal:debug \
--log-level=lib.ethdev:debug --log-level=lib.ethdev:info \
|& grep -i log.level
EAL: lib.eal log level changed from info to debug
EAL: lib.ethdev log level changed from info to debug
EAL: lib.ethdev log level changed from debug to info
EAL: lib.ethdev log level changed from info to debug
EAL: lib.ethdev log level changed from debug to info
EAL: lib.telemetry log level changed from disabled to warning
After:
$ echo quit | ./build/app/test/dpdk-test --no-huge -m 512 \
--log-level=lib.eal:debug \
--log-level=lib.ethdev:debug --log-level=lib.ethdev:info \
|& grep -i log.level
EAL: lib.eal log level changed from info to debug
EAL: lib.ethdev log level changed from info to debug
EAL: lib.ethdev log level changed from debug to info
EAL: lib.telemetry log level changed from disabled to warning
Fixes:
6c7216eefd63 ("eal: fix log level of early messages")
Fixes:
1c806ae5c3ac ("eal/windows: support command line options parsing")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
Tested-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
David Marchand [Fri, 9 Apr 2021 11:04:52 +0000 (13:04 +0200)]
log: track log level changes
Add a log message when registering log types and changing log levels.
__rte_log_register previous handled both legacy and dynamic logtypes.
To simplify the code, __rte_log_register is reworked to only handle
dynamic logtypes and takes a log level.
Example:
$ DPDK_TEST=logs_autotest ./build/app/test/dpdk-test --no-huge -m 512 \
--log-level=lib.eal:debug
...
RTE>>logs_autotest
== dynamic log types
EAL: logtype1 log level changed from disabled to info
EAL: logtype2 log level changed from disabled to info
EAL: logtype1 log level changed from info to error
EAL: logtype3 log level changed from error to emergency
EAL: logtype2 log level changed from info to emergency
EAL: logtype3 log level changed from emergency to debug
EAL: logtype1 log level changed from error to debug
EAL: logtype2 log level changed from emergency to debug
error message
critical message
critical message
error message
== static log types
TESTAPP1: error message
TESTAPP1: critical message
TESTAPP2: critical message
TESTAPP1: error message
Test OK
Suggested-by: Ilya Maximets <i.maximets@ovn.org>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>