Kiran Kumar K [Wed, 23 Jun 2021 04:46:49 +0000 (10:16 +0530)]
net/cnxk: support flow API
Adding initial version of rte_flow support for cnxk family device.
Supported rte_flow ops are flow_validate, flow_create, flow_destroy,
flow_flush, flow_query, flow_isolate.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:41 +0000 (10:16 +0530)]
net/cnxk: support Rx interrupt
Application may choose to enable/disable interrupts on Rx queues
so that application can select its processing if no packets are
available on queues for a longer period.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Add device start and stop operation callbacks for
CN9K and CN10K. Device stop is common for both platforms
while device start as some platform dependent portion where
the platform specific offload flags are recomputed and
the right Rx/Tx burst function is chosen.
aDD tx queue setup and release for CN9K and CN10K.
Release is common while setup is platform dependent due
to differences in fast path Tx queue structures.
Add Rx queue setup and release op for CN9K and CN10K
SoC. Release is completely common while setup is platform
dependent due to fast path Rx queue structure variation.
Fastpath is platform dependent partly due to core cacheline
size difference.
Add platform specific probe and remove callbacks for CN9K
and CN10K which use common probe and remove functions.
Register ethdev driver for CN9K and CN10K.
Harman Kalra [Wed, 23 Jun 2021 04:46:05 +0000 (10:16 +0530)]
common/cnxk: allocate LMT region in userspace
As per the new LMTST design, userspace shall allocate LMT region,
setup the DMA translation and share the IOVA with kernel via MBOX.
Kernel will convert this IOVA to physical memory and update the
LMT table entry with the same.
With this new design also shared mode (i.e. all pci funcs sharing
the LMT region allocated by primary/base pci func) is intact.
Signed-off-by: Harman Kalra <hkalra@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
The instruction generation was not correct due to
fact that volatile suppose to use with ccode variable
as well.
Change the logic to use gcc atomic builtin to
simplify and avoid explicit volatile from the code.
Fixes: 81af26789316 ("common/cnxk: support NPA batch alloc/free") Cc: stable@dpdk.org Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Satha Rao [Wed, 23 Jun 2021 04:46:01 +0000 (10:16 +0530)]
common/cnxk: support locking NIX RQ contexts
This patch will consider device argument to lock RSS table
in NIX.
This patch also adds few misc fixes such as disabling NIX Tx
vlan insertion conf in SMQ, enabling SSO in NIX Tx SQ
for Tx completions and TM related stats API.
David Marchand [Thu, 24 Jun 2021 11:53:19 +0000 (13:53 +0200)]
test: remove hack for private header inclusion
This hack was needed with the make build system.
With meson, any private header from a library is visible as long as a
dependency to this library is expressed.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:49 +0000 (17:04 +0200)]
raw/cnxk_bphy: support BPHY self test
Add support for performing selftest.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:48 +0000 (17:04 +0200)]
raw/cnxk_bphy: support registering BPHY IRQ handlers
Custom IRQ handlers may be registered/removed on demand.
Since registration and removal are related they are in the
same patch.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:47 +0000 (17:04 +0200)]
raw/cnxk_bphy: support retrieving BPHY device memory
Allow user to retrieve baseband phy memory resources.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:46 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading number of BPHY IRQs
Add support for retrieving maximum number of interrupts.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:45 +0000 (17:04 +0200)]
raw/cnxk_bphy: support interrupt init and cleanup
Add support for interrupt initialization and cleanup. Internally
interrupt initialization performs low level setup that allows
custom interrupt handler registration later on.
Interrupt initialization and cleanup are related hence they
are in the same patch.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:44 +0000 (17:04 +0200)]
raw/cnxk_bphy: support BPHY dequeue operation
Add support for dequeueing responses to previously
enqueued messages.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:43 +0000 (17:04 +0200)]
raw/cnxk_bphy: support BPHY enqueue operation
Add preliminary support for enqueue operation.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:42 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading BPHY queue count
Add support for reading number of available queues from baseband
phy. Currently only single queue is supported.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:41 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading BPHY queue configuration
Add support for reading baseband phy queue configuration.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:40 +0000 (17:04 +0200)]
raw/cnxk_bphy: add baseband PHY skeleton driver
Add baseband phy skeleton driver. Baseband phy is a hardware subsystem
accelerating 5G/LTE related tasks. Note this driver isn't involved into
any sort baseband protocol processing. Instead it just provides means
for configuring hardware.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:39 +0000 (17:04 +0200)]
common/cnxk: register BPHY IRQ
Add support for registering user supplied baseband PHY IRQ handler.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:38 +0000 (17:04 +0200)]
common/cnxk: clear BPHY IRQ handler
Add support for clearing previously register baseband PHY IRQ handler.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:37 +0000 (17:04 +0200)]
common/cnxk: set BPHY IRQ handler
Add support for setting custom baseband PHY IRQ handler.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:36 +0000 (17:04 +0200)]
common/cnxk: remove BPHY IRQ stack
Add support for removing existing IRQ stack.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:35 +0000 (17:04 +0200)]
common/cnxk: retrieve BPHY IRQ stack
Add support for retrieving IRQ stack.
If stack does not exist then it gets created.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:34 +0000 (17:04 +0200)]
common/cnxk: check BPHY IRQ availability
Add support for checking whether given IRQ is available.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:33 +0000 (17:04 +0200)]
common/cnxk: add BPHY IRQ setup
Add support for initializing baseband PHY IRQs. While at it
also add support for reverting back to the default state.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:32 +0000 (17:04 +0200)]
common/cnxk: add BPHY device init and fini
Add support for device init and fini. It merely saves
baseband phy state container in a globally accessible
resource chest.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:31 +0000 (17:04 +0200)]
raw/cnxk_bphy: support CGX self test
Add support for performing selftest operation.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:30 +0000 (17:04 +0200)]
raw/cnxk_bphy: support CGX dequeue operation
Add support for dequeueing responses to previously
enqueued messages.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:29 +0000 (17:04 +0200)]
raw/cnxk_bphy: support CGX enqueue operation
Add support for enqueueing messages.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:28 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading CGX queue count
Add support for reading number of available queues i.e number
of available logical macs (LMACs).
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:27 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading CGX queue configuration
Add support for reading queue configuration. Single queue represents
a logical MAC available on RPM/CGX.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:26 +0000 (17:04 +0200)]
raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver
Add baseband PHY CGX/RPM skeleton driver which merely probes a matching
device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:25 +0000 (17:04 +0200)]
common/cnxk: start and stop BPHY LMAC
Add support for starting or stopping specific lmac.
Start enables Rx/Tx traffic while stop does the opposite.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:24 +0000 (17:04 +0200)]
common/cnxk: set BPHY link state
Add support for setting link up or down.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:23 +0000 (17:04 +0200)]
common/cnxk: set BPHY link mode
Add support for setting link mode.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:22 +0000 (17:04 +0200)]
common/cnxk: enable and disable BPHY PTP mode
Add support for enabling or disablig PTP mode.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:21 +0000 (17:04 +0200)]
common/cnxk: enable and disable BPHY internal loopback
Add support for enabling or disabling internal loopback.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:20 +0000 (17:04 +0200)]
common/cnxk: get BPHY link information
Add support for retrieving link information.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:19 +0000 (17:04 +0200)]
common/cnxk: add BPHY communication with atf
Messages can be exchanged between userspace software and firmware
via set of two dedicated registers, namely scratch1 and scratch0.
scratch1 acts as a command register i.e message is sent to firmware,
while scratch0 holds response to previously sent message.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:18 +0000 (17:04 +0200)]
common/cnxk: add BPHY CGX/RPM initialization and cleanup
Add support for low level initialization and cleanup of baseband
PHY CGX/RPM blocks.
Initialization and cleanup are related hence are in the same patch.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Xueming Li [Mon, 5 Jul 2021 06:45:12 +0000 (14:45 +0800)]
bus/auxiliary: introduce auxiliary bus
Auxiliary bus [1] provides a way to split function into child-devices
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.
Auxiliary device is identified by unique device name, sysfs path:
/sys/bus/auxiliary/devices/<name>
Devargs legacy syntax of auxiliary device:
-a auxiliary:<name>[,args...]
Devargs generic syntax of auxiliary device:
-a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...]
[1] kernel auxiliary bus document:
https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Thomas Monjalon <thomas@monjalon.net>
Xueming Li [Mon, 5 Jul 2021 06:45:11 +0000 (14:45 +0800)]
devargs: add common key definition
Add common devargs key definition for "bus", "class" and "driver".
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Thomas Monjalon [Sun, 13 Jun 2021 08:24:21 +0000 (16:24 +0800)]
eal: save error in string copy
The string copy api rte_strscpy() did not set rte_errno during failures,
instead it just returned negative error number.
Set rte_errrno if the destination buffer is too small.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Xueming Li <xuemingl@nvidia.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
Chenglian Sun [Tue, 22 Jun 2021 02:47:05 +0000 (10:47 +0800)]
examples/l2fwd: fix [no-]mac-updating options
For l2fwd, --no-mac-updating and --mac-updating are treated as invalid
arguments. Rework long options parsing to let --no-mac-updating and
--mac-updating options work well.
Fixes: fa19eb20d212 ("examples/l2fwd: add forwarding port mapping option") Cc: stable@dpdk.org Signed-off-by: Chenglian Sun <sunchenglian@loongson.cn> Reviewed-by: David Marchand <david.marchand@redhat.com>
Ruifeng Wang [Thu, 10 Jun 2021 06:57:40 +0000 (06:57 +0000)]
examples/l3fwd: remove useless reloads in LPM main loop
Number of rx queue and number of rx port in lcore config are constants
during the period of l3 forward application running. But compiler has
no this information.
Copied values from lcore config to local variables and used the local
variables for iteration. Compiler can see that the local variables are
not changed, so qconf reloads at each iteration can be eliminated.
The change showed 1.8% performance uplift in single core, single port,
single queue test on N1SDP platform with MLX5 NIC.
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Ruifeng Wang [Thu, 10 Jun 2021 06:57:39 +0000 (06:57 +0000)]
examples/l3fwd: remove useless calculations in NEON LPM
Both L2 and L3 headers will be used in forward processing. And these
two headers are in the same cache line. It has the same effect for
prefetching with L2 header address and prefetching with L3 header
address.
Changed to use L2 header address for prefetching. The change showed
no measurable performance improvement, but it definitely removed
unnecessary instructions for address calculation.
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Lance Richardson [Fri, 26 Mar 2021 16:37:32 +0000 (12:37 -0400)]
app/test: fix IPv6 header initialization
Fix two issues found when writing PMD unit tests for HW ptype and
L4 checksum offload:
- The version field in the IPv6 header was being set to zero,
which prevented hardware from recognizing it as IPv6. The
IP version field is now set to six.
- The payload_len field was being initialized using host byte
order, which (among other things) resulted in incorrect L4
checksum computation. The payload_len field is now set using
network (big-endian) byte order.
Fixes: 92073ef961ee ("bond: unit tests") Cc: stable@dpdk.org Signed-off-by: Lance Richardson <lance.richardson@broadcom.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
Fix the IOMMU detection logic that looks for the "platform" field of
/proc/cpuinfo on POWER systems.
Fixes: 905215731833 ("bus/pci: support IOVA as VA on PowerNV systems") Cc: stable@dpdk.org Signed-off-by: David Christensen <drc@linux.vnet.ibm.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
Ruifeng Wang [Fri, 11 Jun 2021 14:42:18 +0000 (14:42 +0000)]
eal/arm: remove unused type
Data types Elf32_auxv_t and Elf64_auxv_t are used by OS Linux
auxiliary vector read, and not used by arch specific cpu flag
API implementations. Hence remove them from Arm file.
Reported-by: James Grant <j.grant@qub.ac.uk> Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
David Marchand [Thu, 1 Jul 2021 14:11:31 +0000 (16:11 +0200)]
devtools: recommend new logtype helpers
Following commit eeded2044af5 ("log: register with standardized names"),
the new helpers should be preferred so that we can maintain a consistent
naming for logtypes.
Signed-off-by: David Marchand <david.marchand@redhat.com>
common/mlx5: fix Netlink port name padding in probing
On some kernels the string attributes within Netlink
reply messages might be not padded with zeroes (in cases
when string length is aligned with 4-byte boundary).
While device probing, the physical port name was wrongly recognized,
causing a probing failure.
Metadata were stored in the CPU order (little-endian format on x86),
while all the packet header fields are stored in the network order.
That caused wrong results whenever we tried to use metadata value
in the modify_field action: bytes were swapped as a result.
Convert the metadata value into big-endian format before storing it
in the Mellanox NIC to achieve consistent behaviour.
Fixes: 641dbe4fb053 ("net/mlx5: support modify field flow action") Cc: stable@dpdk.org Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
MAC addresses are split into 2 parts inside Mellanox NIC:
bits 0-15 are separate from bits 16-47. That makes a copy
from another packet field tricky because any other field
is aligned to 32 bits, not 16. This causes unexpected
results when using the MODIFY_FIELD action with MAC addresses.
Track crossing MAC addresses boundary and arrange a proper
order for the MODIFY_FIELD action involving MAC addresses.
Fixes: 641dbe4fb053 ("net/mlx5: support modify field flow action") Cc: stable@dpdk.org Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
git.droids-corp.org / dpdk.git / log