Qi Zhang [Tue, 8 Oct 2019 01:50:09 +0000 (09:50 +0800)]
net/ice/base: update flow packet type bitmaps
In the flow API, the outer first ptype bitmaps contained many
references to inner ptypes. Because of PTG assignments, these were
causing issues when programming rules on the inner ptypes.
For example, in RSS when programming the outer IPV6 hash fields,
it also programmed several inner IPV4 PTGs with the same extraction.
There were several ptypes that have been removed, thus this patch
removes those bits from the type bitmaps.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com>
Qi Zhang [Tue, 8 Oct 2019 01:50:08 +0000 (09:50 +0800)]
net/ice/base: fix NVGRE switch rule programming
Correct for GRE/NVGRE training packets to include the
correct protocol IDs for TCP and UDP respectively.
Fixes: b83a0c290322 ("net/ice/base: fix inner TCP and UDP support for GRE") Cc: stable@dpdk.org Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com>
Qi Zhang [Tue, 8 Oct 2019 01:50:07 +0000 (09:50 +0800)]
net/ice/base: fix adding PPPoE switch rule
Update VLAN protocol ID to correct value for single VXLAN scenario.
Fix the missing ethertype offset for PPPoE dummy packet offset to
allow matching the corresponding field.
Fixes: d1c2f76b440a ("net/ice/base: support GTP and PPPoE protocols") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com>
Vivek Sharma [Fri, 11 Oct 2019 04:05:21 +0000 (09:35 +0530)]
app/testpmd: support QinQ offload in VLAN set command
Segregate QinQ from Extend Offload and support QinQ offload
in vlan set command. Merge all port wise rx vlan offloads in
command line help and documentation for a cleaner structure.
Fix port info display to distinguish between qinq strip and
extend offloads. Flatten all VLAN offload info into a single
line to reduce info length.
Phil Yang [Mon, 26 Aug 2019 11:00:14 +0000 (19:00 +0800)]
net/memif: optimize with one-way barrier
Using 'rte_mb' to synchronize the shared ring head/tail between producer
and consumer will stall the pipeline and damage performance on the weak
memory model platforms, such like aarch64. Meanwhile update the shared
ring head and tail are observable and ordered between CPUs on IA.
Optimized this full barrier with the one-way barrier can improve the
throughput. On aarch64 n1sdp server this patch make testpmd throughput
boost 2.1%. On Intel E5-2640, testpmd got 3.98% performance gain.
Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
Rasesh Mody [Sun, 6 Oct 2019 20:14:08 +0000 (13:14 -0700)]
net/qede/base: update FW to 8.40.25.0
This patch updates the FW to 8.40.25.0 and corresponding base driver
changes. It also updates the PMD version to 2.11.0.1. The FW updates
consists of enhancements and fixes as described below.
- VF RX queue start ramrod can get stuck due to completion error.
Return EQ completion with error, when fail to load VF data. Use VF
FID in RX queue start ramrod
- Fix big receive buffer initialization for 100G to address failure
leading to BRB hardware assertion
- GRE tunnel traffic doesn't run when non-L2 ethernet protocol is
enabled, fix FW to not forward tunneled SYN packets to LL2.
- Fix the FW assert that is caused during vport_update when
tx-switching is enabled
- Add initial FW support for VF Representors
- Add ecore_get_hsi_def_val() API to get default HSI values
- Move following from .c to .h files:
TSTORM_QZONE_START and MSTORM_QZONE_START
enum ilt_clients
renamed struct ecore_dma_mem to phys_mem_desc and moved
- Add ecore_cxt_set_cli() and ecore_cxt_set_blk() APIs to set client
config and block details
- Use SET_FIELD() macro where appropriate
- Address spell check and code alignment issues
Rasesh Mody [Sun, 6 Oct 2019 20:14:06 +0000 (13:14 -0700)]
net/qede/base: move DMAE to HSI
Move DMA engine (DMAE) structures from base driver to HSI module.
Use DMAE_PARAMS_* in place of ECORE_DMAE_FLAG_*.
Enforce SET_FIELD() macro where appropriate.
Rasesh Mody [Sun, 6 Oct 2019 20:14:05 +0000 (13:14 -0700)]
net/qede/base: update RT defs NVM cfg and MCP
Update and add runtime array offsets (rt defs), non-volatile memory
configuration options (nvm cfg) and management co-processor (mcp)
shared code in preparation to update the firmware to version 8.40.25.0.
Rasesh Mody [Sun, 6 Oct 2019 20:14:04 +0000 (13:14 -0700)]
net/qede/base: rename HSI datatypes and functions
This patch changes code with E4/E5/e4/e5/BB_K2 prefixes and suffixes.
- HSI datatypes renaming - removed all e5 datatypes and renamed
all e4 datatypes to be prefix less/suffix less.
(s/_E4//; s/_e4//; s/E4_//).
- HSI functions - removed e4/e5 prefixes/suffixes.
Rasesh Mody [Sun, 6 Oct 2019 20:14:01 +0000 (13:14 -0700)]
net/qede/base: fix page index for PBL chains
ecore_chain_set_prod/cons() sets the wrong page index in chains with
non-power of 2 page count. Fix ecore_chain_set_prod/cons() for PBL
chains with non power of 2 page count.
Calculate the right page index according to current indexes.
Xiaoyun Wang [Thu, 10 Oct 2019 14:51:52 +0000 (22:51 +0800)]
net/hinic: add flow validation operations
This patch is to validate the filter rules, which includes
ntuple filter, ethertype filter and fdir filter. The packets
type that supported are BGP,VRRP,LACP,ARP and ICMP.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Xiaoyun Wang [Thu, 10 Oct 2019 14:51:50 +0000 (22:51 +0800)]
net/hinic: add unicast and multicast MAC set
This patch adds unicast and multicast set interfaces.
Application can add or remove unicast MAC address, also can set
multicast MAC address, the maximum multicast list size is 2048.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Xiaoyun Wang [Thu, 10 Oct 2019 14:51:46 +0000 (22:51 +0800)]
net/hinic/base: add HW interfaces for SR-IOV
This patch introduces some HW interfaces required for SR-IOV function,
including: init hwdev, set port state, get default cos,
VF DMA attribute table, VF txrx flush and so on.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Xiaoyun Wang [Thu, 10 Oct 2019 14:51:45 +0000 (22:51 +0800)]
net/hinic/base: add mbox command channel for SR-IOV
Add mbox command channel for SR-IOV, which is used to
communicate between VF and VF, VF and PF. This patch
introduces data structures, initialization, interfaces
and commands of mbox channel.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Kalesh AP [Thu, 10 Oct 2019 01:41:51 +0000 (18:41 -0700)]
net/bnxt: fix handling interface change status
Driver issues hwrm_if_change when the port is started and stopped.
This command returns whether the fw has undergone a reset while port
was down. Fix to handle hwrm_if_change status during port start only.
Fixes: 0b533591238f ("net/bnxt: inform firmware about IF state changes") Cc: stable@dpdk.org Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Reviewed-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com>
Kalesh AP [Thu, 10 Oct 2019 01:41:50 +0000 (18:41 -0700)]
net/bnxt: enable interrupts according interface status
Driver issues hwrm_if_change when the port is started. This command
returns whether the fw has undergone a reset while port was down and
driver does re-init of resources if fw has undergone a reset.
Fix to enable interrupts only after this check.
Fixes: c023cd5b2192 ("net/bnxt: fix async link handling and update") Cc: stable@dpdk.org Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Rahul Gupta [Thu, 10 Oct 2019 01:41:49 +0000 (18:41 -0700)]
net/bnxt: change MSI-X vector to queue mapping
DPDK PCIe-VFIO framework configures base MSIX vector for interrupts
which is supported by other h/w. In case of bnxt, base MSIX vector
starts with the RX completion queue 0. To comply with the DPDK
framework We need to increase the map index by 1 so that RXTX
completion queues events can be delivered to appropriate event listeners
by kernel VFIO.
Fixes: bd0a14c99f65 ("net/bnxt: use dedicated CPR for async events") Cc: stable@dpdk.org Signed-off-by: Rahul Gupta <rahul.gupta@broadcom.com> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Ajit Khaparde [Thu, 10 Oct 2019 01:41:47 +0000 (18:41 -0700)]
net/bnxt: get default HWRM command timeout from FW
The HWRM command timeout is set to a very high value.
VER_GET command response returns the default request timeout value.
Use this value for waiting for HWRM commands to complete.
Poll for the valid bit every 1us instead of 600us.
Ajit Khaparde [Thu, 10 Oct 2019 01:41:46 +0000 (18:41 -0700)]
net/bnxt: update trusted VF status only when it changes
We are currently logging trusted VF information everytime a VF config
change is indicated by the async message. Update it only when new
setting is different from the current setting.
net/bnxt: free default completion ring before VF config
If the VF resources need to be reconfigured using the
bnxt_hwrm_func_reserve_vf_resc, make sure that the default completion
ring is freed first before the resources are reserved.
Reallocate the ring once the VF resources are configured.
Fixes: 7bc8e9a227cc ("net/bnxt: support async link notification") Cc: stable@dpdk.org Signed-off-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
When OS sends more packets than are being read with a single
'rte_eth_rx_burst' call, rx packets are getting stucked in the tap pmd
and are unable to receive, because trigger_seen is getting updated
and consecutive calls are not getting any packets.
Do not update trigger_seen unless less than a max number of packets were
received allowing next call to receive the rest.
Remove unnecessary compiler barrier.
Fixes: a0d8e807d9de ("net/tap: add Rx trigger") Cc: stable@dpdk.org Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com> Tested-by: Mariusz Drost <mariuszx.drost@intel.com> Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Reviewed-by: Keith Wiles <keith.wiles@intel.com>
net/enic: add flow implementation based on Flow Manager API
Flow Manager API is the new firmware interface that exposes match
action capabilities in 1400 series VIC adapters. It is intended for
virtual switch offloads and enables more advanced features than the
existing filter API. For example, it supports VXLAN encap and decap
actions, and exposes TCAM and exact match tables.
Add the new flow implementation using Flow Manager and use it when
available. When Flow Manager is not available, the driver will
continue to use the old filter-based flow implementation.
Signed-off-by: John Daley <johndale@cisco.com> Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Latest firmware supports Geneve with options offload. Current overlay
offload only supports Geneve with no options. This new feature is
disabled by default, as it is intrusive and cannot be used with flow
API. Add a new devarg 'geneve-opt' so the user can explicitly enable
it.
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com> Reviewed-by: John Daley <johndale@cisco.com>
Both primary and secondary processes may call the queue start/stop,
link update handlers. These functions use the rte_eth_dev pointer
cached in the adapter private data (struct enic). But, this pointer is
valid only in the primary process, as rte_eth_dev addresses may differ
in different processes. Using that cached pointer in secondary
processes leads to a crash.
For the link update handler (enic_link_update), use the rte_eth_dev
pointer passed down from the rte layer as it is valid in the current
process. For the queue start/stop handlers (enic_start_wq and
friends), cache the rte_eth_dev_data pointer in the adapter private
data, and use that. rte_eth_dev_data is in shared memory and its
address is same across processes.
Fixes: 837e68ae94a2 ("net/enic: fix queue stop and start") Fixes: cf8d9826b7be ("net/enic: extract code for checking link status") Cc: stable@dpdk.org Reported-by: Dirk-Holger Lenz <dirk.lenz@ng4t.com> Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com> Tested-by: Dirk-Holger Lenz <dirk.lenz@ng4t.com> Reviewed-by: John Daley <johndale@cisco.com>
Krzysztof Kanas [Fri, 23 Aug 2019 08:16:59 +0000 (10:16 +0200)]
test/bonding: fix LSC timeout unit
Fixes: 76d29903f5f5 ("bond: support link status interrupt") Cc: stable@dpdk.org Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Krzysztof Kanas [Fri, 23 Aug 2019 08:16:58 +0000 (10:16 +0200)]
test/bonding: fix LSC related cases
On rare situation test_link_bonding test case fail due to timespec
tv_nsec overflow, which causes pthread_cond_timedwait to return EINVAL
and test to fail.
Fixes: 76d29903f5f5 ("bond: support link status interrupt") Cc: stable@dpdk.org Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ori Kam [Thu, 26 Sep 2019 10:22:15 +0000 (10:22 +0000)]
net/mlx5: fix allocation size of RQT attribute
The receive queues list size is based on the size of uint32_t, so
when allocating the memory, the correct value should be used. Or
else there is risk to corrupt the memory, depending on the queues
number, because there is some pad area for alignment. If the queue
number is not large enough, the issue couldn't be observed.
Fixes: dc9ceff73c99 ("net/mlx5: create advanced RxQ via DevX") Cc: stable@dpdk.org Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
David Marchand [Tue, 22 Oct 2019 08:21:43 +0000 (10:21 +0200)]
net/virtio: do not require IO permissions
On x86, iopl permissions are only available to root user (or users that
have the CAP_SYS_RAWIO capability).
But those permissions are only needed when the virtio devices accesses
are done with inb/outb instructions, which is when the device is bound
to a UIO kernel module.
So far, the virtio driver was refusing to register based on the check
on IO permissions.
This check does not make sense when binding the device to vfio.
Now that the check on IO permissions has been abstracted in the ioport
API, we can remove it on virtio side.
We still need to call rte_eal_iopl_init() in the virtio constructor so
that the interrupt thread inherits this permission in the case it could
be used with UIO later.
Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Tiwei Bie <tiwei.bie@intel.com>
David Marchand [Tue, 22 Oct 2019 08:21:42 +0000 (10:21 +0200)]
bus/pci: check IO permissions for UIO only
On x86, calling inb/outb special instructions (used in UIO ioport
read/write parts) is only possible if the right IO permissions has been
granted.
The only user of this API (the net/virtio pmd) checks this
unconditionnaly but this should be hidden by the rte_pci_ioport API
itself and only checked when the device is bound to a UIO driver.
Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Anatoly Burakov [Thu, 24 Oct 2019 15:17:56 +0000 (16:17 +0100)]
eal/freebsd: support option --base-virtaddr
According to our docs, only Linuxapp supports base-virtaddr option.
That is, strictly speaking, not true because most of the things
that are attempting to respect base-virtaddr are in common files,
so FreeBSD already *mostly* supports this option in practice.
This commit fixes the remaining bits to explicitly support
base-virtaddr option, and moves the arg parsing from EAL to common
options parsing code. Documentation is also updated to reflect
that all platforms now support base-virtaddr.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
Seth Howell [Fri, 11 Oct 2019 20:56:07 +0000 (13:56 -0700)]
bus/pci: remove useless link dependency on ethdev
The makefile in drivers/bus/pci specified rte_ethdev as a dependency for
the library. However there are no actual symbols from librte_ethdev used
in librte_bus_pci.
Including librte_ethdev as a dependency only becomes a problem in some
niche cases like when attempting to build the rte_bus_pci library as a
shared object without building the rte_ethdev library.
I specifically ran into this when trying to build the DPDK included as
an SPDK submodule on a FreeBSD machine. I figure that since there are no
real dependencies between the two, we should enable building
librte_bus_pci without librte_ethdev.
Ruifeng Wang [Tue, 15 Oct 2019 09:28:26 +0000 (17:28 +0800)]
test/distributor: fix spurious failure
Sanity test could spuriously fail with reporting flush count error.
It was caused by worker stat coherent issue between distributor and
worker thread.
Fix this issue by using atomic operations to update worker stat.
Fixes: c3eabff124e6 ("distributor: add unit tests") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: David Hunt <david.hunt@intel.com>
Ruifeng Wang [Tue, 15 Oct 2019 09:28:25 +0000 (17:28 +0800)]
lib/distributor: fix deadlock on aarch64
Distributor and worker threads rely on data structs in cache line
for synchronization. The shared data structs were not protected.
This caused deadlock issue on weaker memory ordering platforms as
aarch64.
Fix this issue by adding memory barriers to ensure synchronization
among cores.
Bugzilla ID: 342 Fixes: 775003ad2f96 ("distributor: add new burst-capable library") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: David Hunt <david.hunt@intel.com>
Memory required for the mempool objects need not be physically
contiguous on octeontx2's HW, mempool pmd supports the minimum chunk
size set by the default handler. Hence discarding the limitation set
by the pmd on the min_chunk_size value.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Adam Dybkowski [Mon, 21 Oct 2019 11:29:55 +0000 (13:29 +0200)]
test/crypto: add encrypted digest case for AES-CTR-CMAC
This patch adds tests for encrypted digest AES-CTR + AES CMAC using
mixed auth-cipher algorithm functions. Tests allow easy
extending with new cases, check in-place and
out-of-place operations and use linear and sgl
buffers as input/output.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Gagandeep Singh [Mon, 21 Oct 2019 05:31:27 +0000 (11:01 +0530)]
config: change default endianness for CAAM JR
CAAM JR can work on both LE and BE mode.
Latest platforms are in LE mode, so changing the
default mode to LE to make it more convenient for
the latest platforms.
Nicolas Chautru [Tue, 22 Oct 2019 13:16:17 +0000 (06:16 -0700)]
baseband/fpga_lte_fec: fix polling of MMIO register
Polling of MMIO register could misreport the actual value
set dynamically in hardware as the variable was not set explicitly
to volatile integer.
Fixes: efd453698c49 ("baseband/fpga_lte_fec: add driver for FEC on FPGA") Cc: stable@dpdk.org Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Nicolas Chautru [Tue, 22 Oct 2019 13:16:16 +0000 (06:16 -0700)]
baseband/fpga_lte_fec: fix probing
A change to PCI mapping assumption was missed earlier, this causes
probing to fail with the fpga_lte_fec PMD when checking for name
of the rte_driver (not set yet) instead of the rte_pci_driver.
Fixes: 391797f04208 ("drivers/bus: move driver assignment to end of probing") Cc: stable@dpdk.org Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>