dpdk.git
3 years agopipeline: support LPM lookup
Cristian Dumitrescu [Thu, 8 Jul 2021 10:11:29 +0000 (11:11 +0100)]
pipeline: support LPM lookup

Add support for the Longest Prefix Match (LPM) lookup to the SWX
pipeline.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Churchill Khangar <churchill.khangar@intel.com>
3 years agoexamples/pipeline: add selector example
Cristian Dumitrescu [Sat, 10 Jul 2021 00:20:36 +0000 (01:20 +0100)]
examples/pipeline: add selector example

Added the files to illustrate the selector table usage.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
3 years agoexamples/pipeline: support selector table
Cristian Dumitrescu [Sat, 10 Jul 2021 00:20:35 +0000 (01:20 +0100)]
examples/pipeline: support selector table

Add application-level support for selector tables.

Signed-off-by: Churchill Khangar <churchill.khangar@intel.com>
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
3 years agopipeline: support selector table
Cristian Dumitrescu [Sat, 10 Jul 2021 00:20:34 +0000 (01:20 +0100)]
pipeline: support selector table

Add pipeline-level support for selector tables.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
3 years agotable: support selector table
Cristian Dumitrescu [Fri, 2 Jul 2021 22:46:05 +0000 (23:46 +0100)]
table: support selector table

A selector table is made up of groups of weighted members, with a
given member potentially part of several groups. The select operation
returns a member ID by first selecting a group based on an input group
ID and then selecting a member within that group based on hashing one
or several input header/meta-data fields. It is very useful for
implementing an ECMP/WCMP-enabled FIB or a load balancer. It is part
of the action selector described by the P4 Portable Switch
Architecture (PSA) specification.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
3 years agoexamples/pipeline: improve table update commands
Churchill Khangar [Fri, 2 Jul 2021 22:46:04 +0000 (23:46 +0100)]
examples/pipeline: improve table update commands

For more flexibility, the single monolithic table update command is
split into table entry add, table entry delete, table default entry
add, pipeline commit and pipeline abort.

Signed-off-by: Churchill Khangar <churchill.khangar@intel.com>
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
3 years agopipeline: fix table entry read
Cristian Dumitrescu [Mon, 5 Jul 2021 22:56:50 +0000 (23:56 +0100)]
pipeline: fix table entry read

The rte_swx_pipeline_table_entry_read() function is used to read from
a character string a table entry that is to be added to the table,
deleted from the table or set as the default entry of the table.
Addition needs both the match and the part of the entry, deletion
ignores the action part, while the default set ignores the match part,
hence the need to make both the match and the action part optional.
The logic for skipping the match or the action part was broken, hence
the current fix.

Fixes: b32c0a2c5e4c ("pipeline: add SWX table update high level API")
Cc: stable@dpdk.org
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Venkata Suresh Kumar P <venkata.suresh.kumar.p@intel.com>
Signed-off-by: Churchill Khangar <churchill.khangar@intel.com>
3 years agotable: fix bucket empty check
Thierry Herbelot [Wed, 7 Jul 2021 11:19:05 +0000 (13:19 +0200)]
table: fix bucket empty check

Due to a typo, only 3 out of 4 keys in the bucket of the exact match
table were considered, which can result in valid keys being
incorrectly dropped from the table.

Fixes: d0a00966618ba ("table: add exact match SWX table")
Cc: stable@dpdk.org
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
3 years agonet/bnxt: fix build
Ajit Khaparde [Thu, 8 Jul 2021 22:09:18 +0000 (15:09 -0700)]
net/bnxt: fix build

Fix build failures seen on Fedora Core 34 (GCC 11)
because of uninitialized variables.

In function ‘ulp_mapper_index_tbl_process’:
drivers/net/bnxt/tf_ulp/ulp_mapper.c:2252:43: error:
‘*(unsigned int *)((char *)&glb_res + offsetof(struct bnxt_ulp_glb_resource_info, resource_func))’
may be used uninitialized in this function
 2252 |         struct bnxt_ulp_glb_resource_info glb_res;
      |                                           ^~~~~~~
drivers/net/bnxt/tf_ulp/ulp_mapper.c:2252:43: error:
‘glb_res.resource_type’ may be used uninitialized in this function

In function ‘dpool_defrag’:
drivers/net/bnxt/tf_core/dpool.c:95:18: error:
‘index’ may be used uninitialized in this function
   95 |         uint32_t index;
      |                  ^~~~~

Fixes: 05b405d58148 ("net/bnxt: add dpool allocator for EM allocation")

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/hns3: fix Arm SVE build with GCC 8.3
Chengwen Feng [Mon, 28 Jun 2021 02:57:51 +0000 (10:57 +0800)]
net/hns3: fix Arm SVE build with GCC 8.3

If the target machine has SVE feature (e.g. '-march=armv8.2-a+sve'),
and compiler is gcc-8.3, it will fail, the error is arm_sve.h:
no such file or directory.

The solution:
a. If RTE_HAS_SVE_ACLE defined (it means the minimum instruction set
support SVE ACLE) then compiles it.
b. Else if the compiler support SVE ACLE then compiles it.
c. Otherwise don't compile it.

Fixes: 8c25b02b082a ("net/hns3: fix enabling SVE Rx/Tx")
Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agoconfig/arm: fix SVE build with GCC 8.3
Chengwen Feng [Mon, 28 Jun 2021 02:57:50 +0000 (10:57 +0800)]
config/arm: fix SVE build with GCC 8.3

If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
and the compiler is gcc-8.3, it will produce this error:
In file included from lib/eal/common/eal_common_options.c:38:
lib/eal/arm/include/rte_vect.h:13:10: fatal error:
arm_sve.h: No such file or directory
#include <arm_sve.h>
       ^~~~~~~~~~~

The root cause is that gcc-8.3 supports SVE (the macro
__ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1].

The solution:
a) Detect compiler whether support SVE ACLE, if support then define
RTE_HAS_SVE_ACLE macro.
b) Use the RTE_HAS_SVE_ACLE macro to include SVE header file.

[1] ACLE:  Arm C Language Extensions, the SVE ACLE header file is
<arm_sve.h>, user should include it when writing ACLE SVE code.

Fixes: 67b68824a82d ("lpm/arm: support SVE")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
3 years agoring: use WFE to wait for tail update on aarch64
Ruifeng Wang [Wed, 7 Jul 2021 05:48:38 +0000 (13:48 +0800)]
ring: use WFE to wait for tail update on aarch64

Instead of polling for tail to be updated, use WFE instruction.

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agospinlock: use WFE to reduce contention on aarch64
Gavin Hu [Wed, 7 Jul 2021 05:48:37 +0000 (13:48 +0800)]
spinlock: use WFE to reduce contention on aarch64

In acquiring a spinlock, cores repeatedly poll the lock variable.
This is replaced by rte_wait_until_equal API.

Running micro benchmarking and testpmd and l3fwd traffic tests
on ThunderX2, Ampere eMAG80 and Arm N1SDP, everything went well
and no notable performance gain nor degradation was measured.

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agonet/af_xdp: support power monitoring
Anatoly Burakov [Fri, 9 Jul 2021 16:08:11 +0000 (16:08 +0000)]
net/af_xdp: support power monitoring

Implement support for .get_monitor_addr in AF_XDP driver.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
3 years agoexamples/l3fwd-power: support multiqueue ethdev power management
Anatoly Burakov [Fri, 9 Jul 2021 16:08:17 +0000 (16:08 +0000)]
examples/l3fwd-power: support multiqueue ethdev power management

Currently, l3fwd-power enforces the limitation of having one queue per
lcore. This is no longer necessary, so remove the limitation.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
3 years agopower: support monitoring multiple Rx queues
Anatoly Burakov [Fri, 9 Jul 2021 16:08:16 +0000 (16:08 +0000)]
power: support monitoring multiple Rx queues

Use the new multi-monitor intrinsic to allow monitoring multiple ethdev
Rx queues while entering the energy efficient power state. The multi
version will be used unconditionally if supported, and the UMWAIT one
will only be used when multi-monitor is not supported by the hardware.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
3 years agopower: support callbacks for multiple Rx queues
Anatoly Burakov [Fri, 9 Jul 2021 16:08:15 +0000 (16:08 +0000)]
power: support callbacks for multiple Rx queues

Currently, there is a hard limitation on the PMD power management
support that only allows it to support a single queue per lcore. This is
not ideal as most DPDK use cases will poll multiple queues per core.

The PMD power management mechanism relies on ethdev Rx callbacks, so it
is very difficult to implement such support because callbacks are
effectively stateless and have no visibility into what the other ethdev
devices are doing. This places limitations on what we can do within the
framework of Rx callbacks, but the basics of this implementation are as
follows:

- Replace per-queue structures with per-lcore ones, so that any device
  polled from the same lcore can share data
- Any queue that is going to be polled from a specific lcore has to be
  added to the list of queues to poll, so that the callback is aware of
  other queues being polled by the same lcore
- Both the empty poll counter and the actual power saving mechanism is
  shared between all queues polled on a particular lcore, and is only
  activated when all queues in the list were polled and were determined
  to have no traffic.
- The limitation on UMWAIT-based polling is not removed because UMWAIT
  is incapable of monitoring more than one address.

Also, while we're at it, update and improve the docs.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
3 years agopower: make ethdev power management thread unsafe
Anatoly Burakov [Fri, 9 Jul 2021 16:08:14 +0000 (16:08 +0000)]
power: make ethdev power management thread unsafe

Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.

We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
3 years agoeal: add power monitor for multiple events
Anatoly Burakov [Fri, 9 Jul 2021 16:08:13 +0000 (16:08 +0000)]
eal: add power monitor for multiple events

Use RTM and WAITPKG instructions to perform a wait-for-writes similar to
what UMWAIT does, but without the limitation of having to listen for
just one event. This works because the optimized power state used by the
TPAUSE instruction will cause a wake up on RTM transaction abort, so if
we add the addresses we're interested in to the read-set, any write to
those addresses will wake us up.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
3 years agoeal: use callbacks for power monitoring comparison
Anatoly Burakov [Fri, 9 Jul 2021 16:08:10 +0000 (16:08 +0000)]
eal: use callbacks for power monitoring comparison

Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.

This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.

Existing implementations are adjusted to follow the new semantics.

Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
3 years agodoc: add power management to NIC features
Anatoly Burakov [Fri, 9 Jul 2021 16:08:12 +0000 (16:08 +0000)]
doc: add power management to NIC features

At this point, multiple different Ethernet drivers from multiple vendors
will support the PMD power management scheme. It would be useful to add
it to the NIC feature table to indicate support for it.

Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
3 years agodoc: add aarch32 build guidance
Phil Yang [Wed, 7 Jul 2021 13:25:43 +0000 (15:25 +0200)]
doc: add aarch32 build guidance

Add cross-compiling guidance for 32-bit aarch32 DPDK on aarch64 host.

Signed-off-by: Phil Yang <phil.yang@arm.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Aaron Conole <aconole@redhat.com>
3 years agoconfig/arm: add aarch32 cross-compilation
Juraj Linkeš [Wed, 7 Jul 2021 13:25:42 +0000 (15:25 +0200)]
config/arm: add aarch32 cross-compilation

Create meson cross file arm32_armv8a_linux_gcc. Use arm-linux-gnueabihf-
toolset which comes with standard packages on most used systems, such as
Ubuntu and CentOS.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agoconfig/arm: add aarch32
Juraj Linkeš [Wed, 7 Jul 2021 13:25:41 +0000 (15:25 +0200)]
config/arm: add aarch32

Add aarch32 armv8 SoC to build config.
Also modify how arm flags are updated in meson build - for 32-bit build,
update only if cross-compiling.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agoeal/arm: update CPU flags
Juraj Linkeš [Wed, 7 Jul 2021 13:25:40 +0000 (15:25 +0200)]
eal/arm: update CPU flags

There are two execution states on armv8 architecture, aarch64 and
aarch32. Add PLATFORM_STR for the latter and update RTE_ARCH_* flags
according to e9b97392640.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
3 years agonet/virtio: fix aarch32 build
Juraj Linkeš [Wed, 7 Jul 2021 13:25:39 +0000 (15:25 +0200)]
net/virtio: fix aarch32 build

NEON vector path of the PMD needs aarch64 support. But it was
enabled for aarch32 build as well because aarch32 build had
cpu_family set to aarch64. So build for aarch32 will fail due
to unsupported intrinsics.

Fix aarch32 build by updating meson file to exclude NEON vector
implementation for aarch32.

Fixes: 749799482a72 ("net/virtio: add to meson build")
Cc: stable@dpdk.org
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/bnxt: fix aarch32 build
Ruifeng Wang [Wed, 7 Jul 2021 13:25:38 +0000 (15:25 +0200)]
net/bnxt: fix aarch32 build

NEON vector path of the PMD needs aarch64 support. But it was
enabled for aarch32 build as well because aarch32 build had
cpu_family set to aarch64. So build for aarch32 will fail due
to unsupported intrinsics.

Fix aarch32 build by updating meson file to exclude NEON vector
implementation for aarch32.

Fixes: 398358341419 ("net/bnxt: support NEON")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
3 years agonet/sfc: fix aarch32 build
Ruifeng Wang [Wed, 7 Jul 2021 13:25:37 +0000 (15:25 +0200)]
net/sfc: fix aarch32 build

The sfc PMD was enabled for aarch32 which is 32-bit mode but has
cpu_family set to aarch64.
As sfc support only 64-bit system, it should be disabled for aarch32.

Updated meson file to disable sfc for aarch32 build.

Fixes: 141d2870675a ("net/sfc: support aarch64 architecture")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agomaintainers: update for ABI
Ray Kinsella [Tue, 22 Jun 2021 15:50:17 +0000 (16:50 +0100)]
maintainers: update for ABI

Update to ABI MAINTAINERS.

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
3 years agomaintainers: update for Arm v8
Jerin Jacob [Fri, 25 Jun 2021 14:27:20 +0000 (19:57 +0530)]
maintainers: update for Arm v8

Resigning my maintainership for ARM v8 architecture.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
3 years agoconfig/arm: add Qualcomm Centriq 2400 part number
Thierry Herbelot [Thu, 17 Jun 2021 15:13:28 +0000 (17:13 +0200)]
config/arm: add Qualcomm Centriq 2400 part number

0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".

Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agokni: update link only on change
Ferruh Yigit [Thu, 24 Jun 2021 13:32:16 +0000 (14:32 +0100)]
kni: update link only on change

'rte_kni_update_link()' updates virtual KNI interface link using kernel
sysfs interface.
If the requested link status is same as interface link status, do not
update the link status but return with success.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
3 years agobuild: support drivers symlink on Windows
Nick Connolly [Mon, 26 Apr 2021 10:07:32 +0000 (11:07 +0100)]
build: support drivers symlink on Windows

The symlink-drivers-solibs.sh script was disabled as part of 'install'
for Windows because there is no support for shell scripts. However,
this means that driver related DLLs are not present in the installed
'libdir' directory. Add a python script to perform the install and use
it for Windows if the version of meson supports using an external
program with add_install_script (>= 0.55.0).

On Windows, symbolic links are somewhat problematic since the
SeCreateSymbolicLinkPrivilege is required to be able to create them.
In addition, different cross-compilation environments handle symbolic
links differently, e.g. WSL, Msys2, Cygwin. Rather than trying to
distinguish these scenarios, the python script will perform a file copy
for any Windows specific names.

On Windows, the shared library outputs have different names depending
upon which toolset has been used to build them. The script currently
handles Clang and GCC.

On Linux the functionality is unchanged, but could be replaced with the
python script once the required minimum version of meson is >= 0.55.0.

Cc: stable@dpdk.org
Signed-off-by: Nick Connolly <nick.connolly@mayadata.io>
Tested-by: Narcisa Vasile <navasile@linux.microsoft.com>
Acked-by: Narcisa Vasile <navasile@linux.microsoft.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
3 years agotest/power: fix CPU frequency when turbo enabled
Richael Zhuang [Fri, 9 Jul 2021 10:55:48 +0000 (18:55 +0800)]
test/power: fix CPU frequency when turbo enabled

On arm platform, the value in "/sys/.../cpuinfo_cur_freq" may not
be exactly the same as what was set when using CPPC cpufreq driver.
For other cpufreq driver, no need to round it currently, or else
this check will fail with turbo enabled. For example, with acpi_cpufreq,
cpuinfo_cur_freq can be 2401000 which is equal to freqs[0].It should
not be rounded to 2400000.

Fixes: 606a234c6d360 ("test/power: round CPU frequency to check")
Cc: stable@dpdk.org
Signed-off-by: Richael Zhuang <richael.zhuang@arm.com>
Acked-by: David Hunt <david.hunt@intel.com>
3 years agopower: support cppc_cpufreq driver
Richael Zhuang [Fri, 9 Jul 2021 10:55:47 +0000 (18:55 +0800)]
power: support cppc_cpufreq driver

Currently in DPDK only acpi_cpufreq and pstate_cpufreq drivers are
supported, which are both not available on arm64 platforms. Add
support for cppc_cpufreq driver which works on most arm64 platforms.

Signed-off-by: Richael Zhuang <richael.zhuang@arm.com>
Acked-by: David Hunt <david.hunt@intel.com>
3 years agodoc: fix build on Windows with Meson 0.58
Dmitry Kozlyuk [Wed, 30 Jun 2021 16:22:35 +0000 (19:22 +0300)]
doc: fix build on Windows with Meson 0.58

The `doc` target used `echo` as its command.
On Windows, `echo` is always a shell built-in, there is no binary.
Starting from meson 0.58, `run_target()` always searches for command
executable and no longer accepts `echo` as such on Windows.
Replace plain `echo` with a Python one-liner.

Fixes: d02a2dab2dfb ("doc: support building HTML guides with meson")
Cc: stable@dpdk.org
Reported-by: Rob Scheepens <rob.scheepens@nutanix.com>
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
3 years agobuild: use platform for generic and native builds
Juraj Linkeš [Tue, 6 Jul 2021 09:44:28 +0000 (11:44 +0200)]
build: use platform for generic and native builds

The current meson option 'machine' should only specify the ISA, which is
not sufficient for Arm, where setting ISA implies other settings as well
(and is used in Arm configuration as such).
Use the existing 'platform' meson option to differentiate the type of
the build (native/generic) and set ISA accordingly, unless the user
chooses to override it with a new option, 'cpu_instruction_set'.
The 'machine' option set the ISA in x86 builds and set native/default
'build type' in aarch64 builds. These two new variables, 'platform' and
'cpu_instruction_set', now properly set both ISA and build type for all
architectures in a uniform manner.
The 'machine' option also doesn't describe very well what it sets. The
new option, 'cpu_instruction_set', is much more descriptive. Keep
'machine' for backwards compatibility.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
3 years agonet/octeontx/base: fix debug build with clang
David Marchand [Fri, 9 Jul 2021 06:02:29 +0000 (11:32 +0530)]
net/octeontx/base: fix debug build with clang

Remove conflicting declaration of this symbol.

Fixes: d0d654986018 ("net/octeontx: support event Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
3 years agocrypto/cnxk: fix build with asserts
Tejasree Kondoj [Fri, 9 Jul 2021 09:41:47 +0000 (15:11 +0530)]
crypto/cnxk: fix build with asserts

Removing usage of unavailable macro.

Fixes: baee42a6beff ("crypto/cnxk: add IPsec datapath")

Reported-by: Ali Alnubani <alialnu@nvidia.com>
Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
3 years agocrypto/cnxk: add PCI ID for cn9k
Anoob Joseph [Fri, 9 Jul 2021 06:28:43 +0000 (11:58 +0530)]
crypto/cnxk: add PCI ID for cn9k

Add PCI ID for crypo_cn9k PMD.

To avoid conflicting PCI ID in crypto_octeontx2 and crypto_cn9k PMDs,
disable crypto_cn9k PMD when built with octeontx2 config.

The lack of PCI ID is causing debug build to fail on Ubuntu 18.04
for crypto_cn9k PMD.

Reported-by: Ali Alnubani <alialnu@nvidia.com>
Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
3 years agonet/ixgbe: fix flow entry access after freeing
Dapeng Yu [Fri, 9 Jul 2021 03:14:59 +0000 (11:14 +0800)]
net/ixgbe: fix flow entry access after freeing

The original code use a heap pointer after it is freed.
This patch fix it.

Fixes: a14de8b498d1 ("net/ixgbe: destroy consistent filter")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Reviewed-by: Haiyue Wang <haiyue.wang@intel.com>
3 years agonet/i40e: fix descriptor scan on Arm
Joyce Kong [Tue, 6 Jul 2021 06:54:03 +0000 (01:54 -0500)]
net/i40e: fix descriptor scan on Arm

For Arm platforms, reading descs can get re-ordered, then the
status of DD bits will be discontinuous, so add the logic to
only process continuous descs by checking DD bits.

Fixes: 4861cde46116 ("i40e: new poll mode driver")
Cc: stable@dpdk.org
Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agonet/ice: fix VXLAN flow director creation
Dapeng Yu [Wed, 16 Jun 2021 01:20:53 +0000 (09:20 +0800)]
net/ice: fix VXLAN flow director creation

In original implementation, error returned when creating VXLAN flow
director with SCTP or TCP as layer 4 protocol of inner segment.

There are several root causes for the error:
1. ice_fdir_input_set_hdrs() set ICE_FLOW_SEG_HDR_UDP into protocol
header flag of inner segment of VXLAN FDIR rule, even if it shall be
ICE_FLOW_SEG_HDR_TCP or ICE_FLOW_SEG_HDR_SCTP
2. ice_fdir_input_set_hdrs() set ICE_FLOW_SEG_HDR_VXLAN into protocol
header flag of segments of VXLAN FDIR rule, it not necessary, and can
be set automatically by ice_flow_set_fld() later
3. flow type: ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN hides the flow type of
inner segment of VXLAN FDIR rule, then further causes function:
ice_fdir_get_gen_prgm_pkt() cannot write correct protocol id into inner
segment of training packet.

This patch fixes those defects described above.

Fixes: 855d23a07b36 ("net/ice: support VXLAN VNI field in flow director")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: fix VXLAN flow director creation
Dapeng Yu [Wed, 16 Jun 2021 01:20:52 +0000 (09:20 +0800)]
net/ice/base: fix VXLAN flow director creation

In original implementation, error returned when creating VXLAN flow
director with SCTP or TCP as layer 4 protocol of inner segment.

There are several root causes for the error:
1. ice_fdir_udp4_vxlan_pkt[] is not adapted to the TCP and SCTP protocol.
Its length cannot hold TCP header, only UDP protocol was supported in
original implementation
2. VXLAN VNI offset: 45 is inconsistent with IETF RFC 7348

This patch fixes those defects described above.

Fixes: 608cd0a5e283 ("net/ice/base: support VXLAN VNI field in flow director")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice: support QoS bandwidth config after VF reset in DCF
Ting Xu [Thu, 8 Jul 2021 02:33:46 +0000 (10:33 +0800)]
net/ice: support QoS bandwidth config after VF reset in DCF

When VF reset happens, the QoS bandwidth configuration will be lost. If
the reset is not caused by DCB change, it is supposed to replay the
bandwidth configuration to VF by DCF. In this patch, when a vsi update
PF event is received from PF after VF reset, and it is confirmed that
DCB is not changed, bandwidth configuration will be replayed.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice: fix check for QoS in DCF
Ting Xu [Thu, 8 Jul 2021 02:32:25 +0000 (10:32 +0800)]
net/ice: fix check for QoS in DCF

This patch fixed some unreasonable error check. Move all checks into one
helper function before configuring. Skip the check for DCF (VF0).

Fixes: 3a6bfc37eaf4 ("net/ice: support QoS config VF bandwidth in DCF")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/iavf: simplify flow director rules for IP fragment
Wenjun Wu [Wed, 7 Jul 2021 06:18:53 +0000 (14:18 +0800)]
net/iavf: simplify flow director rules for IP fragment

This patch simplify the pattern of flow rules of FDIR for IP fragment.

Flow rule can be created by the following command:
1. flow create 0 ingress pattern eth /
   ipv4 fragment_offset spec 0x2000 fragment_offset mask 0x2000 /
   end <actions>
2. flow create 0 ingress pattern eth / ipv6 /
   ipv6_frag_ext fragment_offset spec 0x0001 fragment_offset mask 0x0001 /
   end <actions>

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice: simplify flow director rules for IP fragment
Wenjun Wu [Wed, 7 Jul 2021 06:18:13 +0000 (14:18 +0800)]
net/ice: simplify flow director rules for IP fragment

This patch simplify the pattern of flow rules of FDIR for IP fragment.

Flow rule can be created by the following command:
1. flow create 0 ingress pattern eth /
   ipv4 fragment_offset spec 0x2000 fragment_offset mask 0x2000 /
   end <actions>
2. flow create 0 ingress pattern eth / ipv6 /
   ipv6_frag_ext fragment_offset spec 0x0001 fragment_offset mask 0x0001 /
   end <actions>

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice: fix memzone leak when firmware is missing
David Marchand [Tue, 6 Jul 2021 14:12:37 +0000 (16:12 +0200)]
net/ice: fix memzone leak when firmware is missing

Caught by our QE.
When the firmware is missing, memzones were not released.

$ dpdk-testpmd -c 0x1f -a 0:0:0.0 -- -i
...

testpmd> dump_memzone
...
Zone 6: name:<RTE_METRICS>, len:0x15040, virt:0x1661b24c0, socket_id:0,
flags:0
physical segments used:
  addr: 0x140000000 iova: 0x140000000 len: 0x40000000 pagesz: 0x40000000

testpmd> port attach 0000:5e:00.0
Attaching a new port...
EAL: Using IOMMU type 1 (Type 1)
EAL: Probe PCI driver: net_ice (8086:159b) device: 0000:5e:00.0 (socket 0)
ice_load_pkg(): failed to open file: /lib/firmware/intel/ice/ddp/ice.pkg

ice_dev_init(): Failed to load the DDP package,Use safe-mode-support=1 to
 enter Safe Mode
EAL: Releasing PCI mapped resource for 0000:5e:00.0
EAL: Calling pci_unmap_resource for 0000:5e:00.0 at 0x2200000000
EAL: Calling pci_unmap_resource for 0000:5e:00.0 at 0x2202000000
EAL: Driver cannot attach the device (0000:5e:00.0)
EAL: Failed to attach device on primary process
testpmd: Failed to attach port 0000:5e:00.0

testpmd> dump_memzone
...
Zone 139: name:<ice_dma_17168374657430093156>, len:0x1000,
  virt:0x1660ed800, socket_id:0, flags:0 physical segments used:
  addr: 0x140000000 iova: 0x140000000 len: 0x40000000 pagesz: 0x40000000

With 20 tries attaching a net/ice port, we would end up with:

EAL: Probe PCI driver: net_ice (8086:159b) device: 0000:5e:00.0 (socket 0)
EAL: memzone_reserve_aligned_thread_unsafe(): Number of requested memzone
  segments exceeds RTE_MAX_MEMZONE
ice_dev_init(): Failed to initialize HW

Fixes: a4c8c48fe3f4 ("net/ice: load OS default package")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
3 years agocommon/mlx5: fix compatibility with OFED port query API
Viacheslav Ovsiienko [Wed, 7 Jul 2021 15:54:28 +0000 (18:54 +0300)]
common/mlx5: fix compatibility with OFED port query API

The compilation flag HAVE_MLX5DV_DR_DEVX_PORT depends on presence
of mlx5dv_query_devx_port routine in rdma-core library.

The mlx5dv_query_devx_port routine exists only in OFED versions
of rdma-core library and is being planned to be removed and replaced
with Upstream compatible mlx5dv_query_port.

As mlx5dv_query_devx_port is being removed all the dependencies on
the HAVE_MLX5DV_DR_DEVX_PORT compilation flag are reconsidered.

The new compilation flag HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT is for
backward compatibility with older OFED versions.

Fixes: 6cfe84fbe7b1 ("net/mlx5: fix port action for LAG")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: use new port query API if available
Viacheslav Ovsiienko [Wed, 7 Jul 2021 15:54:27 +0000 (18:54 +0300)]
common/mlx5: use new port query API if available

In order to get E-Switch vport identifiers the mlx5 PMD relies
on two approaches:
  [a] use port query API if it is provided by rdma-core library
  [b] otherwise, deduce vport ids from the related VF index
The latter is not reliable and may not work with newer kernel
drivers and in some configurations (LAG), causing E-Switch
malfunction. Hence, engaging the port query API is highly
desirable.

Depending on rdma-core version the port query API is:
  - very old OFED versions have no query API (approach [b])
  - rdma-core OFED < 5.5 provides mlx5dv_query_devx_port,
    HAVE_MLX5DV_DR_DEVX_PORT flag is defined (approach [a])
  - rdma-core OFED >= 5.5 has mlx5dv_query_port, flag
    HAVE_MLX5DV_DR_DEVX_PORT_V35 is defined (approach [a])
  - future OFED versions might remove mlx5dv_query_devx_port
    and HAVE_MLX5DV_DR_DEVX_PORT will not be defined
  - Upstream rdma-core < v35 has no port query API (approach [b])
  - Upstream rdma-core >= v35 has  mlx5dv_query_port, flag
    HAVE_MLX5DV_DR_DEVX_PORT_V35 is defined (approach [a])

In order to support the new mlx5dv_query_port routine, the
conditional compilation flag HAVE_MLX5DV_DR_DEVX_PORT_V35
is introduced by this patch. The flag HAVE_MLX5DV_DR_DEVX_PORT
is kept for compatibility with previous rdma-core versions.

Despite this patch is not a bugfix (it follows the introduced API
variation in underlying library), it resolves the compatibility
issue and is highly desired to be ported to DPDK LTS.

Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: control flow rules with identical pattern
Jiawei Wang [Tue, 6 Jul 2021 08:12:27 +0000 (11:12 +0300)]
net/mlx5: control flow rules with identical pattern

In order to allow\disallow configuring rules with identical
patterns, the new device argument 'allow_duplicate_pattern'
is introduced.
If allow, these rules be inserted successfully and only the
first rule take affect.
If disallow, the first rule will be inserted and other rules
be rejected.

The default is to allow.
Set it to 0 if disallow, for example:
-a <PCI_BDF>,allow_duplicate_pattern=0

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: validate meter action in policy
Shun Hao [Tue, 6 Jul 2021 13:14:50 +0000 (16:14 +0300)]
net/mlx5: validate meter action in policy

This adds the validation when creating a policy with meter action.

Currently meter action is only allowed for green color in policy, and
8 meters are supported at maximum in one meter hierarchy.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add meter hierarchy destroy and cleanup
Shun Hao [Tue, 6 Jul 2021 13:14:49 +0000 (16:14 +0300)]
net/mlx5: add meter hierarchy destroy and cleanup

When creating hierarchy meter, its color rules will increase next
meter's reference count, so when destroy the hierarchy meter, also
need to dereference the next meter's count.

During flushing all meters of a port, need to destroy all hierarchy
meters and their policies first, to dereference the last meter in
hierarchy. Then all meters have no reference and can be destroyed.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support meter hierarchy drop count
Shun Hao [Tue, 6 Jul 2021 13:14:48 +0000 (16:14 +0300)]
net/mlx5: support meter hierarchy drop count

When using meter hierarchy with multiple meters, every meter may have
drop counter, so a packet being set red color by one meter should be
counted to that specific meter only.

To support this, add tag action in the color rule so packet going to
next new meter can have its meter id, so as to be counted to the
correct drop counter in drop table.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support meter action in meter policy
Shun Hao [Tue, 6 Jul 2021 13:14:47 +0000 (16:14 +0300)]
net/mlx5: support meter action in meter policy

This makes the meter policy support meter action. So multiple meters
can be chained as a meter hierarchy.

Only termination meter is allowed as the last meter in a hierarchy,
and there're two cases:
1. The last meter has non-RSS policy, can directly create sub-policy
and color rules during each meter's policy creation.
2. The last meter has RSS policy, don't create sub-policy/rules when
creating meter policy. Only when a RTE flow is using the meter hierarchy,
will iterate all meters of the hierarchy and create needed sub-
policies and color rules for them.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: limit inner RSS expansion for MPLS
Xiaoyu Min [Fri, 2 Jul 2021 08:34:48 +0000 (16:34 +0800)]
net/mlx5: limit inner RSS expansion for MPLS

If user wants to do MPLS inner RSS and only provides pattern
till MPLS without inner items [1], RSS expansion will expand flows
into 13 sub-flows[2] which is too many and it impacts flow insert
rate, stack usage becomes large as well.

This expansion into 13 sub-flows seems not worthy of and it can
be significantly reduced (i.e, 7 sub-flows [3]) by user providing
at least one inner L2/L3 item [4].

[1]:
pattern eth / ipv4 / udp / mpls / end actions rss type tcp udp ip
end level 2 / end

[2]:
eth / ipv4 / udp / mpls
eth / ipv4 / udp / mpls / ipv4
eth / ipv4 / udp / mpls / ipv4 / udp
eth / ipv4 / udp / mpls / ipv4 / tcp
eth / ipv4 / udp / mpls / ipv6
eth / ipv4 / udp / mpls / ipv6 / udp
eth / ipv4 / udp / mpls / ipv6 / tcp
eth / ipv4 / udp / mpls / eth / ipv4
eth / ipv4 / udp / mpls / eth / ipv4 / udp
eth / ipv4 / udp / mpls / eth / ipv4 / tcp
eth / ipv4 / udp / mpls / eth / ipv6
eth / ipv4 / udp / mpls / eth / ipv6 / udp
eth / ipv4 / udp / mpls / eth / ipv6 / tcp

[3]:
eth / ipv4 / udp / mpls / eth
eth / ipv4 / udp / mpls / eth / ipv4 / udp
eth / ipv4 / udp / mpls / eth / ipv4 / tcp
eth / ipv4 / udp / mpls / eth / ipv6
eth / ipv4 / udp / mpls / eth / ipv6 / udp
eth / ipv4 / udp / mpls / eth / ipv6 / tcp

[4]:
pattern eth / ipv4 / udp / mpls / eth / end actions rss type tcp udp ip
level 2 / end

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix MPLS RSS expansion
Xiaoyu Min [Fri, 2 Jul 2021 08:34:47 +0000 (16:34 +0800)]
net/mlx5: fix MPLS RSS expansion

MPLSoUDP and MPLSoGRE are supported by PMD from
rte flow point of view.

RSS expansion doesn't support above but, instead, supports
normal MPLS over L2, which actually will be rejected by PMD.

This patch removes RSS expansion support of the MPLS over L2
and adds support of MPLSoUDP and MPLSoGRE.

In addition to above, support for eth over MPLS expansion is
added too.

Fixes: a4a5cd21d20a ("net/mlx5: add flow MPLS item")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: remove unsupported flow item MPLS over IP
Xiaoyu Min [Fri, 2 Jul 2021 08:34:46 +0000 (16:34 +0800)]
net/mlx5: remove unsupported flow item MPLS over IP

HW doesn't support match MPLS over IP traffic.

Remove related code.

Fixes: d1abe664ddde ("net/mlx5: add MPLS to Direct Verbs flow engine")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix offset calculation for modify field action
Alexander Kozyrev [Mon, 5 Jul 2021 09:47:04 +0000 (12:47 +0300)]
net/mlx5: fix offset calculation for modify field action

Offsets are not taken into account during MAC addresses
manipulation for the MODIFY_FIELD action. That leads to
a wrong split between 0-15 and 16-47 bits and corrupted
data being copied to/from MAC addresses. Use both source
and destination offsets to calcucate the proper modify
header action specification.

Fixes: fdd0c046f4 ("net/mlx5: fix modify field action order for MAC")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix L4 integrity translation
Gregory Etelson [Mon, 5 Jul 2021 09:05:00 +0000 (12:05 +0300)]
net/mlx5: fix L4 integrity translation

MLX5 PMD supports L3 and L4 integrity bits.
L4 checksum-ok bit was not translated correctly.
The patch updates the l4_csum_ok integrity bit translation.

Fixes: 79f8952783d0 ("net/mlx5: support integrity flow item")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agocommon/mlx5: fix Netlink receive message buffer size
Viacheslav Ovsiienko [Thu, 1 Jul 2021 07:31:33 +0000 (10:31 +0300)]
common/mlx5: fix Netlink receive message buffer size

If there are many VFs the Netlink message length sent by kernel
in reply to RTM_GETLINK request can be large. We should query
the size of message being received in advance and allocate
the large enough buffer to handle these large messages.

Fixes: ccdcba53a3f4 ("net/mlx5: use Netlink to add/remove MAC addresses")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix match MPLS over GRE with key
Xiaoyu Min [Thu, 1 Jul 2021 05:54:56 +0000 (13:54 +0800)]
net/mlx5: fix match MPLS over GRE with key

Currently PMD needs previous layer information in order to set
corresponding match field for MPLSoGRE or MPLSoUDP.

GRE_KEY item is missing as supported previous layer when translate
item MPLS, which causes flow[1] cannot match MPLS over GRE traffic.

According to RFC4023, MPLS over GRE tunnel with optional key
field needs to be supported too.

By adding missing GRE_KEY as supported previous layer fix problem.

[1]:
flow create 0 ingress pattern eth / ipv6 / gre k_bit is 1 / gre_key /
mpls label is 966138 / end actions queue index 1 / mark id 0xa / end

Fixes: a7a0365565a4 ("net/mlx5: match GRE key and present bits")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix pattern expansion in RSS flow rules
Gregory Etelson [Wed, 30 Jun 2021 07:19:52 +0000 (10:19 +0300)]
net/mlx5: fix pattern expansion in RSS flow rules

Flow rule pattern may be implicitly expanded by the PMD if the rule
has RSS flow action. The expansion adds network headers to the
original pattern. The new pattern lists all network levels that
participate in the rule RSS action.

The patch validates that buffer for expanded pattern has enough bytes
for new flow items.

Fixes: c7870bfe09dc ("ethdev: move RSS expansion code to mlx5 driver")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: add more details to flow dump
Haifei Luo [Mon, 31 May 2021 02:22:08 +0000 (05:22 +0300)]
net/mlx5: add more details to flow dump

Currently the flow dump provides few information about actions
- just the pointers. Add implementations to display details for
counter, modify_hdr and encap_decap actions.

For counter, the regular flow operation query is engaged and
the counter content information is provided, including hits
and bytes values.For modify_hdr, encap_and decap actions,
the information stored in the ipool objects is dumped.

There are the formats of information presented in the dump:
Counter: rec_type,id,hits,bytes
Modify_hdr: rec_type,id,actions_number,actions
Encap_decap: rec_type,id,buf

Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix r/w lock usage in DMA unmap
Feifei Wang [Thu, 27 May 2021 09:48:06 +0000 (17:48 +0800)]
net/mlx5: fix r/w lock usage in DMA unmap

For mlx5 DMA unmap, write lock should be used for rebuilding memory
region cache table rather than read lock.

Fixes: 989e999d9305 ("net/mlx5: support PCI device DMA map and unmap")
Cc: stable@dpdk.org
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix meter policy flow match item
Shun Hao [Fri, 2 Jul 2021 09:14:46 +0000 (12:14 +0300)]
net/mlx5: fix meter policy flow match item

Currently when creating meter policy, a src port_id match item will
always be added in switch domain. So if one meter is used by another
port, it will not work correctly.

This issue is solved:
1. If policy fate action is port_id, add the src port_id match item,
and the meter cannot be shared by another port.
2. If policy fate action isn't port_id, don't add the src port_id
match, meter can be shared by another port.

This fix enables one meter being shared by different ports. User can
create a meter flow using a port_id match item to make this meter
shared by other port.

Fixes: afb4aa4f122 ("net/mlx5: support meter policy operations")
Cc: stable@dpdk.org
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix meter flow direction check
Shun Hao [Fri, 2 Jul 2021 09:14:45 +0000 (12:14 +0300)]
net/mlx5: fix meter flow direction check

When preparing prefix flow using ASO meter, if it's tx flow, need
to make meter action the first one.

Currently the check of flow direction in switch domain is incorrect
that it checks the flow dev port only.

This adds the fix for the check that if there's port_id match item
in flow, use that port_id as src port to determine flow direction.

Fixes: c99b4f8bc2f1 ("net/mlx5: support ASO meter action")
Cc: stable@dpdk.org
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix meter policy ID table container
Shun Hao [Fri, 2 Jul 2021 09:14:44 +0000 (12:14 +0300)]
net/mlx5: fix meter policy ID table container

The meter policy handlers are managed by user IDs and the driver used l3
table in order to map the user ID to the internal driver handler of the
policy.

The l3 table was wrongly saved in the shared device structure which
manages all the switch domain ports what made the user IDs shared
between different ethdev ports.

Move the policy l3 table to be per port by saving it in the port private
structure.

Fixes: afb4aa4f122 ("net/mlx5: support meter policy operations")
Cc: stable@dpdk.org
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: optimize meter profile lookup
Shun Hao [Fri, 2 Jul 2021 09:14:43 +0000 (12:14 +0300)]
net/mlx5: optimize meter profile lookup

Currently a list is used to save all meter profile ids, which is
not efficient when looking up profile from huge amount of profiles.

This changes to use an l3 table instead to save meter profile ids,
so as to improve the lookup performance.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agodoc: add limitation for ConnectX-4 with L2 in mlx5 guide
Dmitry Kozlyuk [Wed, 30 Jun 2021 07:01:06 +0000 (10:01 +0300)]
doc: add limitation for ConnectX-4 with L2 in mlx5 guide

ConnectX-4 and ConnectX-4 Lx NICs require all L2 headers of transmitted
packets to be inlined. By default only first 18 bytes are inlined,
which is insufficient if additional encapsulation is used, like Q-in-Q.
Thus, default settings caused such traffic to be dropepd on Tx.
Document a recommendation to increase inlined data size in such cases.

Fixes: 505f1fe426d3 ("net/mlx5: add Tx devargs")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix TSO multi-segment inline length
Viacheslav Ovsiienko [Sun, 20 Jun 2021 06:30:28 +0000 (09:30 +0300)]
net/mlx5: fix TSO multi-segment inline length

The inline data length for TSO ethernet segment should be
calculated from the TSO header instead of the inline size
configured by txq_inline_min devarg or reported by the NIC.
It is imposed by the nature of TSO offload - inline header
is being duplicated to every output TCP packet.

Fixes: cacb44a09962 ("net/mlx5: add no-inline Tx flag")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix representor ID check for sampling
Jiawei Wang [Tue, 29 Jun 2021 06:59:53 +0000 (09:59 +0300)]
net/mlx5: fix representor ID check for sampling

The representor definition was introduced in the latest code.
For non-representor port, like PF port, use the 0xffff instead of -1.

This patch updates the representor id checking during splitting sample
flow.

Fixes: cb95feefdd03 ("net/mlx5: support sub-function representor")
Cc: stable@dpdk.org
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Xueming Li <xuemingl@nvidia.com>
3 years agocommon/mlx5: fix memory region leak
Michael Baum [Mon, 28 Jun 2021 15:06:14 +0000 (18:06 +0300)]
common/mlx5: fix memory region leak

All the mlx5 drivers using MRs for data-path must unregister the mapped
memory when it is freed by the dpdk process.

Currently, only the net/eth driver unregisters MRs in free event.

Move the net callback handler from net driver to common.

Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix flow modify action validation
Jiawei Wang [Mon, 28 Jun 2021 10:58:28 +0000 (13:58 +0300)]
net/mlx5: fix flow modify action validation

The introduced MODIFY_FIELD action was used to manipulate
the packet header field through copy or set operations.

These modify header actions should be counted as one action
in low level, the current code used wrong actions flags
checking for modify field action.

This patch update the action flags checking into the correct
MODIFY_HDR_ACTIONS set.

Fixes: 641dbe4fb053 ("net/mlx5: support modify field flow action")
Cc: stable@dpdk.org
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix multi-segment inline for the first segments
Viacheslav Ovsiienko [Tue, 22 Jun 2021 16:40:49 +0000 (19:40 +0300)]
net/mlx5: fix multi-segment inline for the first segments

Before 19.08 release the Tx burst routines of mlx5 PMD
provided data inline for the first short segments of the
multi-segment packets. In the release 19.08 mlx5 Tx datapath
was refactored and this behavior was broken, affecting the
performance.

For example, the T-Rex traffic generator might use small
leading segments to handle packet headers and performance
degradation was noticed.

If the first segments of the multi-segment packet are short
and the overall length is below the inline threshold it
should be inline into the WQE to fix the performance.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agonet/mlx5: fix meter policy with RSS action
Li Zhang [Wed, 23 Jun 2021 07:24:40 +0000 (10:24 +0300)]
net/mlx5: fix meter policy with RSS action

When creating the meter sub-policy RSS rule,
the RSS descriptor was used before its update.
It also need update tunnel bit in RSS descriptor
after flow translate.

Use it only when it is updated.

Fixes: ec962bad14e ("net/mlx5: fix metering cleanup on stop")
Cc: stable@dpdk.org
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add TCP and IPv6 to supported items for Windows
Tal Shnaiderman [Tue, 22 Jun 2021 15:34:50 +0000 (18:34 +0300)]
net/mlx5: add TCP and IPv6 to supported items for Windows

WINOF2 2.70 Windows kernel driver allows DevX rule creation
of types TCP and IPv6.

Added the types to the supported items in mlx5_flow_os_item_supported
to allow them to be created in the PMD.

Added description of new rules support in Windows kernel driver WINOF2 2.70
to the mlx5 driver guide.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/bnxt: fix Rx interrupt setting
Ajit Khaparde [Tue, 25 May 2021 17:35:22 +0000 (10:35 -0700)]
net/bnxt: fix Rx interrupt setting

Don't set rxq interrupt config
Applications can set the rxq interrupt config to 1 or 0 as needed.
If an application is not interested in handling Rx interrupts and
prefers to poll Rx rings, there is no need for the PMD to set this
config option to 1.

Fixes: 1fe427fd08ee ("net/bnxt: support enable/disable interrupt")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
3 years agonet/bnxt: fix ring allocation and free
Ajit Khaparde [Thu, 24 Jun 2021 20:47:08 +0000 (13:47 -0700)]
net/bnxt: fix ring allocation and free

Fix handling of ring alloc and free logic to fix check for invalid ring and
context IDs. This also avoids code duplication.

Fixes: 6133f207970c ("net/bnxt: add Rx queue create/destroy")
Fixes: 51c87ebafc7d ("net/bnxt: add Tx queue create/destroy")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
3 years agonet/bnxt: support runtime queue setup
Ajit Khaparde [Wed, 12 May 2021 07:58:07 +0000 (00:58 -0700)]
net/bnxt: support runtime queue setup

Add support for runtime Rx and Tx queue setup. This will allow
Rx/Tx queue setup after the interface is started.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: remove dead code
Lance Richardson [Wed, 16 Jun 2021 17:55:23 +0000 (13:55 -0400)]
net/bnxt: remove dead code

Code related to maintaining completion ring "valid" state is
no longer needed, remove it.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
3 years agonet/bnxt: fix scalar Tx completion handling
Lance Richardson [Wed, 16 Jun 2021 17:55:22 +0000 (13:55 -0400)]
net/bnxt: fix scalar Tx completion handling

Preserve the raw (unmasked) transmit completion ring
consumer index.

Remove cache prefetches that have no measurable performance
benefit.

Fixes: c7de4195cc4c ("net/bnxt: modify ring index logic")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: fix Tx descriptor status implementation
Lance Richardson [Wed, 16 Jun 2021 17:55:21 +0000 (13:55 -0400)]
net/bnxt: fix Tx descriptor status implementation

With Tx completion batching, a single transmit completion
can correspond to one or more transmit descriptors, adjust
implementation to account for this.

RTE_ETH_TX_DESC_DONE should be returned for descriptors that
are available for use instead of RTE_ETH_TX_DESC_UNAVAIL.

Fixes: 5735eb241947 ("net/bnxt: support Tx batching")
Fixes: 478ed3bb7b9d ("net/bnxt: support Tx descriptor status")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: fix ring and context memory allocation
Lance Richardson [Wed, 16 Jun 2021 17:55:20 +0000 (13:55 -0400)]
net/bnxt: fix ring and context memory allocation

Use requested socket ID when allocating memory for transmit rings,
receive rings, and completion queues. Use device NUMA ID when
allocating context memory, notification queue rings, async
completion queue rings, and VNIC attributes.

Fixes: 6eb3cc2294fd ("net/bnxt: add initial Tx code")
Fixes: 9738793f28ec ("net/bnxt: add VNIC functions and structs")
Fixes: f8168ca0e690 ("net/bnxt: support thor controller")
Fixes: bd0a14c99f65 ("net/bnxt: use dedicated CPR for async events")
Fixes: 683e5cf79249 ("net/bnxt: use common NQ ring")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: invoke device removal event on recovery failure
Kalesh AP [Wed, 9 Jun 2021 03:13:32 +0000 (08:43 +0530)]
net/bnxt: invoke device removal event on recovery failure

When the driver receives RESET_NOTIFY async event from FW or detects
a FW fatal error condition, it tries to recover from the error.
When the driver fails to recover from the error condition, fixed to
send device removal event to the application.

Fixes: df6cd7c1f73a ("net/bnxt: handle reset notify async event from FW")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: fix auto-negociation on Whitney+
Kalesh AP [Wed, 9 Jun 2021 03:13:31 +0000 (08:43 +0530)]
net/bnxt: fix auto-negociation on Whitney+

Driver should enable autoneg on a port if FW supports it.
Because of a wrong check, driver is not enabling autoneg
on a port after setting forced speed on Whitney+.

Fixes: 7bc8e9a227cc ("net/bnxt: support async link notification")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: fix typo in log message
Kalesh AP [Wed, 9 Jun 2021 03:13:30 +0000 (08:43 +0530)]
net/bnxt: fix typo in log message

In bnxt_rss_hash_update_op, check for valid RSS hashkey length is
made against size HW_HASH_KEY_SIZE(40). But the failure log says
"Invalid hashkey length, should be 16 bytes".

Fixes: 91aee9711ee3 ("net/bnxt: validate RSS hash key length")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
3 years agonet/bnxt: cleanup code
Kalesh AP [Wed, 9 Jun 2021 03:13:29 +0000 (08:43 +0530)]
net/bnxt: cleanup code

This is a cleanup commit and no functional change.

1. use macros instead of hard coded values
2. remove unnecessary comments

Fixes: 5cd0e2889c43 ("net/bnxt: support NIC Partitioning")
Fixes: 2ba07b7dbd9d ("net/bnxt: set the hash key size")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: dump SFP module info
Kalesh AP [Wed, 9 Jun 2021 02:45:15 +0000 (08:15 +0530)]
net/bnxt: dump SFP module info

Add support to fetch the SFP EEPROM settings from the firmware.
For SFP+ modules we will display 0xA0 page for status and 0xA2 page
for other information. For QSFP modules we will show the 0xA0 page.

Also identify the module types for QSFP28, QSFP, QSFP+ apart
from the SFP modules and return an error for 10GBase-T PHY.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
3 years agonet/bnxt: support Thor template
Mike Baucom [Sun, 30 May 2021 08:59:29 +0000 (14:29 +0530)]
net/bnxt: support Thor template

Template adds non-VF representor based support.
Item matches supported:
- DMAC, SIP, DIP, Proto, Sport, Dport
- SIP, DIP, Proto, Sport, Dport
Actions supported:
- count, drop

Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: reorganize ULP template directory structure
Venkat Duvvuru [Sun, 30 May 2021 08:59:28 +0000 (14:29 +0530)]
net/bnxt: reorganize ULP template directory structure

Reorganize ULP template directory structure and add meson.build
file to the respective directories.

Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: cleanup ULP parser and mapper
Shahaji Bhosle [Sun, 30 May 2021 08:59:27 +0000 (14:29 +0530)]
net/bnxt: cleanup ULP parser and mapper

1. Disable accum_stats for Thor
2. Delete the generic port table for default flow
3. The packet mask to calculate the number of packets must be 28 bits.
4. Increase the WC TCAM entries to 512 per application and add 2
   shared L2 context TCAM entries to match identifiers for flow
   scaling
5. Ignore multiple critical resources in ULP flow database
6. Renamed conditional code update to function opcode.
7. Updated TRUFLOW debug logs to support the above changes.
8. As part of the HA cleanup, the shared session name now allows the user
   to designate that the session uses the wc_tcam regions within the
   shared session.
9. The CFA action pointer does not exist if there is no support for
   VF representor, so no need to display the message for use case where
   there is no support for VF representors.
10. Cleanup flow counter software accumulation.
11. When an application exits ungracefully, the HA code now
    clears the appropriate shared WC region and sets the HA state.
12. Removal of unnecessary INFO message.  The message is an indicator that
    the ports are being removed from DPDK, but all cleanup has not
    completed.  Once the cleanup is completed, the timer will be stopped.

Signed-off-by: Shahaji Bhosle <sbhosle@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: add context list for timers
Kishore Padmanabha [Sun, 30 May 2021 08:59:26 +0000 (14:29 +0530)]
net/bnxt: add context list for timers

Add context in ULP for timers.
The alarm callback needs to have a valid context pointer when it is
invoked. The context could become invalid if the port goes down and
the callback is invoked before it is cancelled.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: add ICMPv6 parser to ULP
Kishore Padmanabha [Sun, 30 May 2021 08:59:25 +0000 (14:29 +0530)]
net/bnxt: add ICMPv6 parser to ULP

This patch adds support for parsing rte_flow items for ICMPv6 flows.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: add HA support in ULP
Mike Baucom [Sun, 30 May 2021 08:59:24 +0000 (14:29 +0530)]
net/bnxt: add HA support in ULP

Add the ability for cooperative applications to share resources and
use the high availability functionality in the HW.

Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: add templates for shared sessions
Kishore Padmanabha [Sun, 30 May 2021 08:59:23 +0000 (14:29 +0530)]
net/bnxt: add templates for shared sessions

1. Add template support for shared sessions.
2. Store the shared session flag in flow data base.
3. Store WC TCAM region in the computational field.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: process resource lists before session open
Mike Baucom [Sun, 30 May 2021 08:59:22 +0000 (14:29 +0530)]
net/bnxt: process resource lists before session open

Shared sessions require both named and unnamed resources to be requested
during a tf_open_session. ULP uses named resources for global resources
that are pre-allocated and remain through the life of the application.
Unnamed resources are generally per flow resources and allocated on
demand. The sum of both named and unnamed resources must be requested
when initializing the session.  The ulp_init now processes both lists
prior to calling tf_open_session for both shared and regular sessions.

Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: support application ID in ULP matcher
Kishore Padmanabha [Sun, 30 May 2021 08:59:21 +0000 (14:29 +0530)]
net/bnxt: support application ID in ULP matcher

The application id in the ULP matcher makes the template matching
restrict to only flows that are supported for that application.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
3 years agonet/bnxt: add field opcodes in ULP
Kishore Padmanabha [Sun, 30 May 2021 08:59:20 +0000 (14:29 +0530)]
net/bnxt: add field opcodes in ULP

Add field opcodes that perform logical evaluation of
multiple conditions. Also add more logging especially in
error path.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>