Thomas Monjalon [Mon, 8 Nov 2021 18:58:00 +0000 (18:58 +0000)]
gpudev: support multi-process
The device data shared between processes are moved in a struct
allocated in a shared memory (a new memzone for all GPUs).
The main struct rte_gpu references the shared memory
via the pointer mpshared.
The API function rte_gpu_attach() is added to attach a device
from the secondary process.
The function rte_gpu_allocate() can be used only by primary process.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Mon, 8 Nov 2021 18:57:59 +0000 (18:57 +0000)]
gpudev: add child device representing a device context
The computing device may operate in some isolated contexts.
Memory and processing are isolated in a silo represented by
a child device.
The context is provided as an opaque by the caller of
rte_gpu_add_child().
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Mon, 8 Nov 2021 18:57:58 +0000 (18:57 +0000)]
gpudev: add event notification
Callback functions may be registered for a device event.
Callback management is per-process and not thread-safe.
The events RTE_GPU_EVENT_NEW and RTE_GPU_EVENT_DEL
are notified respectively after creation and before removal
of a device, as part of the library functions.
Some future events may be emitted from drivers.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Elena Agostini [Mon, 8 Nov 2021 18:57:57 +0000 (18:57 +0000)]
gpudev: introduce GPU device class library
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
The new library gpudev is for dealing with GPGPU computing devices
from a DPDK application running on the CPU.
The infrastructure is prepared to welcome drivers in drivers/gpu/.
Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:19 +0000 (14:15 +0000)]
vfio: set errno on unsupported OS
Currently, when code is running on FreeBSD or Windows, there is no way
to distinguish between a geniune error and a "VFIO is unsupported"
error. Fix the dummy implementations to also set the rte_errno flag.
Fixes:
279b581c897d ("vfio: expose functions")
Fixes:
c564a2a20093 ("vfio: expose clear group function for internal usages")
Fixes:
964b2f3bfb07 ("vfio: export some internal functions")
Fixes:
ea2dc1066870 ("vfio: add multi container support")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:18 +0000 (14:15 +0000)]
vfio: fix FreeBSD documentation
On FreeBSD, `rte_vfio_is_enabled()` and `rte_vfio_noiommu_is_enabled()`
API calls will not return error, and will instead return 0. This is
intentional, because the caller of this API does not care whether VFIO
is supported at all, and will instead be interested in whether VFIO is
enabled or not. However, the doxygen comments for these functions state
that they will return an error on FreeBSD, which is incorrect.
Fix the doxygen comment to call out the fact that these
functions are only relevant on Linux, but remove the reference to
returning errors.
Fixes:
279b581c897d ("vfio: expose functions")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:17 +0000 (14:15 +0000)]
vfio: fix FreeBSD clear group stub
On FreeBSD, `rte_vfio_clear_group()` was returning 0 even though this
function is not valid for FreeBSD, and is called out to return error in
doxygen comments.
Fix the return value to match documentation.
Fixes:
c564a2a20093 ("vfio: expose clear group function for internal usages")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:16 +0000 (14:15 +0000)]
vfio: drop fallback Linux implementation
Currently, VFIO support for Linux is compiled unconditionally, and
supported kernel versions start with 4.4, so VFIO is assumed to always
be enabled. There is no way of disabling VFIO support at compile time
anyway, so just drop the "VFIO not available" fallback code altogether.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Chengwen Feng [Fri, 23 Apr 2021 08:12:42 +0000 (16:12 +0800)]
kni: check error code of allmulticast mode switch
Some drivers may return errcode when switch allmulticast mode,
so it's necessary to check the return code.
Fixes:
b34801d1aa2e ("kni: support allmulticast mode set")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ferruh Yigit [Wed, 3 Nov 2021 12:59:50 +0000 (12:59 +0000)]
kni: update kernel API to set random MAC address
Previously used 'random_ether_addr()' API is removed in upstream kernel
with commit
Commit
ba530fea8ca1 ("ethernet: remove random_ether_addr()")
Replacement API 'eth_random_addr()' is around since v3.6 [1], so
simply switching to this API without any version checks.
[1]
0a4dd594982a ("etherdevice: Rename random_ether_addr to eth_random_addr")
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Satheesh Paul [Tue, 2 Nov 2021 10:50:41 +0000 (16:20 +0530)]
app/flow-perf: add random priority option
Added support to create flows with priority attribute set
randomly between 0 and a user supplied maximum value. This
is useful to measure performance on NICs which may have to
rearrange flows to honor flow priority.
Removed the lower limit of 100000 flows per batch.
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Wisam Jaddo <wisamm@nvidia.com>
Raja Zidane [Thu, 28 Oct 2021 13:58:50 +0000 (13:58 +0000)]
common/mlx5: fix MMO configuration in DevX queue pair
The QP extension valid bit was not set in the QP creation for MMO
configuration.
That caused the QP not to be connected to the GGA MMO engines,
and any MMO WQE job got CQE with an error.
Set the QP ext bit when MMO is configured.
Fixes:
ddda0006188a ("common/mlx5: add MMO configuration for DevX queue pair")
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Raja Zidane [Thu, 28 Oct 2021 13:58:49 +0000 (13:58 +0000)]
common/mlx5: fix HCA capabilities PRM alignment
0x20 reserved bytes were missed in the HCA cap PRM structure before the
newly added fields for MMO QP capabilities.
That caused reading MMO QP caps incorrectly.
Add the reserved fields in the HCA cap structure.
Fixes:
cbc4c13a255e ("common/mlx5: update MMO HCA capabilities")
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Juraj Linkeš [Fri, 5 Nov 2021 11:56:30 +0000 (12:56 +0100)]
config/arm: split aarch32 options
Aarch32 config got overlooked when splitting march in a previous patch.
Fixes:
95e0f23022a3 ("config/arm: split -march into arch and features")
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:50 +0000 (11:01 -0700)]
dma/cnxk: add statistics
Add the stats function to get the DMA statistics.
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:49 +0000 (11:01 -0700)]
dma/cnxk: add scatter-gather copy
Add the copy_sg function that will do the multiple DMA transfers of
different sizes and different source/destination as well.
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:48 +0000 (11:01 -0700)]
dma/cnxk: add channel operations
Add functions for the dmadev vchan setup and DMA operations.
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:47 +0000 (11:01 -0700)]
dma/cnxk: create and initialize device on PCI probing
This patch creates and initializes a dmadev device on pci probe.
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:46 +0000 (11:01 -0700)]
common/cnxk: add DPI DMA support
Add base support as ROC(Rest of Chip) API which will be used by PMD
dmadev driver.
This patch adds routines to init, fini, configure the DPI DMA device
found in Marvell's CN9k or CN10k SoC families.
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:43 +0000 (20:37 +0800)]
usertools/devbind: add Kunpeng DMA
Add Kunpeng DMA device ID to dmadev category.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:42 +0000 (20:37 +0800)]
dma/hisilicon: support multi-process
This patch add multi-process support for Kunpeng DMA devices.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:41 +0000 (20:37 +0800)]
dma/hisilicon: add data path
This patch add data path functions for Kunpeng DMA devices.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:40 +0000 (20:37 +0800)]
dma/hisilicon: add control path
This patch add control path functions for Kunpeng DMA devices.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:39 +0000 (20:37 +0800)]
dma/hisilicon: add probing
This patch add dmadev instances create during the PCI probe, and
destroy them during the PCI remove. Internal structures and HW
definitions was also included.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:38 +0000 (20:37 +0800)]
dma/hisilicon: introduce driver skeleton
Add the basic device probe and remove functions and initial
documentation for new hisilicon DMA drivers.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Ali Alnubani [Sun, 7 Nov 2021 16:30:54 +0000 (18:30 +0200)]
sched: fix debug build
Compare pkt_len to 0 instead of NULL to avoid the following build
failure with debug mode enabled:
../lib/sched/rte_pie.h: In function 'rte_pie_enqueue_empty':
../lib/sched/rte_pie.h:125:21: error: comparison between pointer
and integer [-Werror]
RTE_ASSERT(pkt_len != NULL);
Bugzilla ID: 878
Fixes:
44c730b0e379 ("sched: add PIE based congestion management")
Signed-off-by: Ali Alnubani <alialnu@nvidia.com>
David Marchand [Fri, 5 Nov 2021 13:29:51 +0000 (14:29 +0100)]
app: fix external dependency linking
ext_deps was not used in app/meson.build
so testpmd dependency on jansson was ignored.
testpmd currently can be linked because metrics library is pulling
the dependency on libjansson.
Fixes:
59f3a8acbcdb ("app/testpmd: add flex item commands")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Gregory Etelson <getelson@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 18:35:13 +0000 (20:35 +0200)]
common/mlx5: fix post doorbell barrier
The rdma-core library can map doorbell register in two ways, depending
on the environment variable "MLX5_SHUT_UP_BF":
- as regular cached memory, the variable is either missing or set to
zero. This type of mapping may cause the significant doorbell
register writing latency and requires an explicit memory write
barrier to mitigate this issue and prevent write combining.
- as non-cached memory, the variable is present and set to not "0"
value. This type of mapping may cause performance impact under
heavy loading conditions but the explicit write memory barrier is
not required and it may improve core performance.
The UAR creation function maps a doorbell in one of the above ways
according to the system. In run time, it always adds an explicit memory
barrier after writing to.
In cases where the doorbell was mapped as non-cached memory, the
explicit memory barrier is unnecessary and may impair performance.
The commit [1] solved this problem for a Tx queue. In run time, it
checks the mapping type and provides the memory barrier after writing to
a Tx doorbell register if it is needed. The mapping type is extracted
directly from the uar_mmap_offset field in the queue properties.
This patch shares this code between the drivers and extends the above
solution for each of them.
[1] commit
8409a28573d3
("net/mlx5: control transmit doorbell register mapping")
Fixes:
f8c97babc9f4 ("compress/mlx5: add data-path functions")
Fixes:
8e196c08ab53 ("crypto/mlx5: support enqueue/dequeue operations")
Fixes:
4d4e245ad637 ("regex/mlx5: support enqueue")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 18:35:12 +0000 (20:35 +0200)]
net/mlx5: remove duplicated reference of Tx doorbell
The Tx doorbell has different virtual addresses per process.
The secondary process takes the UAR physical page ID of the primary and
mmap it to its own virtual address.
The primary doorbell references were saved in two shared memory
locations: the TxQ structure and a dedicated doorbell array.
Remove the doorbell reference from the TxQ structure and move the
primary processes to take the UAR information from the primary doorbell
array.
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 18:35:11 +0000 (20:35 +0200)]
common/mlx5: fix doorbell mapping configuration
UAR mapping type can be affected by the devarg tx_db_nc, which can cause
setting the environment variable MLX5_SHUT_UP_BF.
So, the MLX5_SHUT_UP_BF value and the UAR mapping parameter affect the
UAR cache mode.
Wrongly, the devarg was considered for the MLX5_SHUT_UP_BF but not for
the UAR mapping parameter in all the drivers except the net.
Take the tx_db_nc devarg into account for all the drivers.
Fixes:
ca1418ce3910 ("common/mlx5: share device context object")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 18:35:10 +0000 (20:35 +0200)]
common/mlx5: fix UAR allocation diagnostics messages
Depending on kernel capabilities and rdma-core version the mapping of
UAR (User Access Region) of desired memory caching type (non-cached or
write combining) might fail. The PMD implements the flexible strategy
of UAR mapping, alternating the type of caching to succeed.
During this process the failure diagnostics messages are emitted.
These messages are merely diagnostics ones and the logging level should
be adjusted to DEBUG.
Fixes:
9cc0e99c81ab0 ("common/mlx5: share UAR allocation routine")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 18:35:09 +0000 (20:35 +0200)]
common/mlx5: remove unreachable branch in UAR allocation
The User Access Region (UAR) provides access to the hardware resources
like Doorbell Register from userspace.
It means the resources should be mapped by the kernel to some virtual
address range. There two types of memory mapping are supported by mlx5
kernel driver:
MLX5DV_UAR_ALLOC_TYPE_NC - non-cached, all writes promoted directly to
hardware.
MLX5DV_UAR_ALLOC_TYPE_BF - "BlueFlame", all writes might be cached by
CPU, and will be flushed to hardware
explicitly with memory barriers.
The supported mapping types depend on the platform (x86/ARM/etc), kernel
version, driver version, virtualization environment (hypervisor), etc.
In UAR allocation, if the system supports the allocation with non-cached
mapping, the first attempt is performed with MLX5DV_UAR_ALLOC_TYPE_NC.
Then, if this fails, the next attempt is done with
MLX5DV_UAR_ALLOC_TYPE_BF.
However, the function adds a condition for the case where the first
attempt was performed with MLX5DV_UAR_ALLOC_TYPE_BF, a condition that is
unattainable since the first attempt was always performed with
MLX5DV_UAR_ALLOC_TYPE_NC.
Remove the unreachable code.
Fixes:
9cc0e99c81ab0 ("common/mlx5: share UAR allocation routine")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 18:35:08 +0000 (20:35 +0200)]
crypto/mlx5: fix login release in probing and removal
The probe function creates DevX object named login and saves pointer to
it in priv structure.
The remove function releases first the priv structure and then releases
the login object.
However, the pointer to login object is field of priv structure, which
is invalid.
Release the login object and then release the priv structure.
Fixes:
debb27ea3442 ("crypto/mlx5: create login object using DevX")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 10:17:07 +0000 (12:17 +0200)]
common/mlx5: make multi-process MR management port-agnostic
In the multi-process mechanism, there are things that the secondary
process does not perform itself but asks the primary process to perform
for it.
There is a special API for communication between the processes that
receives parameters necessary for the specific action required as well
as a special structure called mp_id that contains the port number of the
processes through which the initial process finds the relevant ETH
device for the processes.
One of the operations performed through this mechanism is the creation
of a memory region, where the secondary process sends the virtual
address as a parameter and the mp_id structure with the port number
inside it.
However, once the memory area management is shared between the drivers
and either port number or ETH device is no longer relevant to them, it
seems unnecessary to continue communicating between the processes
through the mp_id variable.
In this patch we will remove the use of the above structure for all MR
management, and add to the specific parameter of operations a pointer to
the common device that contains everything needed to create/register MR.
Fixes:
9f1d636f3ef08 ("common/mlx5: share MR management")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 10:17:06 +0000 (12:17 +0200)]
common/mlx5: remove redundant parameter in MR search
Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue, usually
yields a result and one should not continue searching in the next level
caches.
The function that searches in the local cache gets the pointer to a
device as a parameter, that is not necessary for its operation
but for subsequent searches (which, as mentioned, usually do not
happen).
Transferring the device to a function and maintaining it, takes some
time and causes some impact on performance.
Add the pointer to the device as a field of the mr_ctrl structure. The
field will be updated during control path and will be used only when
needed in the search.
Fixes:
fc59a1ec556b ("common/mlx5: share MR mempool registration")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Wed, 3 Nov 2021 10:17:05 +0000 (12:17 +0200)]
common/mlx5: fix MR search inlining
Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue,
usually yields a result and one should not continue searching
in the next layer caches.
Prior to cache sharing the local linear cache lookup function
was defined with "static inline" attributes,
those were missed in routine commoditizing step
and this caused performance degradation.
Set the common function as static inline.
Fixes:
fc59a1ec556b ("common/mlx5: share MR mempool registration")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
David Marchand [Fri, 5 Nov 2021 13:30:18 +0000 (14:30 +0100)]
app/testpmd: remove double dependency on bitrate lib
No need for double dependency, once is enough.
While at it, sort alphabetically.
Fixes:
fac83b3ef8ac ("app: fix missing dependencies")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
David Marchand [Fri, 5 Nov 2021 13:30:17 +0000 (14:30 +0100)]
app/testpmd: remove unneeded dependency on meter lib
testpmd depends on ethdev, which itself depends on meter.
No need for an explicit dependency, since no testpmd code directly calls
in the meter library.
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Gregory Etelson [Tue, 26 Oct 2021 15:20:00 +0000 (18:20 +0300)]
app/testpmd: fix flex item flush
Testpmd provides 2 sets of flex item create and destroy functions
One for hosts with JSON library. These functions parse
flex item configuration stored in JSON file and create or destroy
flex item object. The second functions set is for hosts without JSON
library for compilation compatibility.
On hosts without JSON library, current implementation issues
"no JSON library" notification on port close.
The notification was triggered by port destructors that include
flex items flush routine.
The patch introduces single implementation for testpmd
flex item destroy.
Fixes:
59f3a8acbcdb ("app/testpmd: add flex item commands")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Andrew Rybchenko [Fri, 5 Nov 2021 08:33:30 +0000 (11:33 +0300)]
common/sfc_efx: fix debug compilation control
efsys.h belongs to common/sfc_efx and common driver debug
toggle should be used instead of net/sfc toggle.
Fixes:
5e111ed87999 ("net/sfc: introduce common driver library")
Cc: stable@dpdk.org
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Bing Zhao [Fri, 5 Nov 2021 15:30:39 +0000 (17:30 +0200)]
net/mlx5: check delay drop settings in kernel driver
The delay drop is the common feature managed on per device basis
and the kernel driver is responsible one for the initialization and
rearming.
By default, the timeout value is set to activate the delay drop when
the driver is loaded.
A private flag "dropless_rq" is used to control the rearming. Only
when it is on, the rearming will be handled once received a timeout
event. Or else, the delay drop will be deactivated after the first
timeout occurs and all the Rx queues won't have this feature.
The PMD is trying to query this flag and warn the application when
some queues are created with delay drop but the flag is off.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Bing Zhao [Fri, 5 Nov 2021 15:30:38 +0000 (17:30 +0200)]
net/mlx5: support Rx queue delay drop
For the Ethernet RQs, if there all receiving descriptors are
exhausted, the packets being received will be dropped. This behavior
prevents slow or malicious software entities at the host from
affecting the network. While for hairpin cases, even if there is no
software involved during the packet forwarding from Rx to Tx side,
some hiccup in the hardware or back pressure from Tx side may still
cause the descriptors to be exhausted. In certain scenarios it may be
preferred to configure the device to avoid such packet drops,
assuming the posting of descriptors will resume shortly.
To support this, a new devarg "delay_drop" is introduced. By default,
the delay drop is enabled for hairpin Rx queues and disabled for
standard Rx queues. This value is used as a bit mask:
- bit 0: enablement of standard Rx queue
- bit 1: enablement of hairpin Rx queue
And this attribute will be applied to all Rx queues of a device.
The "rq_delay_drop" capability in the HCA_CAP is checked before
creating any queue. If the hardware capabilities do not support
this delay drop, all the Rx queues will still be created without
this attribute, and the devarg setting will be ignored even if it
is specified explicitly. A warning log is used to notify the
application when this occurs.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Ferruh Yigit [Thu, 4 Nov 2021 11:04:21 +0000 (11:04 +0000)]
ethdev: fix crash on owner delete
'eth_dev->data' can be null before ethdev allocated. The API walks
through all eth devices, at least for some data can be null.
Adding 'eth_dev->data' null check before accessing it.
Fixes:
33c73aae32e4 ("ethdev: allow ownership operations on unused port")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Jiawen Wu [Fri, 5 Nov 2021 02:01:17 +0000 (10:01 +0800)]
net/txgbe: fix link process in KR mode
Set the 'present' parameter to 0 by default. It is configured by hardware,
users can set it to 1 for manual configuration.
Fixes:
f611dada1af8 ("net/txgbe: update link setup process of backplane NICs")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jie Wang [Fri, 5 Nov 2021 03:37:05 +0000 (11:37 +0800)]
net/i40e: fix forward outer IPv6 VXLAN
Testpmd forwards packets in checksum mode that it need to calculate
the checksum of each layer's protocol. Then it will fill flags and
header length into mbuf.
In process_outer_cksums, HW calculates the outer checksum if
tx_offloads contains outer UDP checksum otherwise SW calculates
the outer checksum.
When tx_offloads contains outer UDP checksum or outer IPv4 checksum,
mbuf will be filled with correct header length.
This patch added outer UDP checksum in tx_offload_capa and
I40E_TX_OFFLOAD_MASK, when we set csum hw outer-udp on that the
engine can forward outer IPv6 VXLAN packets.
Fixes:
7497d3e2f777 ("net/i40e: convert to new Tx offloads API")
Cc: stable@dpdk.org
Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Viacheslav Ovsiienko [Thu, 4 Nov 2021 12:33:20 +0000 (20:33 +0800)]
net/mlx5: support shared Rx queue port data path
When receive packet, mlx5 PMD saves mbuf port number from
RxQ data.
To support shared RxQ, save port number into RQ context as user index.
Received packet resolve port number from CQE user index which derived
from RQ context.
Legacy Verbs API doesn't support RQ user index setting, still read from
RxQ port number.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:19 +0000 (20:33 +0800)]
net/mlx5: support shared Rx queue
This patch introduces shared RxQ. All shared Rx queues with same group
and queue ID share the same rxq_ctrl. Rxq_ctrl and rxq_data are shared,
all queues from different member port share same WQ and CQ, essentially
one Rx WQ, mbufs are filled into this singleton WQ.
Shared rxq_data is set into device Rx queues of all member ports as
RxQ object, used for receiving packets. Polling queue of any member
ports returns packets of any member, mbuf->port is used to identify
source port.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:18 +0000 (20:33 +0800)]
net/mlx5: remove Rx queue data list from device
Rx queue data list(priv->rxqs) can be replaced by Rx queue
list(priv->rxq_privs), removes it and replaces with universal wrapper
API.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:17 +0000 (20:33 +0800)]
net/mlx5: move Rx queue DevX resource
To support shared RX queue, moves DevX RQ which is per queue resource to
Rx queue private data.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:16 +0000 (20:33 +0800)]
net/mlx5: remove port info from shareable Rx queue
To prepare for shared Rx queue, removes port info from shareable Rx
queue control.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:15 +0000 (20:33 +0800)]
net/mlx5: move Rx queue hairpin info to private data
Hairpin info of Rx queue can't be shared, moves to private queue data.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:14 +0000 (20:33 +0800)]
net/mlx5: move Rx queue reference count
Rx queue reference count is counter of RQ, used to count reference to RQ
object. To prepare for shared Rx queue, this patch moves it from
rxq_ctrl to Rx queue private data.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:13 +0000 (20:33 +0800)]
net/mlx5: split Rx queue into shareable and private
To prepare shared Rx queue, splits RxQ data into shareable and private.
Struct mlx5_rxq_priv is per queue data.
Struct mlx5_rxq_ctrl is shared queue resources and data.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:12 +0000 (20:33 +0800)]
net/mlx5: clean Rx queue code
This patch removes unused Rx queue code.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:11 +0000 (20:33 +0800)]
net/mlx5: fix Rx queue memory allocation return value
If error happened during Rx queue mbuf allocation, boolean value
returned. From description, return value should be error number.
This patch returns negative error number.
Fixes:
0f20acbf5eda ("net/mlx5: implement vectorized MPRQ burst")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:10 +0000 (20:33 +0800)]
common/mlx5: support receive memory pool
The hardware Receive Memory Pool (RMP) object holds the destination for
incoming packets/messages that are routed to the RMP through RQs. RMP
enables sharing of memory across multiple Receive Queues. Multiple
Receive Queues can be attached to the same RMP and consume memory
from that shared poll. When using RMPs, completions are reported to the
CQ pointed to by the RQ, user index that set in RQ creation time is
carried to completion entry.
This patch enables RMP based RQ, RMP is created when mlx5_devx_rq.rmp is
set.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:09 +0000 (20:33 +0800)]
common/mlx5: support basic receive memory pool
The hardware Receive Memory Pool (RMP) object holds the destination for
incoming packets/messages that are routed to the RMP through RQs. RMP
enables sharing of memory across multiple Receive Queues. Multiple
Receive Queues can be attached to the same RMP and consume memory
from that shared poll. When using RMPs, completions are reported to the
CQ pointed to by the RQ, and this Completion Queue can be shared as
well.
This patch adds DevX supports of PRM RMP object.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:07 +0000 (20:33 +0800)]
common/mlx5: introduce user index field in completion
On ConnectX devices the completion entry provides the dedicated 24-bit
field, that is filled up with some static value assigned at the
Receiving Queue creation moment. This patch declares this field. This is
a preparation step for supporting shared RQs and the field is supposed
to provide actual port index while handling the shared receiving
queue(s).
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:08 +0000 (20:33 +0800)]
net/mlx5: fix Altivec Rx
This patch fixes stale field reference.
Fixes:
a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Gregory Etelson [Tue, 2 Nov 2021 08:53:46 +0000 (10:53 +0200)]
net/mlx5: handle flex item in flows
Provide flex item recognition, validation and translation
in flow patterns. Track the flex item referencing.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Tue, 2 Nov 2021 08:53:45 +0000 (10:53 +0200)]
net/mlx5: translate flex item pattern into matcher
The matcher is an steering engine entity that represents
the flow pattern to hardware to match. It order to
provide match on the flex item pattern the appropriate
matcher fields should be configured with values and masks
accordingly.
The flex item related matcher fields is an array of eight
32-bit fields to match with data captured by sample registers
of configured flex parser. One packet field, presented in
item pattern can be split between several sample registers,
and multiple fields can be combined together into single
sample register to optimize hardware resources usage
(number os sample registers is limited), depending on field
modes, widths and offsets. Actual mapping is complicated
and controlled by special translation data, built by PMD
on flex item creation.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Tue, 2 Nov 2021 08:53:44 +0000 (10:53 +0200)]
net/mlx5: translate flex item configuration
RTE Flow flex item configuration should be translated
into actual hardware settings:
- translate header length and next protocol field samplings
- translate data field sampling, the similar fields with the
same mode and matching related parameters are relocated
and grouped to be covered with minimal amount of hardware
sampling registers (each register can cover arbitrary
neighbour 32 bits (aligned to byte boundary) in the packet
and we can combine the fields with smaller lengths or
segments of bigger fields)
- input and output links translation
- preparing data for parsing flex item pattern on flow creation
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Gregory Etelson [Tue, 2 Nov 2021 08:53:43 +0000 (10:53 +0200)]
net/mlx5: add flex parser DevX object management
The DevX flex parsers can be shared between representors
within the same IB context. We should put the flex parser
objects into the shared list and engage the standard
mlx5_list_xxx API to manage ones.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Tue, 2 Nov 2021 08:53:42 +0000 (10:53 +0200)]
net/mlx5: add flex item operations
This patch is a preparation step of implementing
flex item feature in driver and it provides:
- external entry point routines for flex item
creation/deletion
- flex item objects management over the ports.
The flex item object keeps information about
the item created over the port - reference counter
to track whether item is in use by some active
flows and the pointer to underlying shared DevX
object, providing all the data needed to translate
the flow flex pattern into matcher fields according
hardware configuration.
There is not too many flex items supposed to be
created on the port, the design is optimized
rather for flow insertion rate than memory savings.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Tue, 2 Nov 2021 08:53:41 +0000 (10:53 +0200)]
net/mlx5: update eCPRI flex parser structures
To handle eCPRI protocol in the flows the mlx5 PMD engages
flex parser hardware feature. While we were implementing
eCPRI support we anticipated the flex parser usage extension,
and all related variables were named accordingly, containing
flex syllabus. Now we are preparing to introduce more common
approach of flex item, in order to avoid naming conflicts
and improve the code readability the eCPRI infrastructure
related variables are renamed as preparation step.
Later, once we have the new flex item implemented, we could
consider to refactor the eCPRI protocol support to move on
common flex item basis.
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Gregory Etelson [Tue, 2 Nov 2021 08:53:40 +0000 (10:53 +0200)]
common/mlx5: fix flex parser DevX creation routine
Add missing modify_field_select, next_header_field_size
field values setting.
Fixes:
38119ebe01d6 ("common/mlx5: add DevX command for flex parsers")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Gregory Etelson [Tue, 2 Nov 2021 08:53:39 +0000 (10:53 +0200)]
common/mlx5: extend flex parser capabilities
MLX5 PARSE_GRAPH_NODE is the main data structure used by the Flex
Parser when a new parsing protocol is defined. While software
creates PARSE_GRAPH_NODE object for a new protocol, it must
verify that configuration parameters it uses comply with
hardware limits.
The patch queries hardware PARSE_GRAPH_NODE capabilities and
stores ones in PMD internal configuration structure:
- query capabilities from parse_graph_node attribute page
- query max_num_prog_sample_field capability from HCA page 2
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Tue, 2 Nov 2021 08:53:38 +0000 (10:53 +0200)]
common/mlx5: refactor HCA attributes query
There is the common part of code querying the HCA attributes
from the device, and this part can be commoditized as
dedicated routine.
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Somnath Kotur [Wed, 3 Nov 2021 16:04:32 +0000 (21:34 +0530)]
net/bnxt: fix scalar Rx datapath on Thor
The patch introduced by
commit
657c2a7f1dd4 ("net/bnxt: create aggregation rings when needed")
ended up shortening the return code path from the function thereby
resulting in not executing the line of code at the end of the function
that was resetting the next consumer index to 0.
This would result in an application crash when error recovery or other
port stop/start scenarios were invoked on Thor which is what this
commit
61cd4384fabf ("net/bnxt: fix crash after port stop/start")
was addressing.
Fix it by moving the resetting line of code before the return path
in the case when aggregation rings are not used (default case).
Fixes:
657c2a7f1dd4 ("net/bnxt: create aggregation rings when needed")
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Jay Ding [Wed, 3 Nov 2021 00:52:51 +0000 (17:52 -0700)]
net/bnxt: use enum for bank ID
Instead of integer, using enum tf_sram_bank_id for bank
id in tf_set_sram_policy_parms.
Add index check against the allocation of the meter
instance for meter drop count because there is no
reason to access it if the corresponding meter
entry is not allocated.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Steve Rempe <steve.rempe@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:50 +0000 (17:52 -0700)]
net/bnxt: check mismatch of control and physical port
During the parsing of the ingress port ignore for a flow, added
check to match the control port and the physical port that is configured
to be ignored. If they do not match then the configuration to setup the
svif ignore shall fail.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Mike Baucom [Wed, 3 Nov 2021 00:52:49 +0000 (17:52 -0700)]
net/bnxt: remove 2 slice wildcard entries
Remove 2-slice wildcard entries for scale.
The type-5 wildcard IPv6 flows are removed in order to increase
the scale for app-id=3.
The app no longer supports 2-slice wildcard entries.
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Jay Ding [Wed, 3 Nov 2021 00:52:48 +0000 (17:52 -0700)]
net/bnxt: add Tx TruFlow table config for P4 device
Add TX direction TruFlow table type config to be
compatible with other devices. For P4 device, the TX cfg
is duplicated from RX.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Jay Ding [Wed, 3 Nov 2021 00:52:47 +0000 (17:52 -0700)]
net/bnxt: support TruFlow and AFM SRAM partitioning
Implement set/get_sram_policy which support both Rx/Tx
direction truflow type the specific SRAM bank.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Jay Ding [Wed, 3 Nov 2021 00:52:46 +0000 (17:52 -0700)]
net/bnxt: add TruFlow API to get SRAM resources
Implement tf_get_sram_resources to return SRAM
partition information, including bank count and
SRAM profile number.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:45 +0000 (17:52 -0700)]
net/bnxt: modify VF representor allocation sequence
When the VF representor interface is created, the VF pair relationship
is established between the VF and it is representor. If the pair
already exists then the pair needs to be deleted before allocation.
This could happen if the application is abruptly killed and restarted.
If the deletion of an existing VF rep is not done then hw pipeline is
not cleaned and a new allocation shall leave the hw in inconsistent
state.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:44 +0000 (17:52 -0700)]
net/bnxt: support socket direct feature
Added support for socket direct feature. This feature
allows to ignore the incoming interface and use other fields
in the packet to identify the flow and forward.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:43 +0000 (17:52 -0700)]
net/bnxt: update log messages in TruFlow path
Some of the error level log messages are made debug level messages.
When Truflow is not enabled then Truflow init error messages are
moved to debug level instead.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Shahaji Bhosle [Wed, 3 Nov 2021 00:52:42 +0000 (17:52 -0700)]
net/bnxt: fix type casting
Typecast flow_item type, action_item type and the ENUMs to uint32_t
before comparing.
Bugzilla ID: 821
Fixes:
bdf4a3c6316b ("net/bnxt: support tunnel offload")
Signed-off-by: Shahaji Bhosle <sbhosle@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:41 +0000 (17:52 -0700)]
net/bnxt: remove devargs option for stats accumulation
The accumulation of flow counters is not determined by the application
device arguments anymore. Instead it is now dictated by the platform
capabilities whether to do software based accumulation or not.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Shahaji Bhosle [Wed, 3 Nov 2021 00:52:40 +0000 (17:52 -0700)]
net/bnxt: increase flow scale for Thor
* Updated defines and data types to allow 256 VFRs.
* Increased the encap record cache to support 256 to 4K entries. So
VxLAN connections can be scaled to 4K entries.
Signed-off-by: Shahaji Bhosle <sbhosle@broadcom.com>
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Jay Ding [Wed, 3 Nov 2021 00:52:39 +0000 (17:52 -0700)]
net/bnxt: get TruFlow version
Implement tf_get_version that returns TruFlow version
numbers and CFA resources capabilities.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:38 +0000 (17:52 -0700)]
net/bnxt: support inner IP header for GRE tunnel flows
This change allows adding IP header matches for GRE flows that
does not specify outer IP header in the flow match pattern.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Ajit Khaparde [Thu, 4 Nov 2021 18:59:05 +0000 (11:59 -0700)]
net/bnxt: enable wildcard match for ingress flows
Enabled wildcard match support for IPv4 ingress flows.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:37 +0000 (17:52 -0700)]
net/bnxt: add suffix to unsigned long flow signatures
The flow signature is of type unsigned long value and needs to be
suffixed with UL. This patch addresses ISO C90 compilation error.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Ajit Khaparde [Thu, 4 Nov 2021 18:45:00 +0000 (11:45 -0700)]
net/bnxt: remove unused functions
Remove unused functions from the code.
Specifically the following functions are being removed.
bnxt_get_iface_mac();
bnxt_get_vnic_id();
bnxt_get_parent_vnic_id();
bnxt_get_bp();
bnxt_get_svif();
bnxt_get_fw_func_id();
bnxt_get_parif();
bnxt_get_phy_port_id();
bnxt_get_vport();
bnxt_get_interface_type();
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:36 +0000 (17:52 -0700)]
net/bnxt: add capability option for socket redirect
Added support for socket redirect feature capability so applications
can enable or disable this feature. This patch contains the template
changes.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Farah Smith [Wed, 3 Nov 2021 00:52:35 +0000 (17:52 -0700)]
net/bnxt: support clear on read
Add clear on read stats support for Thor. Currently, the
flow stats are not cleared after they are read from the FW.
This patch adds support for clear on read. Since clear on
read support is added for flow stats in Thor, the flow
accumulation is enabled on Thor as well.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:34 +0000 (17:52 -0700)]
net/bnxt: fix out of bounds access in hash list
The number of hash bucket list calculation is fixed.
Added check to avoid the out of bounds condition.
Fixes:
0001cc58d362 ("net/bnxt: support generic hash table")
Cc: stable@dpdk.org
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:33 +0000 (17:52 -0700)]
net/bnxt: support multi root capability
Update driver to read the multi root capability and ignore
PCI address check while creating ulp session when multi root
capability is enabled in the hardware. DPDK HSI version updated
from 1.10.2.44 to 1.10.2.68.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Wed, 3 Nov 2021 00:52:32 +0000 (17:52 -0700)]
net/bnxt: support NAT for dest IP and port combination
* Added support for NAT action for destination IP and port
combination for Thor devices.
* Consolidated the encapsulation and NAT entries for scaling flows
with NAT actions.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:54 +0000 (19:27 +0530)]
vdpa/sfc: set multicast filter during init
Insert unknown multicast filter to allow IPv6 neighbor discovery
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:53 +0000 (19:27 +0530)]
vdpa/sfc: support setting vring state
Implements vDPA ops set_vring_state to configure vring state.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:52 +0000 (19:27 +0530)]
vdpa/sfc: support MAC filter config
Add support for unicast and broadcast MAC filter configuration.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:51 +0000 (19:27 +0530)]
vdpa/sfc: get queue notify area info
Implement the vDPA ops get_notify_area to get the notify
area info of the queue.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:50 +0000 (19:27 +0530)]
vdpa/sfc: support device configure and close
Implement vDPA ops dev_conf and dev_close for DMA mapping,
interrupt and virtqueue configurations.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:49 +0000 (19:27 +0530)]
vdpa/sfc: get VFIO device file descriptor
Implement vDPA ops get_vfio_device_fd to get the VFIO device fd.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:48 +0000 (19:27 +0530)]
vdpa/sfc: get max supported queue count
Implement vDPA ops get_queue_num to get the maximum number
of queues supported by the device.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:47 +0000 (19:27 +0530)]
vdpa/sfc: support device and protocol features queries
Implement vDPA ops get_feature and get_protocol_features.
This patch retrieves device supported features and enables
protocol features.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Vijay Kumar Srivastava [Wed, 3 Nov 2021 13:57:46 +0000 (19:27 +0530)]
vdpa/sfc: support device initialization
Add HW initialization and vDPA device registration support.
Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>