dpdk.git
4 years agocrypto/ccp: fix queue alignment
David Marchand [Fri, 7 Feb 2020 14:06:00 +0000 (15:06 +0100)]
crypto/ccp: fix queue alignment

Caught by compiling with -fno-common.
A ____cacheline_aligned symbol can be found in the crypto/ccp driver
object files.

Looking at this driver source, the ____cacheline_aligned (kernel?)
alignment macro is undefined.
The compiler treats this as a symbol definition and generates a global
symbol.

Fixes: ef4b04f87fa6 ("crypto/ccp: support device init")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
4 years agocrypto/octeontx2: add kmod dependency info
Thierry Herbelot [Mon, 10 Feb 2020 07:35:12 +0000 (08:35 +0100)]
crypto/octeontx2: add kmod dependency info

Like for OCTEON TX, the OCTEON TX2 crypto engines must
first be unbound from their kernel module, then rebound to
vfio-pci, before being used in DPDK.

As this capability is detected at runtime by dpdk-pmdinfo,
add the info in the PMD registering directives.

Then an external script can be used for bind and unbind.

Fixes: 2f8a1b963eb77 ("crypto/octeontx2: add PMD skeleton")
Cc: stable@dpdk.org
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agolib: fix unnecessary double negation
Ciara Power [Fri, 14 Feb 2020 16:17:25 +0000 (16:17 +0000)]
lib: fix unnecessary double negation

An equality expression already returns either 0 or 1.
There is no need to use double negation for these cases.

Fixes: ea672a8b1655 ("mbuf: remove the rte_pktmbuf structure")
Fixes: a0fd91cefcc0 ("mempool: rename functions with confusing names")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
4 years agoexamples/fips_validation: fix AES-GCM cipher length parsing
Fan Zhang [Fri, 14 Feb 2020 11:41:18 +0000 (11:41 +0000)]
examples/fips_validation: fix AES-GCM cipher length parsing

This patch fixes the cipher len keyword typo.

Fixes: 07f5e4553293 ("examples/fips_validation: fix cipher length for AES-GCM")

Suggested-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agoexamples/l3fwd-power: fix interrupt disable
Xiao Wang [Tue, 21 Jan 2020 03:06:57 +0000 (22:06 -0500)]
examples/l3fwd-power: fix interrupt disable

Since all related queues' interrupts are turned on before epoll, we need
to turn off all the interrupts after wakeup. This patch fixes the issue
of only turning off the interrupted queues.

Fixes: b736d64787fc ("examples/l3fwd-power: disable Rx interrupt when waking up")
Cc: stable@dpdk.org
Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Tested-by: Harman Kalra <hkalra@marvell.com>
Reviewed-by: Liang Ma <liang.j.ma@intel.com>
Tested-by: Liang Ma <liang.j.ma@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
4 years agoexamples/l3fwd-power: fix a typo
Xiao Wang [Tue, 21 Jan 2020 03:06:56 +0000 (22:06 -0500)]
examples/l3fwd-power: fix a typo

Fixes: aee3bc79cc34 ("examples/l3fwd-power: enable one-shot Rx interrupt and polling switch")
Cc: stable@dpdk.org
Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
4 years agokni: fix not contiguous FIFO
Scott Wasson [Fri, 14 Feb 2020 10:00:52 +0000 (10:00 +0000)]
kni: fix not contiguous FIFO

KNI requires FIFO to be physically contiguous, with existing
'rte_memzone_reserve()' API this is not guaranteed by default and as a
result KNI rings and packet delivery may be broken if reserved memory
is not physically contiguous.

Fixing it by providing 'RTE_MEMZONE_IOVA_CONTIG' flag to ask physically
contiguous memory.

Bugzilla ID: 389
Fixes: 23fa86e529e4 ("memzone: enable IOVA-contiguous reserving")
Cc: stable@dpdk.org
Signed-off-by: Scott Wasson <scott_wasson@affirmednetworks.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agodoc: remove major in designation of normal releases
Thomas Monjalon [Mon, 5 Aug 2019 12:30:12 +0000 (14:30 +0200)]
doc: remove major in designation of normal releases

The word "major" was used to differentiate with release candidates
or stable maintenance releases.
However the word "major" can be understood as "LTS",
so it is less confusing to avoid this word.

Reported-by: Ori Kam <orika@mellanox.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
4 years agofix Mellanox copyright and SPDX tag
Thomas Monjalon [Sun, 9 Feb 2020 21:14:52 +0000 (22:14 +0100)]
fix Mellanox copyright and SPDX tag

Mellanox owns Tilera and EZchip, so the copyrights can be converted.
At the same time, the license header is switched to SPDX tag format,
and a typo is fixed in another copyright line.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
4 years agoexamples/kni: add SIGTERM signal handling
Vamsi Attunuru [Thu, 6 Feb 2020 11:53:57 +0000 (17:23 +0530)]
examples/kni: add SIGTERM signal handling

SIGTERM handling is added for graceful application exit.
Useful when application is terminated without specifying
any signal on 'kill' command.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agokni: fix build with Linux 5.6
Ferruh Yigit [Wed, 12 Feb 2020 17:14:24 +0000 (17:14 +0000)]
kni: fix build with Linux 5.6

With the following Linux commit a new parameter 'txqueue' has been added
to 'ndo_tx_timeout' ndo:
commit 0290bd291cc0 ("netdev: pass the stuck queue to the timeout handler")

The change reflected to the KNI with version check.

Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agoexamples/power: fix ack for enable/disable turbo
David Hunt [Tue, 11 Feb 2020 10:50:08 +0000 (10:50 +0000)]
examples/power: fix ack for enable/disable turbo

When a VM sends a command through virtio-serial to enable/disable
turbo, it is successfully enabled or disabled, yet the response to the
VM is NACK. This is because all the library frequency change APIs return
1 for success (change in frequency), 0 for success (no change in
frequency) and -1 for failure. However the turbo enable/disable APIs just
return 0 for success and -1 for failure.

Fix the handling of the return code to treat ">= 0" as success, and
send an ACK. Only send NACK when < 0 (failure).

Fixes: 0de94bcac7fc ("examples/vm_power: send confirmation cmd to guest")
Cc: stable@dpdk.org
Signed-off-by: David Hunt <david.hunt@intel.com>
Acked-by: Lei Yao <lei.a.yao@intel.com>
4 years agoexamples/ioat: fix invalid link status check
Ciara Power [Fri, 7 Feb 2020 10:24:02 +0000 (10:24 +0000)]
examples/ioat: fix invalid link status check

The return value of the get link function call was not checked, and
could return a negative value indicating a failure. This meant the
link_status of the link being checked is invalid, because the link was
not filled with data. The return value is now checked, and if the return
value is not 0 for success, the loop continues with the next port.

To avoid confusion between variable names, the existing retval variable
is renamed to link_status, to better represent its use.

Coverity issue: 350348
Fixes: c8e6ceecebc1 ("examples/ioat: add new sample app for ioat driver")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agoexamples/ioat: fix failure check for ioat dequeue
Ciara Power [Tue, 4 Feb 2020 16:00:06 +0000 (16:00 +0000)]
examples/ioat: fix failure check for ioat dequeue

The nb_dq return value from the ioat dequeue is negative in failure
cases, however the variable was an unsigned int, causing the condition
where nb_dq <= 0 to never be true. This is now cast to a signed int,
which will successfully reflect the -1 value to be used in this
conditional check.

Coverity issue: 350342
Coverity issue: 350349
Fixes: 92c981637ffc ("examples/ioat: handle failure case for ioat dequeue")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agoexamples/ioat: fix unchecked return value
Praveen Shetty [Thu, 28 Nov 2019 11:27:14 +0000 (11:27 +0000)]
examples/ioat: fix unchecked return value

patch checks the return value of function rte_eth_dev_info_get,
if return value is negative error message printed on the console.

Coverity issue: 350361
Fixes: c8e6ceecebc1 ("examples/ioat: add new sample app for ioat driver")
Cc: stable@dpdk.org
Signed-off-by: Praveen Shetty <praveen.shetty@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agoexamples/ethtool: fix unchecked return value
Gargi Sau [Mon, 9 Dec 2019 06:37:56 +0000 (06:37 +0000)]
examples/ethtool: fix unchecked return value

This checks the return value from the function
rte_eth_dev_set_vlan_offload.

Coverity issue: 350358
Fixes: bda68ab9d1e7 ("examples/ethtool: add user-space ethtool sample application")
Cc: stable@dpdk.org
Signed-off-by: Gargi Sau <gargi.sau@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agotest/acl: add 32-bit range test case
Konstantin Ananyev [Wed, 12 Feb 2020 13:47:45 +0000 (13:47 +0000)]
test/acl: add 32-bit range test case

Add new test-case to improve test coverage for 32-bit range fields.

Suggested-by: Ido Goshen <ido@cgstowernetworks.com>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoacl: fix 32-bit match for range field
Konstantin Ananyev [Wed, 12 Feb 2020 13:47:44 +0000 (13:47 +0000)]
acl: fix 32-bit match for range field

ACL build phase for range fields that are bigger then
16 bits might generate wrong trie.
For more details please refer to:
https://bugs.dpdk.org/show_bug.cgi?id=307

Bugzilla ID: 307
Fixes: dc276b5780c2 ("acl: new library")
Cc: stable@dpdk.org
Reported-by: Ido Goshen <ido@cgstowernetworks.com>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal/windows: support command line options parsing
Pallavi Kadam [Fri, 7 Feb 2020 03:14:37 +0000 (19:14 -0800)]
eal/windows: support command line options parsing

Adding specific logic for eal.c to support parsing on
Windows.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Signed-off-by: Antara Ganesh Kolar <antara.ganesh.kolar@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal/windows: support more common files
Pallavi Kadam [Fri, 7 Feb 2020 03:14:36 +0000 (19:14 -0800)]
eal/windows: support more common files

Added support for additional common files in meson build
to expand Windows EAL and to support the lcore parsing
feature on Windows.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Signed-off-by: Antara Ganesh Kolar <antara.ganesh.kolar@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal: disable syslog and dlopen on Windows
Pallavi Kadam [Fri, 7 Feb 2020 03:14:35 +0000 (19:14 -0800)]
eal: disable syslog and dlopen on Windows

Excluding syslog/ dlfcn definitions and parameters
from Windows by adding #ifndef RTE_EXEC_ENV_WINDOWS.

Note: This is a temporary change. In future, separate
'unix' directory will be created for unix specific functions.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal/x86: include SSE4 support on Windows
Pallavi Kadam [Fri, 7 Feb 2020 03:14:34 +0000 (19:14 -0800)]
eal/x86: include SSE4 support on Windows

Modified common/include/arch/x86/rte_vect.h
to include SSE4 header for Windows.

Signed-off-by: Antara Ganesh Kolar <antara.ganesh.kolar@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal/windows: detect process type
Pallavi Kadam [Fri, 7 Feb 2020 03:14:33 +0000 (19:14 -0800)]
eal/windows: detect process type

Adding a function to detect process type, also included
header files to contain suitable function declarations
and to support extra warning flags.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Signed-off-by: Antara Ganesh Kolar <antara.ganesh.kolar@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal/windows: add getopt implementation
Pallavi Kadam [Fri, 7 Feb 2020 03:14:32 +0000 (19:14 -0800)]
eal/windows: add getopt implementation

Adding getopt files to support parsing option on
Windows.

The original contribution is under BSD-2 license.
https://github.com/greenplum-db/libusual/blob/master/usual/getopt.c
https://github.com/greenplum-db/libusual/blob/master/usual/getopt.h

Signed-off-by: Antara Ganesh Kolar <antara.ganesh.kolar@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal/windows: add some basic functions and macros
Pallavi Kadam [Fri, 7 Feb 2020 03:14:31 +0000 (19:14 -0800)]
eal/windows: add some basic functions and macros

Adding additional function definitions for pthread, cpuset
implementation, asprintf implementation, in order to support
common code.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agoeal/windows: add dirent implementation
Pallavi Kadam [Fri, 7 Feb 2020 03:14:30 +0000 (19:14 -0800)]
eal/windows: add dirent implementation

Adding dirent.h on Windows to support common code.
eal_common_options.c includes this file.

The original contribution is under MIT license.
https://github.com/tronkko/dirent

Signed-off-by: Antara Ganesh Kolar <antara.ganesh.kolar@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
Acked-by: Narcisa Ana Maria Vasile <narcisa.vasile@microsoft.com>
4 years agolicense: add exceptions for Windows
Pallavi Kadam [Fri, 7 Feb 2020 03:14:29 +0000 (19:14 -0800)]
license: add exceptions for Windows

The Governing Board and Tech Board have provided exceptions for
MIT and BSD-2-Clause license files for DPDK support on Windows.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
4 years agodevtools: enable more config options in build test
Thomas Monjalon [Tue, 11 Feb 2020 23:57:24 +0000 (00:57 +0100)]
devtools: enable more config options in build test

The Linux kernel modules kni and igb_uio were disabled by default
so they need a new option (+kmods) for testing compilation.

Some recent features were not enabled in compilation testing:
- mlx5 vDPA (depends on libibverbs)
- ifpga (depends on libfdt)
- ipn3ke (depends on libfdt)
- Arm WFE

Check on libfdt availability is added, and not considered as a fix.

Fixes: 91a861e54164 ("config: disable Linux kernel modules by default")
Fixes: 95276abaaf0a ("vdpa/mlx5: introduce Mellanox vDPA driver")
Fixes: 1be7855d7739 ("eal: add wait until equal API")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agoconfig: deduplicate options
Thomas Monjalon [Tue, 11 Feb 2020 23:57:23 +0000 (00:57 +0100)]
config: deduplicate options

Some config options are overwritten with the same value
as the one inherited from its template parent.
Such duplicates which have no meaningful comments are removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agovdpa/mlx5: fix ABI version
Matan Azrad [Tue, 11 Feb 2020 19:48:47 +0000 (19:48 +0000)]
vdpa/mlx5: fix ABI version

Changed the ABI version to 20.0.1.

Fixes: 95276abaaf0a ("vdpa/mlx5: introduce Mellanox vDPA driver")

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agocommon/mlx5: fix ABI version
Matan Azrad [Tue, 11 Feb 2020 19:48:46 +0000 (19:48 +0000)]
common/mlx5: fix ABI version

Changed the ABI version to 20.0.1.

Fixes: 7b4f1e6bd367 ("common/mlx5: introduce common library")

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agobuild: remove redundant config include
Thomas Monjalon [Mon, 10 Feb 2020 09:53:34 +0000 (10:53 +0100)]
build: remove redundant config include

The header file rte_config.h is always included by make or meson.
If required in an exported API header file, it must be included
in the public header file for external applications.
In the internal files, explicit include of rte_config.h is useless,
and can be removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
4 years agoraw/octeontx2_ep: fix ABI version
Mahipal Challa [Tue, 11 Feb 2020 11:27:41 +0000 (16:57 +0530)]
raw/octeontx2_ep: fix ABI version

Changed the ABI version to 20.0.1.

Fixes: 56d46d13f736 ("raw/octeontx2_ep: add build infra and device probe")

Signed-off-by: Mahipal Challa <mchalla@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agocommon/octeontx2: fix 20.02 new symbols ABI version
Anoob Joseph [Mon, 10 Feb 2020 10:27:29 +0000 (15:57 +0530)]
common/octeontx2: fix 20.02 new symbols ABI version

Move symbols added in 20.02 release to DPDK_20.0.1 ABI.

Fixes: d06551535a09 ("common/octeontx2: add security capability routine")
Fixes: 3fe4d07d1678 ("crypto/octeontx2: enable CPT to share QP with ethdev")
Fixes: f44e71637755 ("net/octeontx2: add security session operations")

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agoversion: 20.02-rc2
Thomas Monjalon [Thu, 6 Feb 2020 16:05:42 +0000 (17:05 +0100)]
version: 20.02-rc2

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
4 years agoraw/octeontx2_ep: fix error handling
Mahipal Challa [Mon, 27 Jan 2020 13:18:21 +0000 (18:48 +0530)]
raw/octeontx2_ep: fix error handling

Defects reported by coverity scan are resolved.

Coverity issue: 353611, 353622, 353632
Fixes: 81fd15a2acc2 ("raw/octeontx2_ep: add device configuration")
Fixes: b848f0416acb ("raw/octeontx2_ep: add dequeue operation")

Signed-off-by: Mahipal Challa <mchalla@marvell.com>
4 years agocommon/octeontx2: add polling based response mbox message
Sunil Kumar Kori [Tue, 14 Jan 2020 09:04:53 +0000 (14:34 +0530)]
common/octeontx2: add polling based response mbox message

Currently otx2_mbox_get_rsp_xxx get response once AF driver
interrupts after completion. But this function will get into
deadlock if called in another interrupt context.

To avoid it, implemented another version of this function which polls
on dedicated memory for a given timeout.

Also after clearing interrupt, there could UP messages available for
processing. So irq handler must check mbox messages.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agoeal: check if running in interrupt context
Harman Kalra [Tue, 14 Jan 2020 09:04:52 +0000 (14:34 +0530)]
eal: check if running in interrupt context

Added an API to check if current execution is in interrupt
context. This will be helpful to handle nested interrupt cases.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
4 years agofib: fix possible integer overflow
Vladimir Medvedkin [Tue, 21 Jan 2020 15:07:09 +0000 (15:07 +0000)]
fib: fix possible integer overflow

This commit fixes possible integer overflow for
prev_idx in build_common_root() CID 350596
and
tbl8_idx in write_edge() CID 350597

Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
overflow_before_widen: Potentially overflowing expression tbl8_idx * 256
with type int (32 bits, signed) is evaluated using 32-bit arithmetic,
and then used in a context that expects an expression of
type uint64_t (64 bits, unsigned).

Coverity issue: 350596, 350597
Fixes: c3e12e0f0354 ("fib: add dataplane algorithm for IPv6")
Cc: stable@dpdk.org
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
4 years agotest/mbuf: check pinned external buffer
Viacheslav Ovsiienko [Thu, 6 Feb 2020 09:49:20 +0000 (09:49 +0000)]
test/mbuf: check pinned external buffer

This patch adds unit test for the mbufs allocated from
the special pool with pinned external data buffers.

The pinned buffer mbufs are tested in the same way as
regular ones with taking into account some specifics
of cloning/attaching.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
4 years agombuf: fix pinned memory function style
Viacheslav Ovsiienko [Wed, 22 Jan 2020 08:50:35 +0000 (08:50 +0000)]
mbuf: fix pinned memory function style

Minor style issue is fixed.

Fixes: 6c8e50c2e549 ("mbuf: create pool with external memory buffers")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
4 years agombuf: display more fields in dump
Stephen Hemminger [Wed, 22 Jan 2020 17:39:56 +0000 (09:39 -0800)]
mbuf: display more fields in dump

The rte_pktmbuf_dump should display offset, refcount, and vlan
info since these are often useful during debugging.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
4 years agomem: fix munmap in error unwind
Stephen Hemminger [Wed, 22 Jan 2020 17:06:11 +0000 (09:06 -0800)]
mem: fix munmap in error unwind

The loop to unwind existing mmaps was only unmapping the
first segment and the error paths after mmap() were not
doing munmap of the current segment.

Fixes: 66cc45e293ed ("mem: replace memseg with memseg lists")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
4 years agoconfig: add Broadcom Stingray for meson cross-compilation
Qingmin Liu [Mon, 6 Jan 2020 02:06:27 +0000 (10:06 +0800)]
config: add Broadcom Stingray for meson cross-compilation

Broadcom Stingray is armv8 CPU having cortex-a72. The implementor ID is
0x41 (arm) and the primary part number is 0xd08 (cortex-a72).

Signed-off-by: Qingmin Liu <qingmin.liu@broadcom.com>
4 years agoconfig: update Marvell ARMADA
Liron Himi [Fri, 29 Nov 2019 09:11:00 +0000 (11:11 +0200)]
config: update Marvell ARMADA

disable more NXP modules that conflict with MUSDK

Signed-off-by: Liron Himi <lironh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agoring: fix namespace prefix of inline functions
Thomas Monjalon [Thu, 23 Jan 2020 08:30:22 +0000 (09:30 +0100)]
ring: fix namespace prefix of inline functions

When adding custom element size feature, some internal inline functions
were added in a public header without rte_ prefix.
It is fixed by adding __rte_ring_.

Fixes: cc4b218790f6 ("ring: support configurable element size")

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
4 years agoapp/pdump: fix build with clang
Stephen Hemminger [Sun, 26 Jan 2020 01:04:38 +0000 (17:04 -0800)]
app/pdump: fix build with clang

Clang checks indentation and found incorrect indentation in pdump.

app/pdump/main.c:598:3: error: misleading indentation;
statement is not part of the previous 'if'
[-Werror,-Wmisleading-indentation]

Fixes: caa7028276b8 ("app/pdump: add tool for packet capturing")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
4 years agobpf: fix headers install with meson
Junxiao Shi [Mon, 27 Jan 2020 21:38:00 +0000 (14:38 -0700)]
bpf: fix headers install with meson

Previously, when librte_bpf is built with meson+ninja, its
headers such as bpf_def is not installed to the system.
This commit fixes this problem.

Fixes: 94972f35a02e ("bpf: add BPF loading and execution framework")
Cc: stable@dpdk.org
Signed-off-by: Junxiao Shi <git@mail1.yoursunny.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agobuild: allow using wildcards to disable drivers
Bruce Richardson [Mon, 27 Jan 2020 14:28:22 +0000 (14:28 +0000)]
build: allow using wildcards to disable drivers

Rather than having to explicitly list each and every driver to disable in a
build, we can use a small python script and the python glob library to
expand out the wildcards. This means that we can configure meson using e.g.

    meson -Ddisable_drivers=crypto/*,event/* build

to do a build omitting all the crypto and event drivers. Explicitly
specified drivers e.g. net/i40e, work as before, and can be mixed with
wildcarded drivers as required.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Robin Jarry <robin.jarry@6wind.com>
Acked-by: Luca Boccassi <bluca@debian.org>
4 years agobuild: remove some icc warnings
Bruce Richardson [Fri, 24 Jan 2020 15:37:55 +0000 (15:37 +0000)]
build: remove some icc warnings

While icc builds without the "werror" setting build successfully, there are
a lot of warnings. To make the output cleaner, and to allow building with
warnings enabled, we can add a list of warning ids to ignore.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agonet/octeontx2: check compiler flag before use
Bruce Richardson [Fri, 24 Jan 2020 15:37:54 +0000 (15:37 +0000)]
net/octeontx2: check compiler flag before use

Rather than assuming all compilers support the -flax-vector-extensions
flag, we should test this before using it, thereby potentially avoiding
warnings.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agomk: ignore missing field initializers warning
Thomas Monjalon [Tue, 21 Jan 2020 14:35:31 +0000 (15:35 +0100)]
mk: ignore missing field initializers warning

Three warnings are commonly disabled in DPDK with make and meson:
* address-of-packed-member
always disabled
* missing-field-initializers
disabled with meson
disabled with make + clang or make + gcc < 4.7
disabled with make + gcc <= 5 for test files and event drivers
* packed-not-aligned
disabled with meson

This change is removing exceptions for missing-field-initializers.
As it is always disabled, some redundant configs are cleaned up.

Now the situation is:
* address-of-packed-member
always disabled
* missing-field-initializers
always disabled
* packed-not-aligned
disabled with meson

It could alternatively be decided to disable missing-field-initializers
only for old gcc (< 6).

The warning packed-not-aligned is not modified in this change.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agocommon/cpt: remove self assignment
Sunila Sahu [Wed, 5 Feb 2020 13:16:18 +0000 (18:46 +0530)]
common/cpt: remove self assignment

This fixes coverity issue of self assignment.

Coverity issue: 353635
Fixes: 99faef832563 ("crypto/octeontx: support ECPM")

Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
4 years agocommon/cpt: fix component for empty IOV buffer
Archana Muniganti [Wed, 5 Feb 2020 13:16:17 +0000 (18:46 +0530)]
common/cpt: fix component for empty IOV buffer

fill_sg_comp_from_iov() prepares gather components for i/p IOV
buffers and extra buf. This API is failing to create a gather component
for extra_buf when IOV buf len is zero. Though there is enough space
to accommodate extra_buf, because of pre-decrementing of extra_buf
length from aggregate size, this issue is seen.

Fixes: b74652f3a91f ("common/cpt: add microcode interface for encryption")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
4 years agocommon/cpt: check cipher and auth keys are set
Archana Muniganti [Wed, 5 Feb 2020 13:16:16 +0000 (18:46 +0530)]
common/cpt: check cipher and auth keys are set

Returning error when cipher and auth key are not getting set

Fixes: 6cc54096520d ("crypto/octeontx: add supported sessions")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
4 years agocommon/cpt: support variable key size for HMAC
Sucharitha Sarananaga [Wed, 5 Feb 2020 13:16:15 +0000 (18:46 +0530)]
common/cpt: support variable key size for HMAC

HMAC algorithms supports key lengths from 1 to 1024 bytes.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
4 years agocrypto/octeontx2: extend AES-GCM capabilities
Archana Muniganti [Wed, 5 Feb 2020 13:16:14 +0000 (18:46 +0530)]
crypto/octeontx2: extend AES-GCM capabilities

OCTEON TX2 crypto PMD supports digest lengths from 4 to 16 bytes
with new firmware.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
4 years agocommon/cpt: remove redundant bitswaps
Anoob Joseph [Wed, 5 Feb 2020 13:16:13 +0000 (18:46 +0530)]
common/cpt: remove redundant bitswaps

The structures can be written for direct h/w usage to avoid multiple
bitswaps.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
4 years agoexamples/ipsec-secgw: test CPU crypto
Marcin Smoczynski [Tue, 4 Feb 2020 13:12:57 +0000 (14:12 +0100)]
examples/ipsec-secgw: test CPU crypto

Enable cpu-crypto mode testing by adding dedicated environmental
variable CRYPTO_PRIM_TYPE. Setting it to 'type cpu-crypto' allows
to run test scenario with cpu crypto acceleration.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
4 years agoexamples/ipsec-secgw: support CPU crypto
Marcin Smoczynski [Tue, 4 Feb 2020 13:12:56 +0000 (14:12 +0100)]
examples/ipsec-secgw: support CPU crypto

Add support for CPU accelerated crypto. 'cpu-crypto' SA type has
been introduced in configuration allowing to use abovementioned
acceleration.

Legacy mode is not currently supported.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agoipsec: support CPU crypto mode
Marcin Smoczynski [Tue, 4 Feb 2020 13:12:55 +0000 (14:12 +0100)]
ipsec: support CPU crypto mode

Update library to handle CPU cypto security mode which utilizes
cryptodev's synchronous, CPU accelerated crypto operations.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agosecurity: add CPU crypto action type
Marcin Smoczynski [Tue, 4 Feb 2020 13:12:53 +0000 (14:12 +0100)]
security: add CPU crypto action type

Introduce CPU crypto action type allowing to differentiate between
regular async 'none security' and synchronous, CPU crypto accelerated
sessions.

This mode is similar to ACTION_TYPE_NONE but crypto processing is
performed synchronously on a CPU.

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/aesni_gcm: support CPU crypto
Marcin Smoczynski [Tue, 4 Feb 2020 13:12:52 +0000 (14:12 +0100)]
crypto/aesni_gcm: support CPU crypto

Add support for CPU crypto mode by introducing required handler.
Authenticated encryption and decryption are supported with tag
generation/verification.

CPU crypto support include both AES-GCM and GMAC algorithms.

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agocryptodev: introduce CPU crypto API
Marcin Smoczynski [Tue, 4 Feb 2020 13:12:51 +0000 (14:12 +0100)]
cryptodev: introduce CPU crypto API

Add new API allowing to process crypto operations in a synchronous
manner. Operations are performed on a set of SG arrays.

Cryptodevs which allows CPU crypto operation mode have to
use RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO capability.

Add a helper method to easily convert mbufs to a SGL form.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agoexamples/fips_validation: support AES XTS
Sucharitha Sarananaga [Tue, 7 Jan 2020 09:38:43 +0000 (15:08 +0530)]
examples/fips_validation: support AES XTS

AES XTS support is added to fips application. Parse test-vectors
from input files, populate AES XTS tests and prepare AES XTS
operations for fips validation.

Signed-off-by: Abed Kamaluddin <akamaluddin@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>
4 years agoexamples/fips_validation: fix cipher length for AES-GCM
Sucharitha Sarananaga [Mon, 6 Jan 2020 09:33:11 +0000 (15:03 +0530)]
examples/fips_validation: fix cipher length for AES-GCM

Cipher length need to be updated in case of AES-GCM decryption.

Fixes: 4aaad2995e13 ("examples/fips_validation: support GCM parsing")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agonet/octeontx2: sync inline tag type
Vamsi Attunuru [Tue, 4 Feb 2020 11:17:25 +0000 (16:47 +0530)]
net/octeontx2: sync inline tag type

Tag type configuration for the inline processed packets is set during
ethdev configuration, it might conflict with tag type configuration
done during Rx adapter configuration which would be setup later.

This conflict is fixed as part of flow rule creation by updating
tag type config of inline same as Rx adapter configured tag type.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add inline IPsec Tx
Ankur Dwivedi [Tue, 4 Feb 2020 11:17:24 +0000 (16:47 +0530)]
net/octeontx2: add inline IPsec Tx

Adding pre-processing required for inline IPsec outbound packets.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add security in Tx
Archana Muniganti [Tue, 4 Feb 2020 11:17:23 +0000 (16:47 +0530)]
net/octeontx2: add security in Tx

Added new flag for SECURITY in compiler optimized Tx fastpath
framework. With this, compiler autogenerates functions which
have security enabled.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
4 years agonet/octeontx2: add security in Rx
Archana Muniganti [Tue, 4 Feb 2020 11:17:22 +0000 (16:47 +0530)]
net/octeontx2: add security in Rx

Added new flag for SECURITY in Rx compiler optimized fastpath
framework. With this, compiler autogenerates functions which
have security enabled.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add inline IPsec Rx
Tejasree Kondoj [Tue, 4 Feb 2020 11:17:21 +0000 (16:47 +0530)]
net/octeontx2: add inline IPsec Rx

Adding post-processing required for inline IPsec inbound packets.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add lookup mem changes to hold SA indices
Archana Muniganti [Tue, 4 Feb 2020 11:17:20 +0000 (16:47 +0530)]
net/octeontx2: add lookup mem changes to hold SA indices

lookup_mem provides fast accessing of data path fields.
Storing sa indices in lookup_mem which are required in
inline rx data path.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add datapath ops in security context
Ankur Dwivedi [Tue, 4 Feb 2020 11:17:19 +0000 (16:47 +0530)]
net/octeontx2: add datapath ops in security context

Adding data path ops in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add security session operations
Anoob Joseph [Tue, 4 Feb 2020 11:17:18 +0000 (16:47 +0530)]
net/octeontx2: add security session operations

Adding security session operations in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/octeontx2: enable CPT to share QP with ethdev
Anoob Joseph [Tue, 4 Feb 2020 11:17:17 +0000 (16:47 +0530)]
crypto/octeontx2: enable CPT to share QP with ethdev

Adding the infrastructure to save one opaque pointer in idev and
implement the consumer-producer in the PMDs which uses it accordingly.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add security capabilities
Ankur Dwivedi [Tue, 4 Feb 2020 11:17:16 +0000 (16:47 +0530)]
net/octeontx2: add security capabilities

Adding security capabilities supported by the eth PMD.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: add security in configure
Tejasree Kondoj [Tue, 4 Feb 2020 11:17:15 +0000 (16:47 +0530)]
net/octeontx2: add security in configure

Adding security in eth device configure.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agonet/octeontx2: create security context
Anoob Joseph [Tue, 4 Feb 2020 11:17:14 +0000 (16:47 +0530)]
net/octeontx2: create security context

Adding security ctx to the eth device.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/octeontx2: configure for inline IPsec
Tejasree Kondoj [Tue, 4 Feb 2020 11:17:13 +0000 (16:47 +0530)]
crypto/octeontx2: configure for inline IPsec

For enabling outbound inline IPsec, a CPT queue needs to be tied
to a NIX PF_FUNC. Distribute CPT queues fairly among all available
otx2 eth ports.

For inbound, one CPT LF will be assigned and initialized by kernel.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocommon/octeontx2: add security capability routine
Vamsi Attunuru [Tue, 4 Feb 2020 11:17:12 +0000 (16:47 +0530)]
common/octeontx2: add security capability routine

This routine returns true if given rte_eth_dev is security offload
capable and belongs to octeontx2.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocommon/octeontx2: add CPT LF mbox for inline inbound
Anoob Joseph [Tue, 4 Feb 2020 11:17:11 +0000 (16:47 +0530)]
common/octeontx2: add CPT LF mbox for inline inbound

Adding the new mbox introduced to configure CPT LF to be used for inline
inbound.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agoexamples/ipsec-secgw: set and use packet type
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:44 +0000 (17:39 +0000)]
examples/ipsec-secgw: set and use packet type

Set mbuf ptype in prepare_one_packet() after parsing ether_type.
Use mbuf ptype after to recognize packet's address family.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agoexamples/ipsec-secgw: add SAD cache
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:43 +0000 (17:39 +0000)]
examples/ipsec-secgw: add SAD cache

Introduce SAD cache.
Stores the most recent SA in a per lcore cache.
Cache represents flat array containing SA's indexed by SPI.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agoexamples/ipsec-secgw: get rid of maximum SP limitation
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:42 +0000 (17:39 +0000)]
examples/ipsec-secgw: get rid of maximum SP limitation

Get rid of maximum SP limitation.
Keep parsed SP's into the sorted by SPI value array.
Use binary search in the sorted SP array to find appropriate SP
for a given SPI.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agoexamples/ipsec-secgw: get rid of maximum SA limitation
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:41 +0000 (17:39 +0000)]
examples/ipsec-secgw: get rid of maximum SA limitation

Get rid of maximum SA limitation.
Keep parsed SA's into the sorted by SPI value array.
Use binary search in the sorted SA array to find appropriate SA
for a given SPI.

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agoexamples/ipsec-secgw: integrate inbound SAD
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:40 +0000 (17:39 +0000)]
examples/ipsec-secgw: integrate inbound SAD

Integrate ipsec SAD support into secgw app:

1. Use SAD library for inbound SA lookup
2. Changes in struct sa_ctx:
  - sa array allocates dynamically depending on number of configured sa
  - All SA's are kept one by one without using SPI2IDX
3. SP's userdata now contain index of SA in sa_ctx instead of SPI
4. Get rid of SPI2IDX macro

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agoexamples/ipsec-secgw: implement inbound SAD
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:39 +0000 (17:39 +0000)]
examples/ipsec-secgw: implement inbound SAD

Add initial support for librte_ipsec SAD library

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agoipsec: move SAD name length
Vladimir Medvedkin [Fri, 31 Jan 2020 17:39:38 +0000 (17:39 +0000)]
ipsec: move SAD name length

Move IPSEC_SAD_NAMESIZE into public header
and rename it to RTE_IPSEC_SAD_NAMESIZE

Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
4 years agocrypto/dpaa_sec: reorganize structure members
Gagandeep Singh [Mon, 27 Jan 2020 09:07:24 +0000 (14:37 +0530)]
crypto/dpaa_sec: reorganize structure members

This patch reorganize the members of a structure
used by driver in its data-path to improve
performance.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/dpaa_sec: fix IOVA conversions
Gagandeep Singh [Mon, 27 Jan 2020 09:07:23 +0000 (14:37 +0530)]
crypto/dpaa_sec: fix IOVA conversions

DPAA sec driver is using virtual to physical address
translation in its data path and driver is using
dpaax_iova_table_update() API in every address translation
which is very costly.
This patch moves dpaax_iova_table_update() calling to rte_dpaa_mem_ptov(),
only if it fails to found translation from DPAAX table.

Fixes: 12e5842945bf ("crypto/dpaa_sec: fix IOVA table")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/ccp: support V1000/R1000
Selwin Sebastian [Mon, 30 Dec 2019 16:34:49 +0000 (22:04 +0530)]
crypto/ccp: support V1000/R1000

Add a new CCP PCI device ID for supporting V1000/R1000 processors.

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
Acked-by: Ravi Kumar <ravi1.kumar@amd.com>
4 years agotest/compress: add cycle-count mode to perf tool
Artur Trybula [Wed, 11 Dec 2019 15:50:00 +0000 (16:50 +0100)]
test/compress: add cycle-count mode to perf tool

This commit adds cycle-count mode to the compression perf tool.
The new mode enhances the compression performance tool to allow
cycle-count measurement of both hardware and softwate PMDs.

Signed-off-by: Artur Trybula <arturx.trybula@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
4 years agocrypto/armv8: fix clang build
Ruifeng Wang [Thu, 23 Jan 2020 03:45:57 +0000 (11:45 +0800)]
crypto/armv8: fix clang build

1. Clang requires braces around initialization of subobject.
2. Clang complains implicit conversion of enumeration type.

Trapped issue with Clang version 8.0 and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO
was set.
Error messages:
rte_armv8_pmd.c:144:2: error: suggest braces around initialization of
 subobject [-Werror,-Wmissing-braces]
        NULL
        ^~~~
        {   }
/usr/lib/llvm-8/lib/clang/8.0.0/include/stddef.h:105:16: note: expanded
 from macro 'NULL'
               ^~~~~~~~~~
rte_armv8_pmd.c:429:21: error: implicit conversion from enumeration
 type 'enum rte_crypto_cipher_operation' to different enumeration type
      'enum armv8_crypto_cipher_operation' [-Werror,-Wenum-conversion]
        cop = sess->cipher.direction;
            ~ ~~~~~~~~~~~~~^~~~~~~~~

Fixes: 169ca3db550c ("crypto/armv8: add PMD optimized for ARMv8 processors")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/armv8: enable meson build
Dharmik Thakkar [Thu, 23 Jan 2020 03:45:54 +0000 (11:45 +0800)]
crypto/armv8: enable meson build

Add new meson.build file for crypto/armv8

Suggested-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>
4 years agocrypto/armv8: link to library hosted by Arm
Ruifeng Wang [Thu, 23 Jan 2020 03:45:53 +0000 (11:45 +0800)]
crypto/armv8: link to library hosted by Arm

Armv8 crypto PMD linked to armv8_crypto library created by Marvell.
Maintenance of armv8_crypto library will be discontinued.
Change Armv8 PMD to link to AArch64 crypto library hosted by Arm.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agotest/crypto: refactor unit tests into one combined array
Adam Dybkowski [Mon, 20 Jan 2020 13:11:46 +0000 (14:11 +0100)]
test/crypto: refactor unit tests into one combined array

This patch refactors most of unit tests to be contained in one
combined array, and run depending on the PMD capabilities instead of
providing multiple array with tests for individual PMDs.
Only a subset of unit tests was merged into one array - it combines
all tests originally meant to be run on these PMDs:
null, aesni_mb, aesni_gcm, openssl, qat, sw_snow3g, sw_kasumi, sw_zuc.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agotest/crypto: add capability checks
Adam Dybkowski [Mon, 20 Jan 2020 13:11:45 +0000 (14:11 +0100)]
test/crypto: add capability checks

This patch adds capability checks to many tests meant to be run
in the future on various PMDs. This way the code is prepared for
more thorough refactoring in order to create one big central
unit tests array.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agotest/crypto: refactor unit tests
Adam Dybkowski [Mon, 20 Jan 2020 13:11:44 +0000 (14:11 +0100)]
test/crypto: refactor unit tests

This patch gets rid of individual functions that all call
test_blockcipher_all_tests separately for every PMD and instead
provides just one set universal for all PMDs that's basing on the
driver id from the global variable gbl_driver_id.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/snow3g: use IPsec library
Pablo de Lara [Mon, 20 Jan 2020 11:47:56 +0000 (11:47 +0000)]
crypto/snow3g: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for SNOW3G-UEA2 and SNOW3G-UIA2 from version v0.53,
moving from libSSO SNOW3G library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/kasumi: use IPsec library
Pablo de Lara [Mon, 20 Jan 2020 11:47:55 +0000 (11:47 +0000)]
crypto/kasumi: use IPsec library

Link against Intel IPsec Multi-buffer library, which
added support for KASUMI-F8 and KASUMI-F9 from version v0.53,
moving from libSSO KASUMI library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>