dpdk.git
4 years agonet/hns3: support setting VF PVID by PF driver
Chengchang Tang [Wed, 1 Jul 2020 11:54:36 +0000 (19:54 +0800)]
net/hns3: support setting VF PVID by PF driver

This patch adds support setting VF PVID by hns3 PF kernel ethdev driver
on the host by "ip link set <eth num> vf <vf id> vlan <vlan tag>"
command.

Because of the hardware constraints, the striped VLAN tag will always in
Rx descriptors which should has been dropped when PVID is enabled and
the PVID will overwrite the outer VLAN tag in Tx descriptor. So, hns3
PMD driver need to change the processing of VLAN tags in the process of
Tx and Rx according to whether PVID is enabled.
1) If the hns3 PF kernel ethdev driver sets the PVID for VF device
   before the initialization of the related VF device, hns3 VF PMD
   driver should get the PVID state from PF driver through mailbox and
   update the related state in txq and rxq maintained by hns3 VF driver
   to change the process of Tx and Rx.
2) If the hns3 PF kernel ethdev driver sets the PVID for VF device after
   initialization of the related VF device, the PF driver will notify VF
   driver to update the PVID state. The VF driver will update the PVID
   configuration state immediately to ensure that the VLAN process in Tx
   and Rx is correct. But in the window period of this state transition,
   packets loss or packets with wrong VLAN may occur.
3) Due to hardware limitations, we only support two-layer VLAN hardware
   offload in Tx direction based on hns3 network engine, so when PVID is
   enabled, QinQ insert is no longer supported. And when PVID is
   enabled, in the following two cases:
     i) packets with more than two VLAN tags.
     ii) packets with one VLAN tag while the hardware VLAN insert is
         enabled.
   The packets will be regarded as abnormal packets and discarded by
   hardware in Tx direction. For debugging purposes, a validation check
   for these types of packets is added to the '.tx_pkt_prepare' ops
   implementation function named hns3_prep_pkts to inform users that
   these packets will be discarded.

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
4 years agonet/hns3: decrease non-nearby memory access in Rx
Chengchang Tang [Wed, 1 Jul 2020 11:54:35 +0000 (19:54 +0800)]
net/hns3: decrease non-nearby memory access in Rx

Currently, hns3 PMD driver needs know the PVID configuration state and
do different processing in the 'rx_pkt_burst' ops implementation
function.

This patch adds a member to struct hns3_rx_queue/hns3_tx_queue of the
driver to indicate the PVID configuration status, so it isn't need
to access other data structure in the 'rx_pkt_burst' ops implementation,
to avoid performance loss because of reducing cache miss.

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: support LRO
Wei Hu (Xavier) [Wed, 1 Jul 2020 11:54:34 +0000 (19:54 +0800)]
net/hns3: support LRO

This patch adds support of LRO offload for hns3 PMD driver.

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: support symmetric RSS
Lijun Ou [Wed, 1 Jul 2020 11:54:33 +0000 (19:54 +0800)]
net/hns3: support symmetric RSS

This patch adds support of symmetric algorithm of RSS.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
4 years agonet/ice/base: update version
Qi Zhang [Wed, 1 Jul 2020 05:49:51 +0000 (13:49 +0800)]
net/ice/base: update version

Update base code version in readme.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: clear and free XLT entries on reset
Qi Zhang [Wed, 1 Jul 2020 05:49:50 +0000 (13:49 +0800)]
net/ice/base: clear and free XLT entries on reset

This fix has been added to address memory leak issues resulting from
triggering a sudden driver reset which does not allow us to follow our
normal removal flows for SW XLT entries for advanced features.

- Adding call to destroy flow profile locks when clearing SW XLT tables.
- Extraction sequence entries were not correctly cleared previously
which could cause ownership conflicts for repeated reset-replay calls.

Fixes: 969890d505b1 ("net/ice/base: enable clearing of HW tables")
Cc: stable@dpdk.org
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: split capability parse into separate functions
Qi Zhang [Wed, 1 Jul 2020 05:49:49 +0000 (13:49 +0800)]
net/ice/base: split capability parse into separate functions

The ice_parse_caps function is used to convert the capability block data
coming from firmware into a structured format used by other parts of the
code.

The current implementation directly updates the hw->func_caps and
hw->dev_caps structures. It is directly called from within
ice_aq_discover_caps. This causes the discover_caps function to have the
side effect of modifying the hw capability structures, which is not
intuitive.

Split this function into ice_parse_dev_caps and ice_parse_func_caps.
These functions will take a pointer to the dev_caps and func_caps
respectively. Also create an ice_parse_common_caps for sharing the
capability logic that is common to device and function.

Doing so enables a future refactor to allow reading and parsing
capabilities into a local caps structure instead of modifying the
members of the hw structure directly.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add capability list AQ function
Qi Zhang [Wed, 1 Jul 2020 05:49:48 +0000 (13:49 +0800)]
net/ice/base: add capability list AQ function

The current implementation for reading device and function capabilities
from firmware, ice_aq_discover_caps, has potentially undesirable
side effects.

ice_aq_discover_caps calls ice_parse_caps, resulting in overwriting the
capabilities stored in the hw structure. This is ok during
initialization, but means that code which wants to read the capabilities
after initialization cannot use ice_aq_discover_caps without being
careful of the side effects.

Factor out the AQ command logic into a new ice_aq_list_caps function.
This will be used by the ice_aq_discover_caps function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: clean code in flow director module
Qi Zhang [Wed, 1 Jul 2020 05:49:47 +0000 (13:49 +0800)]
net/ice/base: clean code in flow director module

Remove unused macro and function.
Declare no external referenced function as static.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: move LLDP function to common module
Qi Zhang [Wed, 1 Jul 2020 05:49:46 +0000 (13:49 +0800)]
net/ice/base: move LLDP function to common module

To implement a FW workaround for LFC, a set_local_mib must be
performed after every link up event.  For systems that do not
have DCB configured, we need to move the function
ice_aq_set_lldp_mib() from the DCB specific ice_dcb.c to
ice_common.c so that the driver always has access to this AQ
command.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: cleanup some code style
Qi Zhang [Wed, 1 Jul 2020 05:49:45 +0000 (13:49 +0800)]
net/ice/base: cleanup some code style

Cleanup code style issue reported by kernel checkpatch.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix GTP-U inner RSS IPv4 IPv6 co-exist
Qi Zhang [Wed, 1 Jul 2020 05:49:44 +0000 (13:49 +0800)]
net/ice/base: fix GTP-U inner RSS IPv4 IPv6 co-exist

An IP header combined with GTP-U header should be regarded as
inner layer for RSS, otherwise it mess the field vector between
an IPv4 rule and IPv6 rule e.g:

testpmd> flow create 0 ingress pattern eth / ipv4 / udp / gtpu / \
gtpu_psc  / ipv4 / udp / end actions rss types ipv4-udp end key_len \
0 queues end / end
testpmd> flow create 0 ingress pattern eth / ipv4 / udp / gtpu / \
gtpu_psc  / ipv6 / udp / end actions rss types ipv6-udp end key_len \
0 queues end / end

Fixes: b7d34ccc47b5 ("net/ice/base: packet encapsulation for RSS")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice: redirect switch rule with to VSI list action
Wei Zhao [Wed, 17 Jun 2020 06:14:27 +0000 (14:14 +0800)]
net/ice: redirect switch rule with to VSI list action

Support redirect a switch rule if its action is to VSI list.

Fixes: 397b4b3c5095 ("net/ice: enable flow redirect on switch")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/mlx5: add OS specific flow actions operations
Dekel Peled [Sun, 28 Jun 2020 14:06:55 +0000 (17:06 +0300)]
net/mlx5: add OS specific flow actions operations

This patch introduces the OS specific functions, for flow actions
create and destroy operations.

In existing implementation, the functions to create flow actions
return a pointer to the created action object.

The new OS specific functions to create flow actions return 0 on
success, and (-1) on failure.
On success, a pointer to the created action object is returned
using an additional parameter.
On failure errno is set.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add OS specific flow create and destroy
Dekel Peled [Sun, 28 Jun 2020 14:06:54 +0000 (17:06 +0300)]
net/mlx5: add OS specific flow create and destroy

This patch introduces the OS specific functions, for flow create
and flow destroy operations.

In existing implementation, the functions to create objects
(flow/table/matcher) return a pointer to the created object.
The functions to destroy objects return 0 on success and errno on
failure.

The new OS specific functions to create objects return 0 on success,
and (-1) on failure.
On success, a pointer to the created object is returned using an
additional parameter.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add OS specific flow type selection
Dekel Peled [Sun, 28 Jun 2020 14:06:53 +0000 (17:06 +0300)]
net/mlx5: add OS specific flow type selection

In current implementation the flow type (DV/Verbs) is selected
using dedicated function flow_get_drv_type().

This patch adds OS specific function mlx5_flow_os_get_type(), to
allow OS specific flow type selection.
The new function is called by flow_get_drv_type(), and if it returns a
valid value (DV/Verbs) no more logic is required.
Otherwise the existing logic is executed.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add OS specific flow related utilities
Dekel Peled [Sun, 28 Jun 2020 14:06:52 +0000 (17:06 +0300)]
net/mlx5: add OS specific flow related utilities

This patch introduces the first OS specific utility functions,
for use by flow engine in different OS implementation.

The first utility functions are:
bool mlx5_flow_os_item_supported(item)
bool mlx5_flow_os_action_supported(action)

They are implemented to check OS specific support for different
item types and action types.

New header file is added:
drivers/net/mlx5/linux/mlx5_flow_os.h

This file contains the utility functions mentioned above for Linux OS.
At this stage they are implemented as static inline, for efficiency,
and always return true.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: rename Verbs action to generic name
Dekel Peled [Sun, 28 Jun 2020 14:06:51 +0000 (17:06 +0300)]
net/mlx5: rename Verbs action to generic name

As part of the effort to support DPDK on Windows and other OS,
rename 'verbs_action' to the generic name 'action'.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: rename Verbs flow to generic name
Dekel Peled [Sun, 28 Jun 2020 14:06:50 +0000 (17:06 +0300)]
net/mlx5: rename Verbs flow to generic name

As part of the effort to support DPDK on Windows and other OS,
rename from IB related name to generic name.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agocommon/octeontx2: fix crash on running procinfo
Harman Kalra [Mon, 29 Jun 2020 13:26:05 +0000 (18:56 +0530)]
common/octeontx2: fix crash on running procinfo

Segmentation fault has been observed while running procinfo
with reset options i.e. --stats-reset and --xstats-reset.
Reason is procinfo runs as a secondary process and tries to
hold a lock which is part of struct mdev, which was not
allocated as part of shared memory.

Fixes: 5ca59711f771 ("common/octeontx2: add mailbox base support infra")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agonet/iavf: fix RSS RETA after restart
Junyu Jiang [Fri, 19 Jun 2020 07:44:02 +0000 (07:44 +0000)]
net/iavf: fix RSS RETA after restart

This patch moved the RSS initialization from dev start to
dev configure, to fix the issue that RSS redirection table
can not be kept after restarting port.

Fixes: 69dd4c3d0898 ("net/avf: enable queue and device")
Cc: stable@dpdk.org
Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ixgbe/base: remove dead code
Ferruh Yigit [Tue, 30 Jun 2020 14:45:54 +0000 (15:45 +0100)]
net/ixgbe/base: remove dead code

The question around getting rid of the assignments seems lived
long enough, if they are not needed until now, we can drop them.

Fixes: 39bca0ed994c ("ixgbe: DCB in base driver")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: fix uninitialized variable
Ferruh Yigit [Tue, 23 Jun 2020 13:45:31 +0000 (14:45 +0100)]
net/iavf: fix uninitialized variable

This is observed with experimental gcc 11, although the older gcc
versions don't complain about it, issue seems a valid one.
gcc version 11.0.0 20200621 (experimental) (GCC)

Build error
.../drivers/net/iavf/iavf_ethdev.c: In function ‘iavf_dev_link_update’:
.../drivers/net/iavf/iavf_ethdev.c:641:6:
    error: ‘new_link’ is used uninitialized [-Werror=uninitialized]
  641 |  if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link,
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  642 |     *(uint64_t *)&dev->data->dev_link,
      |     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  643 |     *(uint64_t *)&new_link) == 0)
      |     ~~~~~~~~~~~~~~~~~~~~~~~
.../drivers/net/iavf/iavf_ethdev.c:596:22:
    note: ‘new_link’ declared here
  596 |  struct rte_eth_link new_link;
      |                      ^~~~~~~~
cc1: all warnings being treated as error

All fields of the 'new_link' struct is already set in function, so the
'uninitialized' warning is hard to get. This is because the combination
of aligning and bitfield usage of the struct

The definition of the struct is:
struct rte_eth_link {
        uint32_t link_speed;        /**< ETH_SPEED_NUM_ */
        uint16_t link_duplex  : 1;  /**< ETH_LINK_[HALF/FULL]_DUPLEX */
        uint16_t link_autoneg : 1;  /**< ETH_LINK_[AUTONEG/FIXED] */
        uint16_t link_status  : 1;  /**< ETH_LINK_[DOWN/UP] */
} __rte_aligned(8);      /**< aligned for atomic64 read/write */

Overall the size of the 'struct rte_eth_link' is 64 bits, but function
only sets the 35 bits of it, because only 3 bits of 16 bits variable are
used.
When the struct cast to 'uint64_t' because of the 'rte_atomic64_cmpset'
the upper 29 bits are used without initialization.

To fix the uninitialized usage, memset the variable 'new_link' before
using it.

Fixes: 48de41ca11f0 ("net/avf: enable link status update")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice: fix EEPROM data
Shougang Wang [Sun, 28 Jun 2020 03:37:36 +0000 (03:37 +0000)]
net/ice: fix EEPROM data

Kernel driver reads EEPROM data from flash but DPDK reads from
shadow ram. This patch fixes the issue by changing method to get
EEPROM data from flash.

Fixes: 68a1ab82ad74 ("net/ice: speed up to retrieve EEPROM")
Cc: stable@dpdk.org
Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ixgbe: report 10Mbps link speed for x553
Wei Zhao [Tue, 30 Jun 2020 01:16:51 +0000 (09:16 +0800)]
net/ixgbe: report 10Mbps link speed for x553

For ixgbe x553(IXGBE_DEV_ID_X550EM_A_1G_T) it support 10M
link speed, so add the support link speed info for 10Mb/s.

Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
4 years agonet/ice: support original VF action for DCF
Qi Zhang [Thu, 11 Jun 2020 10:14:51 +0000 (10:14 +0000)]
net/ice: support original VF action for DCF

Add support to allow the original VF actions in DCF.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agoservice: fix core mapping reset
Lukasz Wojciechowski [Wed, 8 Jul 2020 13:37:33 +0000 (15:37 +0200)]
service: fix core mapping reset

The rte_service_lcore_reset_all function stops execution of services
on all lcores and switches them back from ROLE_SERVICE to ROLE_RTE.
However the thread loop for slave lcores (eal_thread_loop) distincts these
roles to set lcore state after processing delegated function.
It sets WAIT state for ROLE_SERVICE, but FINISHED for ROLE_RTE.
So changing the role to RTE before stopping work in slave lcores
causes lcores to end in FINISHED state. That is why the rte_eal_lcore_wait
must be run after rte_service_lcore_reset_all to bring back lcores to
launchable (WAIT) state.
This has been fixed in test app and clarified in API documentation.

Setting the state to WAIT in rte_service_runner_func is premature
as the rte_service_runner_func function is still a part of the lcore
function delegated to slave lcore. The state is overwritten anyway in
slave lcore thread loop. This premature setting state to WAIT might
however cause rte_eal_lcore_wait, that was called by the application,
to return before slave lcore thread set the FINISHED state. That's
why it is removed from librte_eal rte_service_runner_func function.

Bugzilla ID: 464
Fixes: 21698354c832 ("service: introduce service cores concept")
Fixes: f038a81e1c56 ("service: add unit tests")
Cc: stable@dpdk.org
Reported-by: Sarosh Arif <sarosh.arif@emumba.com>
Signed-off-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
4 years agoeventdev: relax SMP barriers with C11 atomics
Phil Yang [Tue, 7 Jul 2020 15:54:53 +0000 (23:54 +0800)]
eventdev: relax SMP barriers with C11 atomics

The impl_opaque field is shared between the timer arm and cancel
operations. Meanwhile, the state flag acts as a guard variable to
make sure the update of impl_opaque is synchronized. The original
code uses rte_smp barriers to achieve that. This patch uses C11
atomics with an explicit one-way memory barrier instead of full
barriers rte_smp_w/rmb() to avoid the unnecessary barrier on aarch64.

Since compilers can generate the same instructions for volatile and
non-volatile variable in C11 __atomics built-ins, so remain the volatile
keyword in front of state enum to avoid the ABI break issue.

Cc: stable@dpdk.org
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
4 years agoeventdev: remove redundant reset on timer cancel
Phil Yang [Tue, 7 Jul 2020 15:54:52 +0000 (23:54 +0800)]
eventdev: remove redundant reset on timer cancel

There is no thread will access these impl_opaque data after timer
canceled. When new timer armed, it got refilled. So the cleanup
process is unnecessary.

Cc: stable@dpdk.org
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
4 years agoeventdev: use C11 atomics for lcore timer armed flag
Phil Yang [Tue, 7 Jul 2020 15:54:51 +0000 (23:54 +0800)]
eventdev: use C11 atomics for lcore timer armed flag

The in_use flag is a per core variable which is not shared between
lcores in the normal case and the access of this variable should be
ordered on the same core. However, if non-EAL thread pick the highest
lcore to insert timers into, there is the possibility of conflicts
on this flag between threads. Then the atomic compare-and-swap
operation is needed.

Use the C11 atomics instead of the generic rte_atomic operations to
avoid the unnecessary barrier on aarch64.

Cc: stable@dpdk.org
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
4 years agoeventdev: fix race condition on timer list counter
Phil Yang [Tue, 7 Jul 2020 15:54:50 +0000 (23:54 +0800)]
eventdev: fix race condition on timer list counter

The n_poll_lcores counter and poll_lcore array are shared between lcores
and the update of these variables are out of the protection of spinlock
on each lcore timer list. The read-modify-write operations of the counter
are not atomic, so it has the potential of race condition between lcores.

Use c11 atomics with RELAXED ordering to prevent confliction.

Fixes: cc7b73ea9e3b ("eventdev: add new software timer adapter")
Cc: stable@dpdk.org
Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
4 years agotest/crypto: add ChaCha20-Poly1305 cases
Arek Kusztal [Tue, 7 Jul 2020 15:16:01 +0000 (17:16 +0200)]
test/crypto: add ChaCha20-Poly1305 cases

This patch adds Chacha20-Poly1305 implementation to
cryptodev tests.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Tejasree Kondoj <ktejasree@marvell.com>
4 years agocrypto/qat: support ChaCha20-Poly1305
Arek Kusztal [Tue, 7 Jul 2020 15:16:00 +0000 (17:16 +0200)]
crypto/qat: support ChaCha20-Poly1305

This patchset adds ChaCha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
4 years agocommon/qat: add multi-process handling of capabilities
Arek Kusztal [Tue, 7 Jul 2020 15:02:39 +0000 (17:02 +0200)]
common/qat: add multi-process handling of capabilities

Move qat capabilities data into a memzone where it can be
shared by primary and secondary processes.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
4 years agocrypto/qat: add multi-process handling of driver ID
Arek Kusztal [Tue, 7 Jul 2020 15:02:38 +0000 (17:02 +0200)]
crypto/qat: add multi-process handling of driver ID

As cryptodev driver_id is allocated per-process,
a corner case exists where binaries for primary and
secondary processes could have different driver_ids
if built differently. Add checking in qat PMD to catch and
handle the case where driver_ids are inconsistent.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
4 years agocommon/qat: improve multi-process handling
Arek Kusztal [Tue, 7 Jul 2020 15:02:37 +0000 (17:02 +0200)]
common/qat: improve multi-process handling

This patch refactors qat data into structures
which are local to the process and structures which
are intended to be shared by primary and secondary
processes. This enables qat devices to be used by
multi process applications.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
4 years agocommon/dpaax: remove unnecessary jump for PDCP
Akhil Goyal [Tue, 10 Dec 2019 12:50:33 +0000 (18:20 +0530)]
common/dpaax: remove unnecessary jump for PDCP

In case of LX2160, PROTOCOL command can be used in some of the PDCP
cases, in those the jump command prior to KEY command may not be
required.

The issue observed due to these JUMP command on LX2160 is that,
the CAAM gets stuck and the processing never get completed. The
system becomes unusable.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agocommon/dpaax: fix 12-bit null auth case
Akhil Goyal [Wed, 8 Jan 2020 12:52:31 +0000 (18:22 +0530)]
common/dpaax: fix 12-bit null auth case

In cases of NULL auth in PDCP, the descriptors
should be based on ALGORITHM command instead of
PROTOCOL command.
It was done in case of encap, but was missing in
decap.

Fixes: 526cdf60f1e5 ("crypto/dpaa2_sec: update desc for PDCP 18-bit enc-auth")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agocrypto/dpaa2_sec: fix HFN override
Akhil Goyal [Fri, 14 Feb 2020 10:05:18 +0000 (15:35 +0530)]
crypto/dpaa2_sec: fix HFN override

HFN is set as a uint32_t but the value retrieved is
uint8_t. Fixed the type casting to get the correct value.

Fixes: bef594ec5cc8 ("crypto/dpaa2_sec: support PDCP offload")
Fixes: af61f0750948 ("crypto/dpaa2_sec: support scatter gather for proto offloads")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agocrypto/dpaax_sec: fix inline query for descriptors
Akhil Goyal [Thu, 4 Jun 2020 20:04:10 +0000 (01:34 +0530)]
crypto/dpaax_sec: fix inline query for descriptors

The maximum length of job descriptor which is formed
is 13 words and hence rta_inline_query should take
care of the max descriptor(shared + job) lengths and
thus find out of the key can be referenced or immediate.

Fixes: 05b12700cd4c ("crypto/dpaa_sec: support null algos for protocol offload")
Fixes: 13273250eec5 ("crypto/dpaa2_sec: support AES-GCM and CTR")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agotest/crypto-perf: add option to enable session HFN
Akhil Goyal [Mon, 6 Jul 2020 05:00:34 +0000 (10:30 +0530)]
test/crypto-perf: add option to enable session HFN

Add a new option for PDCP cases to enable use of session
based fixed HFN value instead of per packet HFN which was
enabled by hfn override feature.
By default HFN override is enabled and if session based
fixed HFN need to be tested, add "--pdcp-ses-hfn-en" in the
command line.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agotest/crypto: update PDCP HFN scenarios
Akhil Goyal [Mon, 6 Jul 2020 05:00:23 +0000 (10:30 +0530)]
test/crypto: update PDCP HFN scenarios

As per current framework of PDCP testing, app can only support
either HFN override or fixed session HFN values but not both.
Now to enable both, either we duplicate all PDCP cases(>100)
for both override and fixed HFN. It will look clumsy as the
number of cases will be very high without much value addition.

Now to overcome this, we can do HFN override for Downlink cases
and fixed HFN for uplink cases. This way we will not loose the
test coverage and there will not be duplicacy in the test cases.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agocrypto/dpaax_sec: fix 18-bit PDCP cases with HFN override
Akhil Goyal [Mon, 1 Jun 2020 17:17:45 +0000 (22:47 +0530)]
crypto/dpaax_sec: fix 18-bit PDCP cases with HFN override

In case of RTA_SEC_ERA = 8, where the length of shared desc
is large for some of PDCP cases, the descriptor buffer cannot
hold 2 extra words when HFN override is enabled. As a result,
the descriptor fails.

This patch converts one of the keys from immediate key to
reference key hence reducing the length of the descriptor.

Fixes: 2e4cbdb4b2c2 ("crypto/dpaax_sec: support PDCP U-Plane with integrity")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agocrypto/octeontx2: support ChaCha20-Poly1305
Tejasree Kondoj [Tue, 16 Jun 2020 13:02:16 +0000 (18:32 +0530)]
crypto/octeontx2: support ChaCha20-Poly1305

Add ChaCha20-Poly1305 AEAD algorithm support in crypto_octeontx2 PMD

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
4 years agocrypto/octeontx2: discover capabilities
Tejasree Kondoj [Tue, 16 Jun 2020 13:02:15 +0000 (18:32 +0530)]
crypto/octeontx2: discover capabilities

Populate capabilities based on device features.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
4 years agocryptodev: add traces in multi-process path
Fiona Trahe [Wed, 10 Jun 2020 18:53:08 +0000 (20:53 +0200)]
cryptodev: add traces in multi-process path

This patch adds traces to some Cryptodev functions that are used
in primary/secondary context.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocryptodev: add function to check queue pair status
Fiona Trahe [Wed, 24 Jun 2020 14:26:53 +0000 (16:26 +0200)]
cryptodev: add function to check queue pair status

This patch adds function that can check if queue pair
was already setup. This may be useful when dealing with
multi process approach in cryptodev.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/qat: fix AES-XTS capabilities
Adam Dybkowski [Fri, 26 Jun 2020 11:23:42 +0000 (13:23 +0200)]
crypto/qat: fix AES-XTS capabilities

This patch fixes the increment field of the AES-XTS cipher key size.

Fixes: 7d5ef3bb32cd ("crypto/qat: support XTS")
Cc: stable@dpdk.org
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
4 years agotest/crypto: use generic test suite for OCTEON TX/TX2
Anoob Joseph [Fri, 3 Jul 2020 05:41:44 +0000 (11:11 +0530)]
test/crypto: use generic test suite for OCTEON TX/TX2

This patch enables the generic crypto tests for OCTEON TX and
OCTEON TX2 PMDs. Removes the PMD specific tests.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agotest/crypto: remove some PMD specific null tests
Anoob Joseph [Fri, 3 Jul 2020 05:41:43 +0000 (11:11 +0530)]
test/crypto: remove some PMD specific null tests

This patch removes the OCTEON TX and OCTEON TX2 PMDs specific
test cases related to null cipher.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agocrypto/octeontx2: revert non-byte aligned data feature
Ankur Dwivedi [Fri, 3 Jul 2020 05:41:42 +0000 (11:11 +0530)]
crypto/octeontx2: revert non-byte aligned data feature

This reverts commit 51f3e107aca23a1cbc1a5ad9fdce7921340307b5.

For SNOW and ZUC algos the offset value for enryption and decryption
is converted to bytes. Hence RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
feature is not supported by the octeontx2 crypto pmd.

Fixes: 51f3e107aca2 ("crypto/octeontx2: enable non-byte aligned data")
Cc: stable@dpdk.org
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
4 years agocrypto/octeontx: revert non-byte aligned data feature
Ankur Dwivedi [Fri, 3 Jul 2020 05:41:41 +0000 (11:11 +0530)]
crypto/octeontx: revert non-byte aligned data feature

This reverts commit 32b8f26adf8b26a55230408ff6adffd4b2327e52.

For SNOW and ZUC algos the offset value for enryption and decryption
is converted to bytes. Hence RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
feature is not supported by the octeontx crypto pmd.

Fixes: 32b8f26adf8b ("crypto/octeontx: enable non-byte aligned data")
Cc: stable@dpdk.org
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
4 years agocrypto/octeontx2: reset session private data
Ankur Dwivedi [Fri, 3 Jul 2020 05:41:40 +0000 (11:11 +0530)]
crypto/octeontx2: reset session private data

This patch sets the first 32 bytes of session private data
to zero. This prevents garbage data to be used in code logic.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
4 years agocrypto/octeontx: reset session private data
Ankur Dwivedi [Fri, 3 Jul 2020 05:41:39 +0000 (11:11 +0530)]
crypto/octeontx: reset session private data

This patch sets the first 32 bytes of session private data
to zero. This prevents garbage data to be used in code logic.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
4 years agocrypto/octeontx: remove empty statistics callback
Ankur Dwivedi [Fri, 3 Jul 2020 05:41:38 +0000 (11:11 +0530)]
crypto/octeontx: remove empty statistics callback

The stats get and reset functions for octeontx crypto PMD are
unimplemented. So removing them.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
4 years agocommon/cpt: fix encryption offset
Ankur Dwivedi [Fri, 3 Jul 2020 05:41:37 +0000 (11:11 +0530)]
common/cpt: fix encryption offset

In case of gmac auth the encryption offset should be set to zero.

Fixes: b74652f3a91f ("common/cpt: add microcode interface for encryption")
Fixes: 177b41ceee61 ("common/cpt: add microcode interface for decryption")
Cc: stable@dpdk.org
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
4 years agotest/crypto-perf: support DOCSIS protocol
David Coyle [Fri, 3 Jul 2020 12:39:33 +0000 (13:39 +0100)]
test/crypto-perf: support DOCSIS protocol

Update test-crypto-perf app to calculate DOCSIS throughput numbers.

1 new parameter is added for DOCSIS:
--docsis-hdr-sz <n>

./dpdk-test-crypto-perf -l 3,4 --socket-mem 2048,0
--vdev crypto_aesni_mb_pmd_1 -n 1 -- --devtype crypto_aesni_mb
--optype docsis --cipher-algo aes-docsisbpi --cipher-op encrypt
--cipher-key-sz 16 --cipher-iv-sz 16 --burst-sz 32 --total-ops 20000000
--buffer-sz 1024 --silent --docsis-hdr-sz 17

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
4 years agotest/security: add DOCSIS capability checks
David Coyle [Fri, 3 Jul 2020 12:39:32 +0000 (13:39 +0100)]
test/security: add DOCSIS capability checks

Add unit tests for DOCSIS capabilitity checks.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agotest/crypto: add DOCSIS security cases
David Coyle [Fri, 3 Jul 2020 12:39:31 +0000 (13:39 +0100)]
test/crypto: add DOCSIS security cases

Add uplink and downlink DOCSIS unit test cases and vectors, to test
the combined DOCSIS Crypto-CRC support that has been added to the
rte_security library.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
4 years agocrypto/qat: support DOCSIS protocol
David Coyle [Fri, 3 Jul 2020 12:39:30 +0000 (13:39 +0100)]
crypto/qat: support DOCSIS protocol

Add support to the QAT SYM PMD for the DOCSIS protocol, through the
rte_security API. This, therefore, includes adding support for the
rte_security API to this PMD.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
4 years agocrypto/aesni_mb: support DOCSIS protocol
David Coyle [Fri, 3 Jul 2020 12:39:29 +0000 (13:39 +0100)]
crypto/aesni_mb: support DOCSIS protocol

Add support to the AESNI-MB PMD for the DOCSIS protocol, through the
rte_security API. This, therefore, includes adding support for the
rte_security API to this PMD.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
4 years agocryptodev: add comments for DOCSIS protocol
David Coyle [Fri, 3 Jul 2020 12:39:28 +0000 (13:39 +0100)]
cryptodev: add comments for DOCSIS protocol

Add a note to the rte_crypto_sym_op->auth.data fields to state that
for DOCSIS security protocol, these are used to specify the offset and
length of data over which the CRC is calculated.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
4 years agosecurity: support DOCSIS protocol
David Coyle [Fri, 3 Jul 2020 12:39:27 +0000 (13:39 +0100)]
security: support DOCSIS protocol

Add support for DOCSIS protocol to rte_security library. This support
currently comprises the combination of Crypto and CRC operations.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
4 years agocrypto/qat: verify session IOVA
Adam Dybkowski [Mon, 8 Jun 2020 13:15:03 +0000 (15:15 +0200)]
crypto/qat: verify session IOVA

This patch adds the verification of the crypto session IOVA
that should be known (not zero) to proceed with the
session initialisation. In case of unknown IOVA
the error code -EINVAL is returned.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
4 years agocryptodev: verify session mempool element size
Adam Dybkowski [Mon, 8 Jun 2020 13:15:02 +0000 (15:15 +0200)]
cryptodev: verify session mempool element size

This patch adds the verification of the element size of the
mempool provided for the session creation. Returns the error
if the element size is too small to hold the session object.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agotest/crypto: fix asymmetric session mempool creation
Adam Dybkowski [Mon, 8 Jun 2020 13:15:01 +0000 (15:15 +0200)]
test/crypto: fix asymmetric session mempool creation

This patch fixes the element size of the mempool used
for allocating asym crypto sessions and their private data.

Fixes: 2c6dab9cd93d ("test/crypto: add RSA and Mod tests")
Cc: stable@dpdk.org
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agodrivers/crypto: add missing OOP feature flag
Pablo de Lara [Thu, 4 Jun 2020 08:51:12 +0000 (08:51 +0000)]
drivers/crypto: add missing OOP feature flag

ZUC, SNOW3G and KASUMI PMDs support Out-of-place operations,
but their feature flags did not reflect this.

Fixes: 2717246ecd7d ("cryptodev: replace mbuf scatter gather flag")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
4 years agoexamples/ipsec-secgw: add per-core packet statistics
Anoob Joseph [Wed, 13 May 2020 17:45:19 +0000 (23:15 +0530)]
examples/ipsec-secgw: add per-core packet statistics

Adding per core packet handling stats to analyze traffic distribution
when multiple cores are engaged.

Since aggregating the packet stats across cores would affect
performance, keeping the feature disabled using compile time flags.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
4 years agoeal: add multiprocess disable API
David Marchand [Mon, 6 Jul 2020 20:52:34 +0000 (22:52 +0200)]
eal: add multiprocess disable API

The multiprocess feature has been implicitly enabled so far.
Applications might want to explicitly disable like when using the
non-EAL threads registration API.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agomempool/bucket: handle non-EAL lcores
David Marchand [Mon, 6 Jul 2020 20:52:33 +0000 (22:52 +0200)]
mempool/bucket: handle non-EAL lcores

Convert to new lcore API to support non-EAL lcores.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: add lcore iterators
David Marchand [Mon, 6 Jul 2020 20:52:32 +0000 (22:52 +0200)]
eal: add lcore iterators

Add a helper to iterate all lcores.
The iterator callback is read-only wrt the lcores list.

Implement a dump function on top of this for debugging.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: add lcore init callbacks
David Marchand [Mon, 6 Jul 2020 20:52:31 +0000 (22:52 +0200)]
eal: add lcore init callbacks

DPDK components and applications can have their say when a new lcore is
initialized. For this, they can register a callback for initializing and
releasing their private data.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: register non-EAL threads as lcores
David Marchand [Mon, 6 Jul 2020 20:52:30 +0000 (22:52 +0200)]
eal: register non-EAL threads as lcores

DPDK allows calling some part of its API from a non-EAL thread but this
has some limitations.
OVS (and other applications) has its own thread management but still
want to avoid such limitations by hacking RTE_PER_LCORE(_lcore_id) and
faking EAL threads potentially unknown of some DPDK component.

Introduce a new API to register non-EAL thread and associate them to a
free lcore with a new NON_EAL role.
This role denotes lcores that do not run DPDK mainloop and as such
prevents use of rte_eal_wait_lcore() and consorts.

Multiprocess is not supported as the need for cohabitation with this new
feature is unclear at the moment.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: move lcore role code
David Marchand [Mon, 6 Jul 2020 20:52:29 +0000 (22:52 +0200)]
eal: move lcore role code

For consistency sake, move all lcore role code in the dedicated
compilation unit / header.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: introduce thread uninit helper
David Marchand [Mon, 6 Jul 2020 20:52:28 +0000 (22:52 +0200)]
eal: introduce thread uninit helper

This is a preparation step for dynamically unregistering threads.

Since we explicitly allocate a per thread trace buffer in
__rte_thread_init, add an internal helper to free this buffer.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: introduce thread init helper
David Marchand [Mon, 6 Jul 2020 20:52:27 +0000 (22:52 +0200)]
eal: introduce thread init helper

Introduce a helper responsible for initialising the per thread context.
We can then have a unified context for EAL and non-EAL threads and
remove copy/paste'd OS-specific helpers.

Per EAL thread CPU affinity setting is separated from the thread init.
It is to accommodate with Windows EAL where CPU affinity is not set at
the moment.
Besides, having affinity set by the master lcore in FreeBSD and Linux
will make it possible to detect errors rather than panic in the child
thread. But the cleanup when such an event happens is left for later.

A side-effect of this patch is that control threads can now use
recursive locks (rte_gettid() was not called before).

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: fix multiple definition of per lcore thread id
David Marchand [Mon, 6 Jul 2020 20:52:26 +0000 (22:52 +0200)]
eal: fix multiple definition of per lcore thread id

Because of the inline accessor + static declaration in rte_gettid(),
we end up with multiple symbols for RTE_PER_LCORE(_thread_id).
Each compilation unit will pay a cost when accessing this information
for the first time.

$ nm build/app/dpdk-testpmd | grep per_lcore__thread_id
0000000000000054 d per_lcore__thread_id.5037
0000000000000040 d per_lcore__thread_id.5103
0000000000000048 d per_lcore__thread_id.5259
000000000000004c d per_lcore__thread_id.5259
0000000000000044 d per_lcore__thread_id.5933
0000000000000058 d per_lcore__thread_id.6261
0000000000000050 d per_lcore__thread_id.7378
000000000000005c d per_lcore__thread_id.7496
000000000000000c d per_lcore__thread_id.8016
0000000000000010 d per_lcore__thread_id.8431

Make it global as part of the DPDK_21 stable ABI.

Fixes: ef76436c6834 ("eal: get unique thread id")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal: relocate per thread symbols to common
David Marchand [Mon, 6 Jul 2020 20:52:25 +0000 (22:52 +0200)]
eal: relocate per thread symbols to common

We have per lcore thread symbols scattered in OS implementations but
common code relies on them.
Move all of them in common.

RTE_PER_LCORE(_socket_id) and RTE_PER_LCORE(_cpuset) have public
accessors and are not exported through the library map, they can be
made static.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agodoc: announce deprecation of coherent I/O memory barriers
Honnappa Nagarahalli [Mon, 6 Jul 2020 23:43:33 +0000 (18:43 -0500)]
doc: announce deprecation of coherent I/O memory barriers

rte_cio_*mb APIs will be deprecated in 20.11 release.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agoeal/arm: adjust memory barriers for IO on ARMv8
Honnappa Nagarahalli [Mon, 6 Jul 2020 23:43:31 +0000 (18:43 -0500)]
eal/arm: adjust memory barriers for IO on ARMv8

Change the barrier APIs for IO to reflect that Armv8-a is other-multi-copy
atomicity memory model.

Armv8-a memory model has been strengthened to require
other-multi-copy atomicity. This property requires memory accesses
from an observer to become visible to all other observers
simultaneously [3]. This means

a) A write arriving at an endpoint shared between multiple CPUs is
   visible to all CPUs
b) A write that is visible to all CPUs is also visible to all other
   observers in the shareability domain

This allows for using cheaper DMB instructions in the place of DSB
for devices that are visible to all CPUs (i.e. devices that DPDK
caters to).

Please refer to [1], [2] and [3] for more information.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=22ec71615d824f4f11d38d0e55a88d8956b7e45f
[2] https://www.youtube.com/watch?v=i6DayghhA8Q
[3] https://www.cl.cam.ac.uk/~pes20/armv8-mca/

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>
4 years agodoc: clarify period of alias to experimental symbol
Ray Kinsella [Tue, 7 Jul 2020 17:51:01 +0000 (18:51 +0100)]
doc: clarify period of alias to experimental symbol

Clarify retention period for aliases to experimental.

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
4 years agodoc: reword ABI policy for Windows
Ray Kinsella [Tue, 7 Jul 2020 17:51:00 +0000 (18:51 +0100)]
doc: reword ABI policy for Windows

Minor changes to the abi policy for windows.

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
4 years agotest/service: check active state on two lcores
Igor Romanov [Tue, 7 Jul 2020 10:45:25 +0000 (11:45 +0100)]
test/service: check active state on two lcores

The test checks that the service may be active API works
when there are two cores: a non-service lcore and a service one.

The API notes to take care when checking the status of a running
service, but the test setup allows for a safe usage in that case.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
4 years agoservice: fix lcore iteration
Igor Romanov [Tue, 7 Jul 2020 10:45:24 +0000 (11:45 +0100)]
service: fix lcore iteration

The service core list is populated, but not used. Incorrect
lcore states are examined for a service.

Use the populated list to iterate over service cores.

Fixes: e484ccddbe1b ("service: avoid false sharing on core state")
Cc: stable@dpdk.org
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
4 years agorib: add C++ include guard
Stephen Hemminger [Thu, 25 Jun 2020 20:32:08 +0000 (13:32 -0700)]
rib: add C++ include guard

All include files should be safe from C++

Fixes: 5a5793a5ffa2 ("rib: add RIB library")
Fixes: f7e861e21c46 ("rib: support IPv6")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
4 years agorib: check for negative maximum of nodes
Stephen Hemminger [Thu, 25 Jun 2020 20:32:07 +0000 (13:32 -0700)]
rib: check for negative maximum of nodes

Max_nodes in config is signed, but a negative value makes
no sense. Get rid of extra BSD style parens.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
4 years agorib: constify arguments
Stephen Hemminger [Thu, 25 Jun 2020 20:32:06 +0000 (13:32 -0700)]
rib: constify arguments

The getter functions should take a constant pointer
to make it clear that node is not modified.

The rib create functions do not modify their config structure.
Mark the config as constant so that programs can pass
simple constant data.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
4 years agocfgfile: fix stack buffer underflow
Stephen Hemminger [Thu, 2 Jul 2020 03:05:58 +0000 (20:05 -0700)]
cfgfile: fix stack buffer underflow

If cfgfile is give a line with comment character at the start
of the line, it will dereference outside of the buffer.

Detected with address sanitizer:

SUMMARY: AddressSanitizer: stack-buffer-underflow
lib/librte_cfgfile/rte_cfgfile.c:194 in rte_cfgfile_load_with_params
Shadow bytes around the buggy address:
  0x200fff79f6a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x200fff79f6b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x200fff79f6c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x200fff79f6d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x200fff79f6e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=>0x200fff79f6f0: 00 00 00 00 f1 f1 f1[f1]00 00 00 00 00 00 00 00
  0x200fff79f700: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x200fff79f710: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  0x200fff79f720: 04 f2 f2 f2 f3 f3 f3 f3 00 00 00 00 00 00 00 00
  0x200fff79f730: 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1 00 f2
  0x200fff79f740: f2 f2 f3 f3 f3 f3 00 00 00 00 00 00 00 00 00 00
Shadow byte legend (one shadow byte represents 8 application bytes):
  Addressable:           00
  Partially addressable: 01 02 03 04 05 06 07
  Heap left redzone:       fa
  Freed heap region:       fd
  Stack left redzone:      f1
  Stack mid redzone:       f2
  Stack right redzone:     f3
  Stack after return:      f5
  Stack use after scope:   f8
  Global redzone:          f9
  Global init order:       f6
  Poisoned by user:        f7
  Container overflow:      fc
  Array cookie:            ac
  Intra object redzone:    bb
  ASan internal:           fe
  Left alloca redzone:     ca
  Right alloca redzone:    cb
==2189==ABORTING

Fixes: a6a47ac9c2c9 ("cfgfile: rework load function")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agorawdev: export dump function in map file
Bruce Richardson [Mon, 6 Jul 2020 10:31:32 +0000 (11:31 +0100)]
rawdev: export dump function in map file

The rte_rawdev_dump function was missing from the map file,
meaning it was unavailable for use when linking dynamically.

Fixes: c88b3f2558ed ("rawdev: introduce raw device library")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agorawdev: fill NUMA socket ID in info
Bruce Richardson [Mon, 6 Jul 2020 10:31:31 +0000 (11:31 +0100)]
rawdev: fill NUMA socket ID in info

The rawdev info struct has a socket_id field which was not filled in.

We can also omit the checks for the parameter struct being null, since
that is previously checked in the function.

Fixes: c88b3f2558ed ("rawdev: introduce raw device library")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agorawdev: allow getting info for unknown device
Bruce Richardson [Mon, 6 Jul 2020 10:31:30 +0000 (11:31 +0100)]
rawdev: allow getting info for unknown device

To call the rte_rawdev_info_get() function, the user currently has to know
the underlying type of the device in order to pass an appropriate structure
or buffer as the dev_private pointer in the info structure. By allowing a
NULL value for this field, we can skip getting the device-specific info and
just return the generic info - including the device name and driver, which
can be used to determine the device type - to the user.

This ensures that basic info can be get for all rawdevs, without knowing
the type, and even if the info driver API call has not been implemented for
the device.

Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
4 years agotest: fix rpath for drivers with meson
Timothy Redaelli [Wed, 1 Jul 2020 17:16:38 +0000 (19:16 +0200)]
test: fix rpath for drivers with meson

This commit fixes the setting of relative rpath on dpdk-test for
drivers ($libdir/dpdk/pmd-$abiver) to the correct absolute rpath
($prefix$libdir/dpdk/pmd-$abiver).

Fixes: b5dc795a8a55 ("test: build app with meson as dpdk-test")
Cc: stable@dpdk.org
Signed-off-by: Timothy Redaelli <tredaelli@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
4 years agovfio: support VF token
Haiyue Wang [Fri, 3 Jul 2020 14:57:18 +0000 (22:57 +0800)]
vfio: support VF token

The Linux kernel module vfio-pci introduces the VF token to enable
SR-IOV support since 5.7.

The VF token can be set by a vfio-pci based PF driver and must be known
by the vfio-pci based VF driver in order to gain access to the device.

Since the vfio-pci module uses the VF token as internal data to provide
the collaboration between SR-IOV PF and VFs, so DPDK can use the same
VF token for all PF devices by specifying the related EAL option.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Tested-by: Harman Kalra <hkalra@marvell.com>
4 years agoeal: fix uuid header dependencies
Haiyue Wang [Fri, 3 Jul 2020 14:57:17 +0000 (22:57 +0800)]
eal: fix uuid header dependencies

Add the dependent header files explicitly, so that the user just needs
to include the 'rte_uuid.h' header file directly to avoid compile error:
 (1). rte_uuid.h:97:55: error: unknown type name ‘size_t’
 (2). rte_uuid.h:58:2: error: implicit declaration of function ‘memcpy’

Fixes: 6bc67c497a51 ("eal: add uuid API")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agovfio: lower the priority of startup messages
Stephen Hemminger [Fri, 12 Jun 2020 00:10:04 +0000 (17:10 -0700)]
vfio: lower the priority of startup messages

The startup of VFIO is too noisy. Logging is expensive on some
systems, and distracting to the user.

It should not be logging at NOTICE level, reduce it to INFO level.
It really should be DEBUG here but that would hide it by default.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
4 years agovfio: remove unused variable
Yunjian Wang [Sat, 16 May 2020 07:58:39 +0000 (15:58 +0800)]
vfio: remove unused variable

The 'group_status' has never been used and can be removed.

Fixes: 94c0776b1bad ("vfio: support hotplug")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
4 years agoeal: fix lcore accessors for non-EAL threads
Stephen Hemminger [Wed, 8 Apr 2020 20:24:19 +0000 (13:24 -0700)]
eal: fix lcore accessors for non-EAL threads

If rte_lcore_index() is asked to give the index of the
current lcore (argument -1) and is called from a non-EAL thread
then it would invalid result. The result would come
lcore_config[-1].core_index which is some other data in the
per-thread area.

The resolution is to return -1 which is what rte_lcore_index()
returns if handed an invalid lcore.

Same issue existed with rte_lcore_to_cpu_id().

Bugzilla ID: 446
Fixes: 26cc3bbe4dc0 ("eal: add lcore accessors")

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: David Marchand <david.marchand@redhat.com>
4 years agoeal/armv8: force inlining of timer API
Honnappa Nagarahalli [Fri, 26 Jun 2020 20:35:02 +0000 (15:35 -0500)]
eal/armv8: force inlining of timer API

Change the inline functions to use __rte_always_inline to be
consistent with rest of the inline functions.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agoeal/armv8: fix timer frequency calibration with PMU
Honnappa Nagarahalli [Fri, 26 Jun 2020 20:35:01 +0000 (15:35 -0500)]
eal/armv8: fix timer frequency calibration with PMU

get_tsc_freq uses 'nanosleep' system call to calculate the CPU
frequency. However, 'nanosleep' results in the process getting
un-scheduled. The kernel saves and restores the PMU state. This
ensures that the PMU cycles are not counted towards a sleeping
process. When RTE_ARM_EAL_RDTSC_USE_PMU is defined, this results
in incorrect CPU frequency calculation. This logic is replaced
with generic counter based loop.

Bugzilla ID: 450
Fixes: f91bcbb2d9a6 ("eal/armv8: use high-resolution cycle counter")
Cc: stable@dpdk.org
Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
4 years agolog: remove unneeded logtype declaration
Jerin Jacob [Mon, 6 Jul 2020 13:08:11 +0000 (18:38 +0530)]
log: remove unneeded logtype declaration

RTE_LOG_REGISTER macro already declares the log type.
Remove the unneeded log type declaration.

Fixes: 9c99878aa1b1 ("log: introduce logtype register macro")

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Gage Eads <gage.eads@intel.com>