net/octeontx2: support TM debug

Add debug support to TM to dump configured topology
and registers. Also enable debug dump when sq flush fails.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: add TM dynamic topology update

Add dynamic parent and shaper update callbacks that
can be used to change RR Quantum or PIR/CIR rate dynamically
post hierarchy commit. Dynamic parent update callback only
supports updating RR quantum of a given child with respect to
its parent. There is no support yet to change priority or parent
itself.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: add TM stats and shaper profile

Add TM support for stats read and private shaper
profile addition or deletion.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: add TM hierarchy commit

Add TM hierarchy commit callback to support enabling
newly created topology.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: add TM node suspend/resume

Add TM support to suspend and resume nodes post hierarchy
commit.

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/octeontx2: support TM node add/delete

Adds support to Traffic Management callbacks "node_add"
and "node_delete". These callbacks doesn't support
dynamic node addition or deletion post hierarchy commit.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: support dynamic topology update

Modify resource allocation and freeing logic to support
dynamic topology commit while to traffic is flowing.
This patch also modifies SQ flush to timeout based on minimum shaper
rate configured. SQ flush is further split to pre/post
functions to adhere to HW spec of 96XX C0.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: restructure TM helper functions

Restructure traffic manager helper function by splitting to
multiple sets of register configurations like shaping, scheduling
and topology config.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>

net/octeontx2: setup link config based on BP level

Configure NIX_AF_TL3_TL2X_LINKX_CFG using schq at
level based on NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL].

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>

net/octeontx2: support configuring link attributes

Adding support to configure link attributes like speed,
duplex, negotiation.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/octeontx2: enable error and RAS interrupt in configure

Patch adds routines to set/clear nix lf error & ras interrupt enable
registers. These nix lf error interrupts get triggered if there are
any failures during nix lf configuration. This interrupts are enabled
before any hardware configurations initiated on the allocated nix lf.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/octeontx: support Rx/Tx checksum offload

This patch implements rx/tx checksum offload. In case of
wrong checksum received (inner/outer l3/l4) it reports the
corresponding layer which has bad checksum and also corrects
it if hw checksum is enabled on tx side.

Signed-off-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: support flow control

Patch adds ethdev flow control set/get callback ops,
pmd enables modifying flow control attributes like
rx_pause, tx_pause, high & low water mark.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: support set link up/down

Adding support for setting link up/down eth operation.
It is used to enable disable lmac.  Also implemented a
poll function for getting the link status at regular
intervals.

Signed-off-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: support VLAN filter offload

Patch adds support for vlan filter offload support.
MBOX messages for vlan filter on/off and vlan filter
entry add/rm are added to configure PCAM entries to
filter out the vlan traffic on a given port.

Patch also defines rx_offload_flag for vlan filtering.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: support MTU

Adding support for mtu eth operation which configures mtu based
on max pkt len.

Signed-off-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: support fast mbuf free

This patch adds capability to fast release of mbuf
following successful transmission.

Signed-off-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: add framework for Rx/Tx offloads

Adding macro based framework to hook rx/tx burst function
pointers to the appropriate function based on rx/tx offloads.

Signed-off-by: Harman Kalra <hkalra@marvell.com>

net/octeontx: support multi segment

Adding multi segment support to the octeontx PMD. Also
adding the logic to share rx/tx ofloads with the eventdev
code.

Signed-off-by: Harman Kalra <hkalra@marvell.com>

net/octeontx2: offload bad L2/L3/L4 UDP lengths detection

Octeontx2 HW has support for detecting the bad L2/L3/L4 UDP lengths.
Since DPDK does not have specific error flag for this, exposing it
as bad checksum failure in mbuff:ol_flags to leverage this feature.

These errors will be propagated to the ol_flags as follows.

L2 length error ==> (PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD).
Both Outer and Inner L3 length error ==> PKT_RX_IP_CKSUM_BAD.
Outer L4 UDP length/port error ==> PKT_RX_OUTER_L4_CKSUM_BAD.
Inner L4 UDP length/port error ==> PKT_RX_L4_CKSUM_BAD.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/octeontx: fix meson build for disabled drivers

Add a condition to check if octeontx drivers are disabled.
octeontx drivers are built only if dependent drivers i.e.
ethdev, mempool and common/octeontx are enabled.

Bugzilla ID: 387
Fixes: 7f615033d64f ("drivers/net: build Cavium NIC PMDs with meson")
Cc: stable@dpdk.org
Signed-off-by: Amit Gupta <agupta3@marvell.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Harman Kalra <hkalra@marvell.com>

common/octeontx2: upgrade mbox definition to version 5

Sync mail box data structures to version 0x0005 to
that of kernel AF driver.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

net/tap: remove unused assert

The assert checks is not necessary, the gso_ctx is always non-NULL.

Fixes: 050316a88313 ("net/tap: support TSO (TCP Segment Offload)")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

net/sfc: add Xilinx copyright

Xilinx acquired Solarflare in 2019.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: James Fox <jamesfox@xilinx.com>

net/sfc: check actual all multicast unknown unicast filters

Check that unknown unicast and unknown multicast filters are
applied and return an error if they are not applied. The error
is used in promiscuous and all multicast mode enable and disable
callbacks.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

net/sfc/base: add API to get currently operating filters

Unknown unicast filter creation may fail because of insufficient
permissions on VF. This failure is handled internally in libefx MAC
reconfiguration without any way for a user to know if it happened.
Making the MAC reconfiguration forward error code of filter
reconfiguration would be too destructive to the existing code
that may rely on the function never returning that error.

Add an API for getting the status of current unknown unicast and
all multicast filters since user must know that requested
filters are actually applied.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

net/sfc/base: refactor multicast filters reconfiguration

Refactor the multicast filter reconfiguration stage of the reconfigure
function to make it clearer and allow for more convenient further
changes.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

net/sfc/base: refactor unicast filters reconfiguration

Refactor the unicast filter reconfiguration stage of the reconfigure
function to make it clearer and allow for more convenient further
changes.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

net/sfc/base: refactor filters mark in reconfigure

Refactor the filters mark stage of the reconfigure function
to make it clearer and allow for more convenient further changes.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

net/sfc/base: refactor filters cleanup in reconfigure

Refactor the filters cleanup stage of the reconfigure function
to make it clearer and allow for more convenient further changes.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

net/nfb: check array size before access

The driver wrongly assumed the presence of at least one rxmac in every
firmware and accessed to non-existing unit

Signed-off-by: Martin Spinler <spinler@cesnet.cz>
Acked-by: Jakub Neruda <neruda@netcope.com>

net/vmxnet3: support MTU set

(Picked up from @Charles Myers patch
https://patchwork.dpdk.org/patch/57771/)

When the mtu_set() function is not implemented, rte_eth_dev_set_mtu()
fails with -ENOTSUP and mtu is not stored in the mtu field in the
rte_eth_dev_data.  This causes the mtu in Vmxnet3_MiscConf which is
shared with hypervisor to always be set to 1500.

This may cause issues receiving jumbo frames on Enhanced Data Path
N-VDS.

Signed-off-by: Eduard Serra <eserra@vmware.com>
Acked-by: Yong Wang <yongwang@vmware.com>

net/i40e: enable VF to program MAC address

Due to the restriction of the flag I40E_FLAG_VF_MAC_BY_PF,
VF cannot program the MAC address.
In order to solve this inflexibility, the use of I40E_FLAG_VF_MAC_BY_PF
has been deleted in the code implementation to ensure that
VF can flexibly program the MAC address.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

net/ice/base: check memory pointer before copying

The ice_memdup doesn't check the new allocated memory pointer, it calls
the rte_memcpy directly. It should check it.

Fixes: 5f0978e96220 ("net/ice/base: add OS specific implementation")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>

doc: update ixgbe features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

doc: update iavf features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

doc: update ice features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

doc: update i40e features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

net/ice/base: enable RSS for PFCP/L2TP/ESP/AH

Add support for PFCP, L2TP, ESP and AH RSS enabling.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: fix binary order for GTPU filter

Take network order for gtpu fdir filter.

Fixes: b5c274f4e2ad ("net/ice/base: support FDIR for GTPU QFI field")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: change function to static

Change ice_set_fd_desc_val to static, since it only be used
internally.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: support PFCP and NAT-T of switch

This patch add support switch rule for PFCP and NAT-T
packet base on profile rule, PFCP and NAT-T packet will not
be matched on any packet fields, but instead matches
the profile that the packet hits in the switch block.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: move some macros

Move some macro from ice_switch.c to ice_switch.h. Currently this
is only required by kernel driver, DPDK just to sync the code.

Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: group case statements

ICE_BLK_FD and ICE_BLK_RSS are executing the same code so group the case
statements together instead of duplicating code for each block.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: handle critical FW error

A race condition between FW and SW can occur between admin queue setup
and the first command sent. A link event may occur and FW attempts to
notify a non-existent queue. FW will set the critical error bit and
disable the queue. When this happens retry queue setup.

Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: improve GTPU extend header handle

A GTPU header can stack with a extend header or not, while
current implementation does not allow HDR bit sets like below:

ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_EH
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_UP
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_DWN

Which is not convenient for upper layer flow parser to
generate correct HDR bit.

but it could be if we have below assumptions:

ICE_FLOW_SEG_HDR_GTPU_DWN -- for GTPU with extend header down link
ICE_FLOW_SEG_HDR_GTPU_UP  -- for GTPU with extend header up link
ICE_FLOW_SEG_HDR_GTPU_EH  -- for GTPU with any extend header
ICE_FLOW_SEG_HDR_GTPU_IP  -- for any GTPU header, but when it combined
                             with any above it downgrade to a dummy one.

And handle from specific case to generic case will hit all the cases
as expected.

if else (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_IP {
...
}

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: allow profile based switch rules

Switch rules usually match packet fields to take actions. Add capability
to add a switch rule that does not match any packet fields, but instead
matches the profile that the packet hits in the switch block.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: add default DCB parameters

Added new value for cmd_flag:
Persistently set the DCB configuration mode for the current port.
Added new value for valid_flags: represent bit#1 of command flag

Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: allow adding MAC VLAN filter on port

Add new API function to allow user to choose port
on which mac vlan rule going to be added.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: refactor flow control function

We will remove the logic of configuring the flow control out of the
ice_set_fc(...) function. The goal is to enable any driver to combine
all PHY related flow logic, without repeatedly call ice_aq_set_phy_cfg.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: add ethertype check for dummy packet

In order to support switch rule for ethertype filter
with ipv6 ethertype id, it has to check ethertype
then find a proper dummy packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: ignore EMODE when setting PHY config

When setting the PHY cfg (CQ cmd 0x0601), if the firmware responds
with an EMODE error, software will ignore the error as it simply
means that manageability (ex: BMC) is in control of the link and that
the new setting may not be applied.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: reduce scope of variables

The scope of these variables can be reduced, so do so. This also
eliminates the need for the extra wrapping/braces.

Also, compact a line since it can fit within 80 columns

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: add more macros for FDID priority

Add macro for FDID  priority 0 and 3, also adjust the
fdid_prio position to sync with kernel driver.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/mlx5: fix imissed counter overflow

The Hw counters is defined as 32bit unsigned value and read from
the sysfs. Firstly read the base value while application start,
then fetch the new value while do query and minus the base value.
If the new value is less than base value, will result in a
negative value and convert to the big value as unsigned 64bit.

PMD add xstats field to store the last successfully read counter,
use it if failed to read hw counter from sysfs.
PMD also record the last output value to handle the wrap around case,
if overflow happened, increase the wrap count by 1 and save into the
higher 32bit, and update the new value into lower 32bit, finally
return the 64bit counter value.

Fixes: ce9494d76c47 ("net/mlx5: report imissed statistics")
Cc: stable@dpdk.org
Signed-off-by: Jiawei Wang <jiaweiw@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

net/mlx5: introduce buffer size parameter for hairpin

When creating a hairpin queue, the total data size and the maximal
number of packets are interrelated. The differ is the stride size.
Larger buffer size means big packet like jumbo could be supported,
but in the meanwhile, it will introduce more cache misses and have a
side effect on the performance.
Now a new device parameter "hp_buf_log_sz" is introduced for
applications to set the total data buffer size (the logarithm value).
Then the maximal number of packets will also be calculated
automatically by this value.
Applications could also change this value to a larger one in order
to support larger packets in hairpin case. A smaller value will be
beneficial for memory consumption.
If it is not set, the default value will be used.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

net/thunderx: use dynamic log type

The PMD static logtype is original DPDK legacy and should not be used.

Fixes: 43362c6a7647 ("net/thunderx: support RSS and RETA query and update")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

net/dpaa: use dynamic log type

The static PMD logtype should not be used by drivers.
Instead, use existing log macros in this driver.

Also use standard rte_ether routine to format ether address.

Fixes: 37f9b54bd3cf ("net/dpaa: support Tx and Rx queue setup")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

net/bnxt: do not use PMD log type

Accidental use of PMD logtype rather than per-driver logtype.

Fixes: 14255b351537 ("net/bnxt: fix queue start/stop operations")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>

net/pfe: do not use PMD log type

The PMD logtype is a legacy from original DPDK logging.
All drivers must use their own dynamic log type.

Fixes: b1bc1afa4a0e ("net/pfe: support dynamic logging")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

net/tap: do not use PMD log type

The PMD logtype is legacy and drivers should use their own logtype.

Fixes: 050316a88313 ("net/tap: support TSO (TCP Segment Offload)")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

net/virtio: do not use PMD log type

Virtio driver has its own logtype and should not use legacy
PMD logtype.

Fixes: 32c118fd0059 ("virtio: free mbuf's with threshold")
Fixes: e5f456a98d3c ("net/virtio: support in-order Rx and Tx")
Fixes: 1c8489da561b ("net/virtio-user: fix multi-process support")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

net/mvneta: do not use PMD log type

The PMD logtype is legacy and should not be used.

Fixes: 3378383dceab ("net/mvneta: support statistics reset")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

examples/vmdq: fix output of pools/queues

To match the pools/queues configuration, the pools/queues output
should start from VMDQ base queue. This patch fixed the issue.

Fixes: 6bb97df521aa ("examples/vmdq: new app")
Cc: stable@dpdk.org
Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Tested-by: Yingya Han <yingyax.han@intel.com>

net/ice: support flow ops thread safe

For DCF, flow ops may be executed in different threads,
so an thread safe option for generic flow APIs is needed.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice: support flow redirect

Add a new ops "redirect" to flow engine, it's used to implement the
function that redirect a flow's destination. Currently only support
VSI-Redirect which will be used by DCF for handling VF-VSI mapping
table change.
A new API "ice_flow_redirect" is exposed, current usage is: it could
be called when there's VF-VSI mapping table change caused by VF reset.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

common/mlx5: fix RSS key copy to TIR context

In function mlx5_devx_cmd_create_tir(), the 40 bytes of RSS key are
copied in 10 iterations, 4 bytes each time using the MLX5_SET macro.
As result the RSS key is copied into TIR context in swapped byte order.
This patch fixes the issue, using memcpy() to copy the RSS key as is.
The struct member mlx5_devx_tir_attr.rx_hash_toeplitz_key is updated
to byte array type.

Fixes: c3aea272eed8 ("net/mlx5: create advanced Rx object via DevX")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: check device status before creating flow

By default, flows are categorized into two types of a mlx5 device.
  1. The PMD driver will create some default flows to enable the
     traffic and give some default behaviors on the packets. And
     this is transparent to the upper layer application.
  2. Other flows will be created in the application based on its
     needs.
When in the old cached mode for application flows, it is allowed
to created the flow before the device is started. And when
starting the device, all the flows will be applied to the hardware
and take effect. The cached flows will be also applied in the same
time.
In non-cached mode, all the flows will never be cached when stopping
a device. So it makes no sense to insert any flow into the device
before it is started. Default flows owned by PMD driver are not
affected in this case.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: separate the flow handle resource

Only the members of flow handle structure will be used when trying
to destroy a flow. Other members of mlx5 device flow resource will
only be used for flow creating, and they could be reused for different
flows.
So only the device flow handle structure needs to be saved for further
usage. This could be separated from the whole mlx5 device flow and
stored with a list for each rte flow.
Other members will be pre-allocated with an array, and an index will
be used to help to apply each device flow to the hardware.
The flow handle sizes of Verbs and DV mode will be different, and
some calculation could be done before allocating a verbs handle.
Then the total memory consumption will less for Verbs when there is
no inbox driver being used.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: reorganize flow structures

Common structures used for mlx5 flow creating and destroying are
reorganized in order to separating the parts only for destroying
from all the items.
The "mlx5_flow" will contain the common items of DV and Verbs flow,
specific items for DV / Verbs only. These items will only be used
when creating a flow.
At the end of "mlx5_flow", a nested structure "mlx5_flow_handle"
located. It contains all the items used both for creating and
destroying a flow. Also, it consists of common items, and DV / Verbs
specific items.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: change operations for non-cached flows

When stopping a mlx5 device, all the flows inserted will be flushed
since they are with non-cached mode. And no more action will be done
for these flows in the device closing stage.
If the device restarts after stopped, no flow with non-cached mode
will be re-inserted.
The flush operation through rte interface will remain the same, and
all the flows will be flushed actively.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: fix zero value validation for metadata

MARK and META items are interrelated with datapath -
they might move from/to the applications in mbuf.

zero value for these items has the special meaning -
it means "no metadata are provided", not zero values
are treated by applications and PMD as valid ones.

Moreover in the flow engine domain the value zero is
acceptable to match and set, and we should allow to
specify zero values as rte_flow parameters for the
META and MARK items and actions. In the same time
zero mask has no meaning and should be rejected
on validation stage.

Fixes: fcc8d2f716fd ("net/mlx5: extend flow metadata support")
Fixes: e554b672aa05 ("net/mlx5: support flow tag")
Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
Cc: stable@dpdk.org
Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

net/mlx5: fix call to modify action without init item

The item is being set according to the attribute value, whether it is
udp/tcp or ipv4/6.
Also, there are two condition calls.

If the attribute is neither udp/tcp or ipv4/6 the item is not
initialized at all, but the call to the flow_dv_convert_modify_action is
still being done.
Also, even if the attribute is tcp/udp or ipv4/6, we still have two
conditions.

This patch changes the conditions, so the item will always be set.
By doing this, there is also a save in the number of condition calls.

Fixes: 4bb14c83df95 ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org
Signed-off-by: Asaf Penso <asafp@mellanox.com>
Reviewed-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: update VLAN and encap actions validation

Flow rule in NIC table on VF representor should not contain VLAN pop
or push actions, and encap or decap actions. Using these actions in
NIC table on VF representor is not a valid use case.
This patch updates the various validation functions to reject such
rules.

Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Jack Min <jackmin@mellanox.com>

net/mlx5: prefetch CQEs for a faster decompression

Invalidation of consumed CQEs incurs a performance penalty
due to many cache misses caused by a non-sequential CQEs access.
Prefetch CQEs to get a better data locality and speed up the
decompression of CQEs. Prefetching reduces CPI rate of the
rxq_cq_decompress_v() function from 1 to 0.85 in my environment,
resulting in 2% boost in mpps for 64B frames single core test.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: fix metadata for compressed Rx CQEs

If packets with the same metadata are received with compressed CQE
the metadata value is not copied from the title packet in vectorized
rx_burst routines, it causes wrong metadata values seeing by
applications.

Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: create relaxed ordering memory regions

In the current state, when preforming read/write
transactions we must wait for a completion in order
to run the next transaction, and all transactions are
performed by order.

Relaxed Ordering is a PCI optimization which by enabling it
we allow the system to perform read/writes in a different
order without having to wait for completion and improve
the performance in that matter.

This commit introduces the creation of relaxed ordering
memory regions in mlx5.
As relaxed ordering is an optimization, drivers that
do not support it can simply ignore it and therefore
it is enabled by default.

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

doc: update mlx5 firmware configuration guidelines

This patch updates the MLX5 PMD documentations, adding Flex parser
settings and correcting minimal versions numbers.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/mlx5: fix validation of VXLAN/VXLAN-GPE specs

Trying to create zero spec for vni wasn't allowed, to
avoid matching all packets from previous layer (udp).
This behavior is incorrect, since VXLAN is being identified
through the outer UDP destination port.

Currently, if the user didn't specify outer UDP destination
port the PMD will automatically match only on  outer
UDP port of 4798, and if the user want to match on some none
standard port he need to specify it explicitly in the rule.

This removes the limitation of vni spec to be able to match any
vni.

Fixes: 23c1d42c7138 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>

net/ixgbe: fix e-tag definition

e_tag_ether_type has been wrongly defined as bool type which introduces
a bug for etag/etag_strip for x550 NIC. Fixes it by defining it as
uint16_t.

Fixes: ad43b7bce95b ("net/ixgbe: avoid multiple definitions of bool")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>

net/ixgbe: fix link status inconsistencies

Setting LINK UP or LINK DOWN is divided into two parts, with
the main task done in a separate thread, which can take up
to 9 seconds. If cancel the thread in execution, may cause state
inconsistencies. Therefore, must wait for the previous setting
to exit normally before setting the new state.

Note: before using threads, use alarm to handle main tasks.
When canceling alarm, the execution of alarm will not be interrupted.

Fixes: 819d0d1d57f1 ("net/ixgbe: fix blocking system events")
Cc: stable@dpdk.org
Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Tested-by: Yu Jiang <yux.jiang@intel.com>

net/ice: get VF hardware index in DCF

The DCF (Device Config Function) needs the hardware index of the VFs to
control the flow setting. And also if the VF resets, the index may be
changed, so it should handle this in VF reset event.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/ice: handle PF initialization by DCF

The DCF (Device Config Function) works at the user PF level, it can't
access the real PF hardware directly. So it will pass through the PF's
AdminQ command by the DCF's mailbox.

And the DCF is mainly used to control the flow setting of other VFs, so
it only needs to initialize some core functions related to the flow.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/ice: export DDP definition symbols

A new DCF PMD will be introduced, which runs on Intel VF hardware, and
it is a pure software design to control the advance functionality (such
as switch, ACL) for rest of the VFs.

The DCF (Device Config Function) feature shares the core functions of
the ICE PMD, like it needs to export the DDP definition symbols for the
new DCF PMD use.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/ice: handle AdminQ command by DCF

The DCF (Device Config Function) splits the AdminQ command into two
parts: one is the descriptor of AdminQ command, the other is the buffer
of AdminQ command (the descriptor has BUF flag set). When both of them
are received by the PF, the PF will handle them as one command.

And also, the filled descriptor and buffer of the response will be sent
back to DCF one by one through the virtchnl from PF.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/ice: acquire and disable DCF capability

Since the DCF (Device Config Function) controls the flow setting of
other VFs by the mailbox with PF, for security, it needs to acquire
the DCF capability from PF when starts, and disable it when exits.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/ice: add DCF hardware initialization

Introduce the DCF (Device Config Function) feature in the ice PMD, it
works as a standalone PMD which doesn't handle the packet Rx/Tx related
things. Its hardware entity is the VF.

Add the basic DCF hardware initialization, this is specified by devarg
'cap=dcf'.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/iavf: stop PCI probe in DCF mode

A new DCF PMD will be introduced, which runs on Intel VF hardware, and
it is a pure software design to control the advance functionality (such
as switch, ACL) for rest of the VFs.

So if the DCF (Device Config Function) mode is specified by the devarg
'cap=dcf', then it will stop the PCI probe in the iavf PMD.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

net/iavf: unify Rx packet type table

This patch unified the Rx ptype table.

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>

common/iavf: support VSI mapping table

Add an opcode for getting VSI mapping table.
Add an virtchnl event code for VF reset done.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>

common/iavf: support DCF capability negotiation

Add DCF capability flag for VF.
Add an opcode for disabling DCF capability.
Add an virtchnl event code for AVF resetting completion.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>

common/iavf: add two opcodes to send AdminQ command

Add two virtchnl opcodes to send the AdminQ command, one is used to
send the descriptor, the other is used to send the buffer payload if
the AdminQ command has BUF flag set.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>

common/iavf: update copyright date

Update copyright date to 2020.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>

net/ice/base: add PPPoE IPv6 dummy packet

In order to support switch rule for PPPOE packet
with ipv6 payload, it has to use a new dummy packet
with ipv6 format.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: add reference count to tunnels

Add a lock for protecting the tunnel table while adding, removing
and searching tunnels.

Add reference counting to tunnels so that multiple instances
of the same tunnel port can be created. Only physically
destroy the tunnel when all instances of that tunnel have been
destroyed.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: add check to IPv4 next protocol

In order to support switch rule for NVGRE packets,
it need to check ipv4 next protocol number, if it is 0x2F,
which means next payload is NVGRE, we need to use NVGRE
format dummy packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: cleanup flow director functions

Cleanup some things found while doing code review:

- Remove unnecessary initializations, parenthesis, and braces
- Fix a couple of function headers

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: fix MAC write command

The manage MAC write command was implemented in an overly complex way
that actually didn't work, as it wasn't symmetric to the manage MAC
read command, and was feeding bytes out of order to the firmware. Fix
the implementation by just using a simple array to represent the MAC
address when it is being written via firmware command.

Fixes: a90fae1d0755 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: check DDP package compatibility

Check the OS and NVM package versions before downloading the package.
If the OS package version is not compatible with NVM then return an
appropriate error.

Split the 32-byte segment name into a 28-byte segment name and
a 4-byte Track-ID. Older packages will still work with this change
because no package has a name that will take up more than 28 bytes;
in this case the Track-ID will be 0.

Note that the driver will store the segment name as 32-bytes in the
ice_hw structure, in order to normalize the length of the various
package name strings that it uses.

Also add section ID and structure for the segment metadata section.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>

net/ice/base: discover and store size of available flash

When reading from the NVM using a flat address, it is useful to know the
upper bound on the size of the flash contents. This value is not stored
within the NVM.

We can determine the size by performing a bisection between upper and
lower bounds. It is known that the size cannot exceed 16 MB (offset of
0xFFFFFF).

Use a while loop to bisect the upper and lower bounds by reading one
byte at a time. On a failed read, lower the maximum bound. On
a successful read, increase the lower bound.

Save this as the flash_size in the ice_nvm_info structure that contains
data related to the NVM.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>