Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: force phy power up/down
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
igb: force phy power up/down
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: update VMDq/DCB support
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
igb: update VMDq/DCB support
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: update VMDq/DCB support
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: set VMDq pool when adding mac address
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: add PF support
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
igb: add PF support
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: add PF support
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: support dual vlan
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
igb: fix max RX packet size and support dual VLAN
When in 'normal' mode, hardware is designed to receive up to 1522 bytes.
When in 'jumbo' mode, RLPML register must be updated so that hardware accepts
a 802.1q vlan header. If dual vlan is enabled, then a second vlan header is
expected, so update RLPML register according to dual vlan support.
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: retrieve RX available descriptors
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (02:00 +0200)]
igb: retrieve RX available descriptors
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (02:00 +0200)]
e1000: retrieve RX available descriptors
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: retrieve RX available descriptors
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: RSS RETA configuration
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
igb: RSS RETA configuration
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: RSS RETA configuration
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: allocate structures on numa_node
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: store numa_node per device
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: allow unsupported SFP
Add RTE_LIBRTE_IXGBE_ALLOW_UNSUPPORTED_SFP build option
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: force inlining
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ixgbe: log tx code path
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
e1000: move workaround for wthresh on 82576 at wrong place
The workaround is moved in e1000em code but 82576 is an igb NIC.
It breaks the fix of the commit
7e9e49feea.
Signed-off-by: Intel <intel.com>
Stephen Hemminger [Thu, 30 May 2013 17:12:35 +0000 (10:12 -0700)]
igb: workaround errata with wthresh on 82576
The 82576 has known issues which require the write threshold to be set to 1.
See:
http://download.intel.com/design/network/specupdt/82576_SPECUPDATE.pdf
If not then single packets will hang in transmit ring until more arrive.
Simple tests like ping will fail.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ethdev: more doxygen comments about fdir
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
pci: store numa_node per device
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
pci: configure SR-IOV with max_vfs
Signed-off-by: Intel
Julien Courtat [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
pci: fix probing blacklisted device with RTE_PCI_DRV_MULTIPLE flag
When blacklisting network adapters that share a PCI bus address with multiple
ports such as Mellanox ConnectX-3 (librte_pmd_mlx4), RTE applications
enter infinite loops while probing PCI devices.
This commit removes this probe on subsequent instances for blacklisted devices
that have RTE_PCI_DRV_MULTIPLE set.
Signed-off-by: Julien Courtat <julien.courtat@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
pci: don't unbind resources on exit
unbind operations must be done before starting eal application
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
pci: rework interrupt handling
Signed-off-by: Intel <intel.com>
Stephen Hemminger [Thu, 30 May 2013 17:12:39 +0000 (19:12 +0200)]
pci: support multiple PCI regions per device
Need to change PCI code to support multiple I/O regions on a single device.
Some devices like VMXNET3 have multiple PCI memory regions, and some
have none.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
mbuf: force inlining
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
mem: force inlining
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
mem: remove RLIMIT_NOFILE update
Memory init won't try to increase its RLIMIT_NOFILE limit, this must be done
prior to starting it.
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
mem: find most little element from heap
Allocations now return the most little element from heap matching size
constraint instead of the first one available.
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
ring: optimisations
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
timer: add a rte_pause in a tight loop
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
timer: prefer TSC to HPET
Signed-off-by: Intel
Stephen Hemminger [Thu, 30 May 2013 17:12:36 +0000 (17:12 +0000)]
timer: optimize for empty case
In many application there are no timers queued, and the call to
rte_timer_managecan be optimized in that case avoid reading HPET and
lock overhead.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
Damien Millescamps [Fri, 21 Sep 2012 11:36:40 +0000 (11:36 +0000)]
timer: option --vmware-tsc-map for VMware guest
The VMWare TSC mapping uses a hook to RDPMC to read the physical TSC
in the case of VMware ESXi.
Signed-off-by: Damien Millescamps <damien.millescamps@6wind.com>
Acked-by: Jean-Mickael Guerin <jmg@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Introduce new option --vmware-tsc-map, ignored if
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT is not set.
Default is CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y.
if CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT is set:
rte_rdtsc() selects at runtime between Vmware mapping of
TSC or native TSC
else
rte_rdtsc() always uses native rdtsc.
When running DPDK on VMware guest, enable --vmware-tsc-map to
read the physical TSC.
Caution: ESXi should pass monitor_control.pseudo_perfctr = TRUE
othewise it results in general protection fault.
Signed-off-by: Jean-Mickael Guerin <jean-mickael.guerin@6wind.com>
Acked-by: Vincent Jardin <vincent.jardin@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
hash: jhash optimisation
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
hash: fix for multi-process apps
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
sched: initial import
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
meter: initial import
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
power: initial import
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
lpm: add IPv6 support
Signed-off-by: Intel
Stephen Hemminger [Thu, 30 May 2013 17:12:37 +0000 (17:12 +0000)]
log: optimize log/panic with attribute cold
Both logging and calls to panic are never in the critical path.
Use the GCC attribute cold to mark these functions as cold,
which generates more optimised code.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
log: get full path as syslog id
It partially reverts commit
04210699eee.
Signed-off-by: Intel <intel.com>
Stephen Hemminger [Thu, 30 May 2013 17:12:41 +0000 (10:12 -0700)]
log: add ability to override syslog parameters
By default, DPDK based applications would only allow logging
to syslog as "rte", DAEMON; but for any production application more
control is desired to allow using actual application name and
overriding the facility.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
eal: cosmetic changes
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
eal: add application usage hook
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
eal: memory barriers use intrinsic functions
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
eal: use intrinsic functions from compiler
RTE_FORCE_INTRINSICS makes it possible to force use of intrinsic
functions (defaults to n).
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
lib: add rte_hexdump and remove duplicated code
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
lib: fix various compilation warnings
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
lib: 32/64-bit cleanups
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
config: change max lcore to 64
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
app/testpmd: cosmetic changes
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
doc: fix file format (dos to unix)
Signed-off-by: Intel
Intel [Mon, 3 Jun 2013 00:00:00 +0000 (00:00 +0000)]
file mode changes
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
set version to 1.3.1
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
update copyright date to 2013
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
examples: various changes
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
app: various changes
Signed-off-by: Intel
Zijie Pan [Wed, 5 Dec 2012 06:13:34 +0000 (14:13 +0800)]
app: fix unused values
Fix warnings of type "Value stored to 'xxx' is never read".
Signed-off-by: Zijie Pan <zijie.pan@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Ivan Boule [Thu, 22 Sep 2011 16:01:35 +0000 (18:01 +0200)]
app: fix volatile read for GCC >= 4.6
When a memory address must be read, for instance a [mapped] PCI register,
the read value is assigned to a local variable that is not used after,
as for instance:
x = *((uint8_t *) mem_addr);
Such instructions do not compile with gcc 4.6.
The fix consists in adding the "volatile" attribute to the accessed data type
and to not assign the read value:
*((volatile uint8_t *) mem_addr);
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Ivan Boule [Tue, 26 Apr 2011 14:45:43 +0000 (16:45 +0200)]
app/testpmd: fix compliance with __rte_mbuf_sanity_check()
Build mbuf and lists of mbufs in a way compliant with the checks performed
by the function __rte_mbuf_sanity_check() when CONFIG_RTE_LIBRTE_MBUF_DEBUG=y
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Damien Millescamps [Tue, 15 May 2012 14:27:04 +0000 (16:27 +0200)]
app/testpmd: fix config crash
A chained topology must always have an increment of 1.
Here, it was 2 if ports number is even.
Signed-off-by: Damien Millescamps <damien.millescamps@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
lib: minor changes
Signed-off-by: Intel
Adrien Mazarguil [Wed, 19 Dec 2012 16:05:54 +0000 (17:05 +0100)]
lib: fix non-C99 macros definitions in exported headers
The original definitions prevent external programs/libraries from compiling
without warnings when using these headers and -std=gnu99 (relaxed C99 mode).
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Damien Millescamps <damien.millescamps@6wind.com>
Zijie Pan [Thu, 6 Dec 2012 07:36:51 +0000 (15:36 +0800)]
lib: fix uninitialized value
Fix warning "The left expression of the compound assignment
is an uninitialized value".
Signed-off-by: Zijie Pan <zijie.pan@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Zijie Pan [Fri, 1 Feb 2013 11:43:29 +0000 (12:43 +0100)]
lib: fix uninitialized variables
Fix compilation errors caused by uninitialized variables.
Signed-off-by: Krzysztof Witek <krzysztof.witek@6wind.com>
Signed-off-by: Zijie Pan <zijie.pan@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Zijie Pan [Tue, 4 Dec 2012 09:17:43 +0000 (17:17 +0800)]
lib: fix unused values
Fix warnings of type "Value stored to 'xxx' is never read".
Signed-off-by: Zijie Pan <zijie.pan@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
kni: various changes
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
kni: disable IGB_DCA
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
kni: fix disabling
Signed-off-by: Intel
Ivan Boule [Wed, 23 Jan 2013 13:22:14 +0000 (14:22 +0100)]
kni: fix build with kernel < 2.6.34
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Nicolas Dichtel [Wed, 20 Feb 2013 08:56:56 +0000 (09:56 +0100)]
igb_uio: fix build with kernel >= 3.8
__devinit has been removed in linux commit
54b956b903
("Remove __dev* markings from init.h", 3.8-rc4).
Signed-off-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
igb: fix RX for Springville (i210)
Signed-off-by: Intel
Adrien Mazarguil [Wed, 19 Dec 2012 16:55:37 +0000 (17:55 +0100)]
pci: allow drivers to be bound several times to the same PCI device
Drivers with the flag RTE_PCI_DRV_MULTIPLE enabled will be bound several
times to the same device until they return an error.
These drivers must internally keep track of each device state in order for
this to work reliably.
This flag currently required for Ethernet adapters with several physical
ports but a single address on the PCI bus.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Damien Millescamps <damien.millescamps@6wind.com>
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
mem: 64-bit mempool sizes
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
mem: error if requesting more segments than MAX_MEMSEG
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
config: increase MAX_MEMSEG from 32 to 256
Signed-off-by: Intel
Thomas Monjalon [Thu, 2 Aug 2012 15:17:37 +0000 (17:17 +0200)]
eal: fix access to huge page with high address
The returned value of lseek is a virtual address
which can be different from the offset.
Indeed, if the return address has a 64-bit canonical form,
the 16 higher bits are all 1 if bit 47 is 1.
So the check was wrong. It is better to test against an error value.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Damien Millescamps <damien.millescamps@6wind.com>
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
eal: add bsf32
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
pmac: integration without lib
This library could be used for pattern matching and ACL.
Code of librte_pmac is not released as Open Source.
Signed-off-by: Intel
Intel [Tue, 12 Mar 2013 11:03:00 +0000 (12:03 +0100)]
cmdline: fix for long input
Signed-off-by: Intel
Didier Pallard [Wed, 9 Jan 2013 16:15:12 +0000 (17:15 +0100)]
mk: fix verbose display of install command
Correctly display executed install command in
rte.install-post.mk install rules
Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Zijie Pan [Fri, 1 Feb 2013 11:42:18 +0000 (12:42 +0100)]
mk: allow corei7-avx flag with gcc 4.7
In rte.toolchain-compat.mk, ensure MACHINE_CFLAGS is initialized when
using GCC 4.7. Update the GCC 4.6 test to also include GCC 4.7.
Signed-off-by: Krzysztof Witek <krzysztof.witek@6wind.com>
Signed-off-by: Zijie Pan <zijie.pan@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Thierry Herbelot [Mon, 2 Apr 2012 12:27:43 +0000 (14:27 +0200)]
mk: fix typo in LDFLAGS for 32-bit
Enable compilation for 32-bit architecture.
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Samuel Gauthier [Thu, 20 Sep 2012 08:07:44 +0000 (10:07 +0200)]
mk: use $CC to detect toolchain version
Using gcc is wrong, we should use the cross gcc to detect the
version of gcc.
Signed-off-by: Samuel Gauthier <samuel.gauthier@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
set version to 1.3.0
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/vmdq_dcb: update
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/multi_process: update
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/load_balancer: update
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/link_status_interrupt: update
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/l3fwd: update
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/l3fwd-vf: update
Signed-off-by: Intel
Intel [Wed, 19 Dec 2012 23:00:00 +0000 (00:00 +0100)]
examples/l2fwd: update
Signed-off-by: Intel