David Wilder [Wed, 5 Jun 2019 22:57:45 +0000 (15:57 -0700)]
config: increase maximum lcores for ppc
Setting RTE_MAX_LCORE to reflect the largest available configuration.
Signed-off-by: David Wilder <dwilder@us.ibm.com>
Acked-by: David Christensen <drc@linux.vnet.ibm.com>
David Wilder [Wed, 5 Jun 2019 22:55:53 +0000 (15:55 -0700)]
config: update for ppc build with meson
Adding defines for missing RTE_MACHINE_CPUFLAGs.
Signed-off-by: David Wilder <dwilder@us.ibm.com>
Acked-by: David Christensen <drc@linux.vnet.ibm.com>
Li Qiang [Tue, 9 Apr 2019 14:56:21 +0000 (07:56 -0700)]
mempool/dpaa: fix leak in pool creation failure
When 'rte_zmalloc' failed dpaa_mbuf_create_pool() forgets freeing
'bp' thus leading resource leak. This patch avoids this.
Coverity issue: 337679
Signed-off-by: Li Qiang <liq3ea@163.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Pavan Nikhilesh [Thu, 4 Jul 2019 08:59:35 +0000 (14:29 +0530)]
event/octeontx2: add libatomic dependency for 32-bit clang
When compiling with clang on 32-bit platforms, we are missing
copies of 64-bit atomic functions. We can solve this by linking
against libatomic for the drivers and libs which need those
atomic ops.
Fixes:
f0b9982cb3a7 ("event/octeontx2: add TIM bucket operations")
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Amit Gupta [Mon, 1 Jul 2019 18:03:46 +0000 (23:33 +0530)]
drivers/octeontx2: fix icc build for i686
Fix the following ICC specific compilation issue with i686 build.
dpdk/drivers/common/octeontx2/otx2_mbox.c(47): error #2259:
non-pointer conversion from "unsigned long long" to "struct mbox_hdr *"
may lose significant bits
(struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->tx_start);
Fixes:
732377a6792e ("mempool/octeontx2: add build infra and device probe")
Fixes:
371d3212cbed ("common/octeontx2: add build infrastructure and HW definition")
Signed-off-by: Amit Gupta <agupta3@marvell.com>
Ferruh Yigit [Tue, 16 Apr 2019 15:51:26 +0000 (16:51 +0100)]
net: forbid VLAN insert in shared mbuf
The vlan_insert() is buggy when it tries to handle the shared mbufs,
instead don't support inserting VLAN tag into shared mbufs and return
an error for that case.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Andy Pei [Wed, 22 May 2019 06:36:34 +0000 (14:36 +0800)]
raw/ifpga: fix unintentional integer overflow
cast unsigned int ports_per_retimer, unsigned int nums_retimer,
unsigned int nums_fvl and unsigned int ports_per_fvl to uint64_t
before multiply operation, to avoid Unintentional integer overflow.
Coverity issue: 337924, 337926
Fixes:
d1cd4eb2d48e ("raw/ifpga: support ipn3ke")
Cc: stable@dpdk.org
Signed-off-by: Andy Pei <andy.pei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Tianfei Zhang [Fri, 21 Jun 2019 08:40:17 +0000 (16:40 +0800)]
raw/ifpga/base: fix retimer link status
Fix the readout retimer link status incorrectly when we
remove the linux intel-fpga-driver and run the DPDK application.
The linux driver will stop the retimer when remove the kernel
modules.
Fixes:
8a256bef ("raw/ifpga/base: add eth group driver")
Cc: stable@dpdk.org
Reported-by: Amrutha Sampath <amrutha.sampath@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Tianfei Zhang [Fri, 21 Jun 2019 08:40:16 +0000 (16:40 +0800)]
raw/ifpga/base: fix physical address info
Fix miss phy_addr on ifpga_acc_get_region_info() function.
Fixes:
56bb54ea1bd ("raw/ifpga/base: add Intel FPGA OPAE share code")
Cc: stable@dpdk.org
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Tianfei Zhang [Fri, 21 Jun 2019 08:40:15 +0000 (16:40 +0800)]
raw/ifpga/base: fix bit fields definition
Fix CTRL_DEV_SELECT bit fields definition about eth_group devices.
Fixes:
8a256bef32 ("raw/ifpga/base: add eth group driver")
Cc: stable@dpdk.org
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Tianfei Zhang [Fri, 21 Jun 2019 08:40:14 +0000 (16:40 +0800)]
raw/ifpga/base: fix logically dead code
add temporary variable in max10_reg_write().
Coverity issue: 337927
Fixes:
96ebfcf ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: stable@dpdk.org
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Tianfei Zhang [Fri, 21 Jun 2019 08:40:13 +0000 (16:40 +0800)]
raw/ifpga/base: fix use of untrusted scalar value
Add checking the buffer size and use
const char * for buffer declaration.
Coverity issue: 279449
Fixes:
ef1e8ede ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: stable@dpdk.org
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Konstantin Ananyev [Wed, 3 Jul 2019 13:40:35 +0000 (14:40 +0100)]
test/bpf: add test-case for function return value
New test-case to cover situation when external function returns a
pointer the data.
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Konstantin Ananyev [Wed, 3 Jul 2019 13:40:34 +0000 (14:40 +0100)]
bpf: fix validate for function return value
eval_call() blindly calls eval_max_bound() for external function
return value for all return types.
That causes wrong estimation for returned pointer min and max boundaries.
So any attempt to dereference that pointer value causes verifier to fail
with error message: "memory boundary violation at pc: ...".
To fix - estimate min/max boundaries based on the return value type.
Bugzilla ID: 298
Fixes:
8021917293d0 ("bpf: add extra validation for input BPF program")
Cc: stable@dpdk.org
Reported-by: Michel Machado <michel@digirati.com.br>
Suggested-by: Michel Machado <michel@digirati.com.br>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:30 +0000 (15:12 +0100)]
raw/ioat: add local API to perform copies
Add local APIs to trigger data copies, and retrieve handle values once
those copies are completed. Included are unit tests to validate the data
is copies correctly.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:29 +0000 (15:12 +0100)]
raw/ioat: add statistics functions
Add stats functions to track what is happening in the driver, and put
unit tests to check those.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:28 +0000 (15:12 +0100)]
raw/ioat: add configure, start and stop functions
Allow initializing a driver instance. Include selftest to validate these
functions.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:27 +0000 (15:12 +0100)]
raw/ioat: add device info function
Add in the "info_get" function to the driver, to allow us to query the
device. This allows us to have the unit test pick up the presence of
supported hardware or not.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:26 +0000 (15:12 +0100)]
raw/ioat: create device on probe and destroy on release
Add the create/destroy driver functions so that we can actually allocate
a rawdev and destroy it when done. No rawdev API functions are actually
implemented at this point.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:25 +0000 (15:12 +0100)]
raw/ioat: add register definition file
Add in the list of registers for the device. File is taken from the SPDK
project:
https://github.com/spdk/spdk/blob/master/include/spdk/ioat_spec.h
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:24 +0000 (15:12 +0100)]
usertools: support IOAT device binding
In order to allow binding/unbinding of devices for use by the
ioat_rawdev, we need to update the devbind script to add a new class
of device, and add device ids for the specific HW instances.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:23 +0000 (15:12 +0100)]
raw/ioat: introduce IOAT driver
Add stubs for ioat rawdev driver support in DPDK, specifically:
* makefile and meson build hooks
* initial public header file
* rawdev main C file, with probe and release functions
* release note update announcing the driver
* initial documentation for the new section in the rawdev doc
* unit test stubs for device unit tests
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Jiayu Hu <jiayu.hu@intel.com>
Tested-by: Harry van Haaren <harry.van.haaren@intel.com>
Bruce Richardson [Tue, 2 Jul 2019 14:12:22 +0000 (15:12 +0100)]
rawdev: allow devices to skip extra memory allocation
Some device drivers want to allocate their own private memory, and should
be allowed to do so. Therefore skip memory allocation and associated error
checks if zero-length private memory is requested.
While adjusting the code for new indent level, fix incorrect error
message.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Bruce Richardson [Wed, 3 Jul 2019 16:40:01 +0000 (17:40 +0100)]
devtools: fix lib directory in pkg-config test
With Debian and Ubuntu, the default installation path for the 64-bit
libraries is set to e.g. /usr/local/lib/x86_64-linux-gnu/, compared to
/usr/local/lib64 on Fedora and Redhat distributions. This causes issues
when using "pkg-config --define-prefix" since pkg-config assumes the prefix
to be the grandparent of where the .pc file is. On Ubuntu we then get the
cflags include path as being "/path/to/install-root/usr/local/lib/include"
i.e. with an extra "lib" in the path.
This issue only applies for test installs on Ubuntu and similar distros,
and is not a problem for regular installs since the --define-prefix
parameter would not be passed to pkg-config in those cases.
The workaround for this in our test build script is to explicitly make
"lib" the "libdir" setting for the install, overriding the distro-provided
default.
Fixes:
7f80a2102bbb ("devtools: test pkg-config file")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Wed, 3 Jul 2019 16:40:00 +0000 (17:40 +0100)]
examples: fix pkg-config detection with older make
Make versions before 4.2 did not have support for the .SHELLSTATUS
variable, so use another method to detect shell success.
Fixes:
22119c4591a0 ("examples: use pkg-config in makefiles")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Morten Brørup [Mon, 1 Jul 2019 13:59:04 +0000 (15:59 +0200)]
net: add definition for DSCP and ECN masks
Added definitions of DSCP and ECN masks.
Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Morten Brørup [Mon, 1 Jul 2019 13:38:05 +0000 (15:38 +0200)]
net: fix definition of IPv6 traffic class mask
IPv6 header TC field is 8 bits, not 4.
Fixes:
9b20c6e9028e ("net: add IPv6 header fields macros")
Cc: stable@dpdk.org
Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Morten Brørup [Fri, 21 Jun 2019 10:55:06 +0000 (12:55 +0200)]
net: move TCP flags from ethdev header
TCP flags were moved to the TCP header file from the Ethernet control
header file, and the RTE prefix was added to their names.
Missing TCP ECN flags were added.
The ALL mask did not include TCP ECN flags, so it was renamed to reflect
that it applies to N-tuple filtering only.
Updated other files affected by the renaming accordingly.
Signed-off-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Wei Zhao [Mon, 10 Jun 2019 06:45:10 +0000 (14:45 +0800)]
app/testpmd: fix offloads config
There is no need to use default offloads configuration
if offloads configuration has been pass down from upper layer.
The default offloads are overwritten if not zero.
Fixes:
5e91aeef218c ("app/testpmd: fix offload flags after port config")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Liron Himi [Mon, 1 Jul 2019 08:00:24 +0000 (11:00 +0300)]
net/mvneta: optimize checksum generation offload
For tx checksum offload it is not mandatory to provide
a valid packet_type in addition to a valid ol_flags.
This patch only use ol_flags information for this feature
as a performance improvement.
Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
Yuri Chipchev [Mon, 1 Jul 2019 08:00:23 +0000 (11:00 +0300)]
net/mvneta: reset stats during device init
reset device statistics on device initialization
Signed-off-by: Yuri Chipchev <yuric@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Tested-by: Yuri Chipchev <yuric@marvell.com>
Liron Himi [Mon, 1 Jul 2019 08:00:22 +0000 (11:00 +0300)]
net/mvneta: fix ierror statistics
Error packets were counted twice due to use of redundant counters.
Fixes:
e9d5faffd10c ("net/mvneta: support basic stats")
Cc: stable@dpdk.org
Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Yuri Chipchev <yuric@marvell.com>
Tested-by: Liron Himi <lironh@marvell.com>
Qiming Yang [Mon, 1 Jul 2019 08:32:31 +0000 (16:32 +0800)]
net/ice: support UDP tunnelling port
Enabled UDP tunnel port add and delete functions.
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Qiming Yang [Mon, 1 Jul 2019 08:32:30 +0000 (16:32 +0800)]
net/ice: add generic flow API
This patch adds ice_flow_create, ice_flow_destroy,
ice_flow_flush and ice_flow_validate support,
these are used to handle all the generic filters.
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Wei Zhao [Mon, 1 Jul 2019 08:32:29 +0000 (16:32 +0800)]
net/ice: enable switch filter
The patch enables the backend of rte_flow. It transfers
rte_flow_xxx to device specific data structure and
configures packet process engine's binary classifier
(switch) properly.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Leyi Rong [Mon, 1 Jul 2019 05:04:50 +0000 (13:04 +0800)]
net/ice/base: fix inner L2 offset in GRE dummy packet
The offset for the inner L2 header in the dummy GRE packet
was off by 2 bytes so updated the offset.
Fixes:
839c0a4b77e6 ("net/ice/base: enable additional switch rules")
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Leyi Rong [Mon, 1 Jul 2019 05:04:49 +0000 (13:04 +0800)]
net/ice/base: support ethertype switch filters
Add protocol definitions for ethertype.
Add ice_ethtype_hdr structure definition into the ice_prot_hdr union.
Add ethtype offsets into the training packet maps.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Leyi Rong [Mon, 1 Jul 2019 05:04:48 +0000 (13:04 +0800)]
net/ice/base: support IPv6 based switch filters
- Add IPv6 switch rule support.
- Add IPv6 training packet.
- Correct name of IPv6 header variable.
- Fix enum values so that they point to the proper
ice_prot_ext_tbl_entry field.
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Dan Wei [Sat, 22 Jun 2019 14:25:21 +0000 (10:25 -0400)]
net/ipn3ke: modify AFU configurations
Modify AFU configurations for new BBS (Blue Bitstream) of A10 on N3000
card:
- AFU register access: RTL changes the UPL (User Programmable Logic
which is the container of vBNG IP) base address and the read/write
commands of register indirect access.
- Poll the INIT_STS register to wait for the vBNG IP and DDR reset
completion.
- Refine log for debug: print UPL_version not only for vBNG bit stream,
but also for other bit streams.
Fixes:
c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: stable@dpdk.org
Signed-off-by: Dan Wei <dan.wei@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Rastislav Cernay [Thu, 13 Jun 2019 12:33:41 +0000 (14:33 +0200)]
net/nfb: support Silicom Mango card
Add support for Silicom FB2CGG3 smart NIC
Signed-off-by: Rastislav Cernay <cernay@netcope.com>
Rastislav Cernay [Thu, 13 Jun 2019 13:01:46 +0000 (15:01 +0200)]
net/szedata2: support Silicom Mango card
Add support for Silicom FB2CGG3 smart NIC
Signed-off-by: Rastislav Cernay <cernay@netcope.com>
Acked-by: Jan Remes <remes@netcope.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:53 +0000 (23:53 +0530)]
event/octeontx2: add devargs to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.
Example:
--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:52 +0000 (23:53 +0530)]
event/octeontx2: add devargs to limit timer adapters
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.
Example:
--dev "0002:0e:00.0,tim_rings_lmt=2"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:51 +0000 (23:53 +0530)]
event/octeontx2: add timer adapter start and stop
Add event timer adapter start and stop functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:50 +0000 (23:53 +0530)]
event/octeontx2: add timer stats get and reset
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.
Example:
--dev "0002:0e:00.0,tim_stats_ena=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:49 +0000 (23:53 +0530)]
event/octeontx2: add timer cancel function
Add function to cancel event timer that has been armed.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:48 +0000 (23:53 +0530)]
event/octeontx2: add timer arm timeout burst
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:47 +0000 (23:53 +0530)]
event/octeontx2: add timer arm routine
Add event timer arm routine.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:46 +0000 (23:53 +0530)]
event/octeontx2: add TIM bucket operations
Add TIM bucket operations used for event timer arm and cancel.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:45 +0000 (23:53 +0530)]
event/octeontx2: add timer adapter info function
Add TIM event timer adapter info get function.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:44 +0000 (23:53 +0530)]
event/octeontx2: allow adapters to resize inflight buffers
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:43 +0000 (23:53 +0530)]
event/octeontx2: add TIM IRQ handlers
Register and implement TIM IRQ handlers for error interrupts
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:42 +0000 (23:53 +0530)]
event/octeontx2: add devargs to modify chunk slots
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.
Example:
--dev "0002:0e:00.0,tim_chnk_slots=511"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:41 +0000 (23:53 +0530)]
event/octeontx2: add devargs to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.
Example:
--dev "0002:0e:00.0,tim_disable_npa=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:40 +0000 (23:53 +0530)]
event/octeontx2: allow TIM to optimize config
Allow TIM to optimize user supplied configuration based on
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES flag.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:39 +0000 (23:53 +0530)]
event/octeontx2: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM lf based on number of lf's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
* Buckets based on min and max timeout supplied.
* Allocate the chunk pool based on the number of timers.
On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:38 +0000 (23:53 +0530)]
event/octeontx2: add timer adapter capabilities
Add function to retrieve event timer adapter capabilities.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:37 +0000 (23:53 +0530)]
event/octeontx2: support event timer
Add event timer adapter aka TIM initialization on SSO probe.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:36 +0000 (23:53 +0530)]
event/octeontx2: add SSO selftest
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:
Example:
--dev "0002:0e:00.0,selftest=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:35 +0000 (23:53 +0530)]
event/octeontx2: add device stop and close functions
Add event device stop and close callback functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:34 +0000 (23:53 +0530)]
event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.
Example:
--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]
Qx -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.
The values need to be expressed in terms of percentages, 0 represents
default.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:33 +0000 (23:53 +0530)]
event/octeontx2: add device start function
Add eventdev start function along with few cleanup API's to maintain
sanity.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:32 +0000 (23:53 +0530)]
event/octeontx2: add devargs to force legacy mode
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
--dev "0002:0e:00.0,single_ws=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:31 +0000 (23:53 +0530)]
event/octeontx2: add worker dual GWS dequeue functions
Add workder dual workslot mode dequeue functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:30 +0000 (23:53 +0530)]
event/octeontx2: add worker dual GWS enqueue functions
Add dual workslot mode event enqueue functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:29 +0000 (23:53 +0530)]
event/octeontx2: add SSO dual GWS HW device operations
Add SSO dual workslot mode GWS HW device operations.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:28 +0000 (23:53 +0530)]
event/octeontx2: add SSO dual workslot mode
OcteonTx2 AP core SSO cache contains two entries each entry caches
state of an single GWS aka event port.
AP core requests events from SSO by using following sequence :
1. Write to SSOW_LF_GWS_OP_GET_WORK
2. Wait for SSO to complete scheduling by polling on SSOW_LF_GWS_TAG[63]
3. SSO notifies core by clearing SSOW_LF_GWS_TAG[63] and if work is
valid SSOW_LF_GWS_WQP is non-zero.
The above sequence uses only one in-core cache entry.
In dual workslot mode we try to use both the in-core cache entries by
triggering GET_WORK on a second workslot as soon as the above sequence
completes. This effectively hides the schedule latency of SSO if there
are enough events with unique flow_tags in-flight.
This mode reserves two SSO GWS lf's for each event port effectively
doubling single core performance.
Dual workslot mode is the default mode of operation in octeontx2.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:27 +0000 (23:53 +0530)]
event/octeontx2: add worker dequeue functions
Add worker event dequeue functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:26 +0000 (23:53 +0530)]
event/octeontx2: add worker enqueue functions
Add worker event enqueue functions.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:25 +0000 (23:53 +0530)]
event/octeontx2: add SSO HW device operations
Add SSO HW device operations used for enqueue/dequeue.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:24 +0000 (23:53 +0530)]
event/octeontx2: support xstats
Add support for retrieving statistics from SSO GWS and GGRP.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:23 +0000 (23:53 +0530)]
event/octeontx2: add register dump functions
Add SSO GWS and GGRP register dump function to aid debugging.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:22 +0000 (23:53 +0530)]
event/octeontx2: add SSO GWS and GGRP IRQ handlers
Register and implement SSO GWS and GGRP IRQ handlers for error
interrupts.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:21 +0000 (23:53 +0530)]
event/octeontx2: support dequeue timeout tick conversion
Add function to convert dequeue timeout from ns to ticks.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:20 +0000 (23:53 +0530)]
event/octeontx2: support linking queues to ports
Links between queues and ports are controlled by setting/clearing GGRP
membership in SSOW_LF_GWS_GRPMSK_CHG.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:19 +0000 (23:53 +0530)]
event/octeontx2: add port config functions
Add default config, setup and release functions for event ports
i.e. SSO GWS.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:18 +0000 (23:53 +0530)]
event/octeontx2: add devargs for inflight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.
Example:
--dev "0002:0e:00.0,xae_cnt=8192"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:17 +0000 (23:53 +0530)]
event/octeontx2: allocate event inflight buffers
Allocate buffers in DRAM that hold inflight events.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:16 +0000 (23:53 +0530)]
event/octeontx2: add event queue config functions
Add default config, setup and release functions for event queues i.e.
SSO GGRPS.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:15 +0000 (23:53 +0530)]
event/octeontx2: add device configure function
Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:14 +0000 (23:53 +0530)]
event/octeontx2: add device capabilities function
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:13 +0000 (23:53 +0530)]
event/octeontx2: add init and fini for SSO object
SSO object needs to be initialized to communicate with the kernel AF
driver through mbox using the common API's.
Also, initialize the internal eventdev structure to defaults.
Attach NPA lf to the PF if needed.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Fri, 28 Jun 2019 18:23:12 +0000 (23:53 +0530)]
event/octeontx2: add build infra and device probe
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Pavan Nikhilesh [Sun, 30 Jun 2019 17:52:40 +0000 (23:22 +0530)]
test/eventdev: fix producer core validity checks
When producer type is event timer adapter producer lcore checks are
skipped. Since, timer adapter relies on SW to arm timers producer lcore
is essential for its functionality.
Verify producer lcore validity when producer type is event timer
adapter.
Fixes:
b01974da9f25 ("app/eventdev: add ethernet device producer option")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Sun, 30 Jun 2019 17:52:39 +0000 (23:22 +0530)]
app/eventdev: fix order test port creation
Configure event ports based on the underlying event device info rather
than using hardcoded values.
Fixes:
5710e751813e ("app/testeventdev: add order port setup")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Jerin Jacob [Tue, 2 Jul 2019 06:45:48 +0000 (12:15 +0530)]
eventdev: fix doxygen comment
Update rte_eventdev.h file description to adapt to Tx adapter changes.
Fixes:
c9bf83947e2e ("eventdev: add eth Tx adapter APIs")
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
Nikhil Rao [Mon, 24 Jun 2019 23:16:02 +0000 (04:46 +0530)]
eventdev: change Rx adapter callback and stats structure
Replace the mbuf pointer array in the event eth Rx adapter
callback with an event array. Using an event array allows
the application to change attributes of the events enqueued
by the SW adapter.
The callback can drop packets and populate a callback
argument with the number of dropped packets. Add a Rx adapter
stats field to keep track of the total number of dropped packets.
This commit removes the experimental tags from
the callback and stats APIs, the experimental tag from eventdev
is also removed and eventdev functions become part of the
main DPDK API/ABI.
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nipun Gupta [Thu, 27 Jun 2019 09:36:04 +0000 (15:06 +0530)]
event/dpaa2: fix timeout ticks
Correct timeout to tick conversion.
Fixes:
0ce3ce7c275c ("event/dpaa2: add configuration functions")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Erik Gabriel Carrillo [Wed, 19 Jun 2019 16:25:58 +0000 (11:25 -0500)]
eventdev: add new software timer adapter
This patch introduces a new version of the event timer adapter software
PMD. In the original design, timer event producer lcores in the primary
and secondary processes enqueued event timers into a ring, and a
service core in the primary process dequeued them and processed them
further. To improve performance, this version does away with the ring
and lets lcores insert timers directly into timer skiplist data
structures; the service core directly accesses the lists as well, when
looking for timers that have expired.
To compare the burst and non-burst performance of the original and new
versions of the software event timer adapter, I ran the following
commands:
$ sudo ./build/app/dpdk-test-eventdev -c 0xFFE -s 0xC --vdev=event_sw0 \
-- --test=perf_queue --plcores=4,5,6 --wlcore=7,8,9 --stlist=p \
--prod_type_timerdev --worker_deq_depth=32
$ sudo ./build/app/dpdk-test-eventdev -c 0xFFE -s 0xC --vdev=event_sw0 \
-- --test=perf_queue --plcores=4,5,6 --wlcore=7,8,9 --stlist=p \
--prod_type_timerdev_burst --worker_deq_depth=32
With the new version, I see a 151% improvement in throughput for the
non-burst case, and a 270% improvement in throughput for the burst case.
I also see a 53% improvement in arm latency in the non-burst case and a
65% improvement in arm latency in the burst case.
Note: To perform the test, I commented out a check in the original
version that checks the adapter tick interval against a minimum value.
Signed-off-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nikhil Rao [Tue, 28 May 2019 01:05:04 +0000 (06:35 +0530)]
eventdev: optimize Rx adapter enqueue
Setup event when the Rx queue is added to the
adapter in place of generating the event when it is
being enqueued to the event device.
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nikhil Rao [Tue, 21 May 2019 21:52:53 +0000 (03:22 +0530)]
eventdev: remove event copy in Rx adapter
Remove copy from temporary event array on the stack to the
enqueue buffer event array entry, instead initialize event in the
enqueue buffer event array entry.
Suggested-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Jerin Jacob [Tue, 2 Jul 2019 15:06:19 +0000 (20:36 +0530)]
mk: fix -march for octeontx2 target
Correct the wrong -march=-mcpu=armv8.2-a+crc+crypto+lse for
octeontx2 target. Since rte_cc_has_argument drops invalid
CFLAG and -mcpu=octeontx2 picks up the correct optimization,
this typo is not noticed in performance testing.
Fixes:
01d184798731 ("config: add octeontx2 machine")
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Bruce Richardson [Wed, 5 Jun 2019 20:22:41 +0000 (21:22 +0100)]
drivers: add reasons for components being disabled
For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Wed, 5 Jun 2019 20:22:40 +0000 (21:22 +0100)]
lib: add reasons for components being disabled
For each library where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Wed, 5 Jun 2019 20:22:39 +0000 (21:22 +0100)]
build: print list of disabled components
When configuring with meson we print out a list of enabled components, but
it is also useful to list out the disabled components and the reasons why.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Tue, 2 Jul 2019 14:44:45 +0000 (15:44 +0100)]
examples/vhost_crypto: support build with pkg-config
The vhost_crypto example app did not check for a libdpdk pkg-config file
and attempt to build using that. Add support for that method of compile to
align the app with the other examples.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Tue, 2 Jul 2019 14:44:44 +0000 (15:44 +0100)]
examples/vdpa: support build with pkg-config
The vdpa example app did not check for a libdpdk pkg-config file and
attempt to build using that. Add support for that method of compile to
align the app with the other examples.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Tue, 2 Jul 2019 14:44:43 +0000 (15:44 +0100)]
devtools: test pkg-config file
The pkg-config file generated as part of the build of DPDK should allow
applications to be built with an installed DPDK. We can test this as
part of the build by doing an install of DPDK to a temporary directory
within the build folder, and by then compiling up a few sample apps
using make working off that directory.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Tue, 2 Jul 2019 14:44:42 +0000 (15:44 +0100)]
devtools: test meson build with available compilers
Allow the script to run with a reduced set of builds if clang, or
other compilers, are missing.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Tue, 2 Jul 2019 14:44:41 +0000 (15:44 +0100)]
examples: support relocated DPDK install
For testing of DPDK, we want to override the prefix given by the
pkg-config file, so that we can get correct paths for DPDK installed
in an unusual location.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>