Huisong Li [Wed, 1 Jun 2022 03:52:44 +0000 (11:52 +0800)]
net/hns3: fix an unreasonable memset
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Wed, 8 Jun 2022 11:45:48 +0000 (19:45 +0800)]
test/bonding: fix RSS test when disable RSS
The "test_rss_lazy" test is used for testing bonding RSS functions
when bonded port disable RSS. Currently, this test case can update
RSS functions of bonded and slave port if bonded port turns off RSS.
It is unreasonable and has been adjusted to be non-updateable in
following patch:
"93e1ea6dfa99 ethdev: fix RSS update when RSS is disabled"
So this patch fixes this test code.
Fixes: 43b630244e7e ("app/test: add dynamic bonding RSS configuration") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Huisong Li [Wed, 8 Jun 2022 11:45:47 +0000 (19:45 +0800)]
net/bonding: fix RSS inconsistency between ports
Currently, RSS configuration of slave is set only when RSS is enabled for
bonded port. If RSS is enabled for the slaves port before adding to the
bonded port with disabling RSS, it will run into that the RSS enabled state
of bonded and slaves port is inconsistent after starting bonded port.
So the RSS configuration of slave should also be set when RSS is disabled
for bonded port.
Fixes: 734ce47f71e0 ("bonding: support RSS dynamic configuration") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Volodymyr Fialko [Fri, 17 Jun 2022 12:38:18 +0000 (14:38 +0200)]
app/eventdev: increase number of descriptors
Increase number of cryptodev queue pair descriptors by default. Current
size of 128 descriptors does not satisfying minimal requirements of crypto
drivers.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Volodymyr Fialko [Mon, 20 Jun 2022 11:26:16 +0000 (13:26 +0200)]
event/cnxk: initialize work slot read cache
Initialize gw_rdata with tag type EMPTY. Leaving tag type as
zero(ATOMIC) may cause some unnecessary head wait, if cache will be used
before the first update in dequeue/get_work functions.
During adapter create, memory is allocated for storing event port
configuration which is freed during adapter free. The following
error is seen during free "EAL: Error: Invalid memory"
The service data pointer storage for txa_service_data_array is
allocated during adapter create with incorrect size which is less
than the required size.
Initialization of this memory causes buffer overflow and result in
metadata overwrite of event port config memory allocated above
and results in the above error message during free.
Allocating the correct size of memory for txa_service_data_array
prevents overwriting other memory areas like event port config
memory.
Fixes: a3bbf2e09756 ("eventdev: add eth Tx adapter implementation") Cc: stable@dpdk.org Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Timothy McDaniel [Thu, 16 Jun 2022 22:21:36 +0000 (17:21 -0500)]
event/dlb2: support ldb port specific COS
DLB supports 4 class of service domains, to aid in managing the
device bandwidth across ldb ports. This commit allows specifying
which ldb ports will participate in the COS scheme, which class
they are a part of, and the specific bandwidth percentage
associated with each class. The cumulative bandwidth associated
with the 4 classes must not exceed 100%. This feature is enabled
on the command line, and will be documented in the DLB2 programmers
guide.
Timothy McDaniel [Thu, 16 Jun 2022 22:21:35 +0000 (17:21 -0500)]
event/dlb2: support CQ weight
Enabling the weight limit on a CQ allows the enqueued QEs' 2-bit weight
value (representing weights of 1, 2, 4, and 8) to factor into whether a
CQ is full. If the sum of the weights of the QEs in the CQ meet or exceed
its weight limit, DLB will stop scheduling QEs to it (until software pops
enough QEs from the CQ to reverse that).
CQ weight support is enabled via the command line, and applies to
DLB 2.5 (and above) load balanced ports. The DLB2 documentation will
be updated with further details.
Timothy McDaniel [Mon, 13 Jun 2022 20:39:11 +0000 (15:39 -0500)]
event/dlb2: support single 512B write of 4 QEs
On Xeon, 512b accesses are available, so movdir64 instruction is able to
perform 512b read and write to DLB producer port. In order for movdir64
to be able to pull its data from store buffers (store-buffer-forwarding)
(before actual write), data should be in single 512b write format.
This commit add change when code is built for Xeon with 512b AVX support
to make single 512b write of all 4 QEs instead of 4x64b writes.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com> Acked-by: Kent Wires <kent.wires@intel.com>
Timothy McDaniel [Mon, 13 Jun 2022 18:19:14 +0000 (13:19 -0500)]
event/dlb2: fix advertized capabilities
This commit corrects the advertized capabilities reported by the DLB2 PMD.
Previously DLB2 reported supporting RTE_EVENT_DEV_CAP_QUEUE_QOS, but the
DLB2 hardware does not support such capability. This commit removes that
feature from the reported capabilities feature set.
Additionally, two capabilities that DLB2 does support were not being
reported in the capabilities feature set. This commit adds those.
RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT = Event device is capable of
setting up the link between multiple queues and a single port. If the
flag is not set, the eventdev can only map a single queue to each
port or map a single queue to many port
RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK = Event device is capable of
configuring the queue/port link at runtime. If the flag is not set,
the eventdev queue/port link is only can be configured during
initialization
Finally, the file doc/guides/eventdevs/features/dlb2.ini has been updated
to match the capabilities actually reported by the PMD.
Volodymyr Fialko [Thu, 26 May 2022 08:13:51 +0000 (10:13 +0200)]
event/cnxk: add Tx adapter freeing
Tx adapter allocate data during eth_tx_adapter_queue_add() call and
it's only cleaned but not freed during eth_tx_adapter_queue_del().
Implemented eth_tx_adapter_free() callback to free adapter data.
Pavan Nikhilesh [Wed, 25 May 2022 09:00:52 +0000 (14:30 +0530)]
app/eventdev: add Tx first option to pipeline mode
Add Tx first support to pipeline mode tests, the transmission is done
on all the ethernet ports. This helps in testing eventdev performance
with standalone loopback interfaces.
Pavan Nikhilesh [Mon, 23 May 2022 09:59:54 +0000 (15:29 +0530)]
examples: use mempool cache for vector pool
Use mempool cache for vector mempool as vectors are freed by the Tx
routine, also increase the minimum pool size to 512 to avoid resource
contention on Rx.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Mon, 23 May 2022 09:59:53 +0000 (15:29 +0530)]
app/eventdev: use mempool cache for vector pool
Use mempool cache for vector mempool as vectors are freed by the Tx
routine, also increase the minimum pool size to 512 to avoid resource
contention on Rx.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Wed, 18 May 2022 14:04:11 +0000 (19:34 +0530)]
event/cnxk: fix Tx adapter enqueue return for CN10K
The `rte_event_eth_tx_adapter_enqueue()` function expects driver layer
to return the total number of events successfully transmitted.
Fix cn10k driver returning the number of packets transmitted in a
event vector instead of number of events.
Fixes: 761a321acf91 ("event/cnxk: support vectorized Tx event fast path") Cc: stable@dpdk.org Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
common/cnxk: add lower bound check for SSO resources
Observing a crash when the user runs the second test case, with the
first test case using all HWGRP and HWS, SSO resources. This happens
as there are no HWGRP and HWS resources left for the second test case.
Make sure to process a test case only when valid HWGRPS and HWS
are present by adding lower bound check for HWGRPS and HWS.
If QID inflights is set to an invalid value, it can cause the
PMD to hang. This commit adds checks to make sure that the
value is valid before programming the hardware.
Fixes: 1857f1922ce2 ("event/dlb2: use new implementation of resource file") Cc: stable@dpdk.org Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Previously, anything that prevented the CQs from being drained
would hang the PMD for an unacceptably long time. This commit updates
the drain logic to be resource and time based, thus eliminating
the potential for a long hang when draining the queues in preparation
for a reset.
Fixes: 1857f1922ce2 ("event/dlb2: use new implementation of resource file") Cc: stable@dpdk.org Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
If user tried to send 64 events, it will take 64 credits. Enqueue API
only gets 32 credits each time. If it does not have sufficient credits,
it just fails and returns. Enqueue API does not retry. On next enqueue,
it will get 32 more and send will work. This results in alternate
enqueues failing.
Add check to make sure DLB2_MAX_ENQUEUE_DEPTH <=
both DLB2_SW_CREDIT_QUANTA_DEFAULT and DLB2_SW_CREDIT_BATCH_SZ.
Add enough retires in the driver to satisfy max enqueue depth credits
based on set quanta. Note the credit quanta size is different for each
port. Retry count = Max enqueue depth / credit quanta in driver before
returning no credit.
Harman Kalra [Tue, 24 May 2022 08:42:25 +0000 (14:12 +0530)]
event/octeontx: fix SSO fast path
Segmentation fault is observed as soon as any application
with ethdev event is launched as ev->mbuf was not set properly.
Fixing sub event type violation as in OCTEONTX event device
sub_event_type is used to store the ethernet port identifier
when work is received from OCTEONTX ethernet device. This violates
the event device spec as sub_event_type should be 0 in the initial
receive stage. Setting sub_event_type to 0 after copying the port id
in single workslot mode.
Kai Ji [Mon, 13 Jun 2022 17:02:59 +0000 (01:02 +0800)]
crypto/qat: use intel-ipsec-mb for partial hash and AES
Since openssl 3.0 now deprecates the low level API QAT required to
perform partial hash & AES operation when creating the session. This
patch add in qat_ipsec_mb_lib driver parameter to allow QAT PMD to
switch APIs between openssl and intel ipsec-mb library.
Signed-off-by: Kai Ji <kai.ji@intel.com> Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Ciara Power <ciara.power@intel.com>
This patch initializes with 0 rte_ipsec_sa_prm inside the
ipsec_sa struct.
Before it was passed uninitialized to rte_ipsec_sa_init(),
which does not check whether prm->ipsec_xform.esn.value is
greater than sa->sqn_mask.
Ciara Power [Tue, 21 Jun 2022 11:41:32 +0000 (11:41 +0000)]
test/crypto: fix cipher offset for ZUC
The cipher offset in bits was not being used in ZUC encryption test
functions when creating the operation, it was hardcoded to 0.
This is fixed to use the offset from the test vector as intended.
Fixes: fd01a9be38d5 ("test/crypto: move IV to crypto op private data") Cc: stable@dpdk.org Signed-off-by: Ciara Power <ciara.power@intel.com> Acked-by: Kai Ji <kai.ji@intel.com>
Kai Ji [Tue, 21 Jun 2022 15:42:14 +0000 (23:42 +0800)]
crypto/openssl: update DSA routine with 3.0 EVP API
This patch updates asymmetric DSA routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis. Divided the single combined DSA sign
test to two individual DSA sign and DSA verfiy tests.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Make sure that ipsec_perf_autotest checks if there are any crypto
devices available before it starts performance testing.
Same test is performed in the ipsec_autotest so it seems prudent to do
it here too to not introduce false failures.
Anoob Joseph [Mon, 20 Jun 2022 11:59:03 +0000 (17:29 +0530)]
crypto/cnxk: add CPT hardware flow control checks
Add hardware supported flow control checks before enqueueing to CPT.
Since both poll mode and event mode can be used at the same time, add
hardware flow control checks to make sure s/w doesn't over submit to
hardware queues. For cn9k, queue depth usage is not high and so FC check
is omitted for poll mode.
To allow for more accurate updates, flow control hardware setting is
updated to give an update per 32 packets. In case of crypto adapter,
multiple cores can enqueue to the same CPT LF at the same time. To
allow such a case, flow control threshold is updated when the adapter
is configured.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Mon, 20 Jun 2022 07:18:06 +0000 (12:48 +0530)]
crypto/cnxk: improve fast path
Remove SA & packet accesses in dequeue path by adjusting the headers in
the enqueue path for outbound packets. For inbound packets, add extra
esn_en flag in the SA to minimize cache line accesses in the datapath.
Also, use seq_lo for IPID. IPID just need to be unique. Instead of
incrementing per packet, use ESN low bits.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
David Marchand [Tue, 7 Jun 2022 10:02:02 +0000 (12:02 +0200)]
examples/fips_validation: fix link to libjansson
When compiling this example out of DPDK, linking the executable fails
with:
## Building fips_validation
/usr/bin/ld: /tmp/ccQjeHBg.o: in function `fips_test_init':
fips_validation.c:(.text+0x7ab): undefined reference to `json_loadf'
/usr/bin/ld: /tmp/ccQjeHBg.o: in function
`fips_test_parse_one_json_vector_set':
fips_validation.c:(.text+0xc2e): undefined reference to `json_object_get'
/usr/bin/ld: fips_validation.c:(.text+0xc36): undefined reference to
`json_string_value'
/usr/bin/ld: /tmp/ccQjeHBg.o: in function `fips_test_parse_one_json_group':
fips_validation.c:(.text+0xd00): undefined reference to `json_object_get'
/usr/bin/ld: fips_validation.c:(.text+0xd14): undefined reference to
`json_integer_value'
...
Code in an example can't rely on RTE_HAS_JANSSON, because it only
indicates that the jansson library was available at the time of dpdk
compilation.
Prefer a local build flag (like what is done in vm_power_manager).
And add linking to libjansson, if available.
Fixes: f556293fd58e ("examples/fips_validation: add JSON info to header") Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
David Marchand [Thu, 16 Jun 2022 09:33:20 +0000 (11:33 +0200)]
test/ipsec: fix build with GCC 12
GCC 12 raises the following warning:
In function ‘_mm256_loadu_si256’,
inlined from ‘rte_mov32’ at
../lib/eal/x86/include/rte_memcpy.h:319:9,
inlined from ‘rte_mov128’ at
../lib/eal/x86/include/rte_memcpy.h:344:2,
inlined from ‘rte_memcpy_generic’ at
../lib/eal/x86/include/rte_memcpy.h:438:4,
inlined from ‘rte_memcpy’ at
../lib/eal/x86/include/rte_memcpy.h:882:10,
inlined from ‘setup_test_string.constprop’ at
../app/test/test_ipsec.c:572:4:
/usr/lib/gcc/x86_64-redhat-linux/12/include/avxintrin.h:929:10: error:
array subscript ‘__m256i_u[3]’ is partly outside array bounds of
‘const char[108]’ [-Werror=array-bounds]
929 | return *__P;
| ^~~~
../app/test/test_ipsec.c: In function ‘setup_test_string.constprop’:
../app/test/test_ipsec.c:539:12: note: at offset 96 into object
‘null_plain_data’ of size 108
539 | const char null_plain_data[] =
| ^~~~~~~~~~~~~~~
Add a hint so that the compiler understands the copied data is within
the passed string boundaries.
Ankur Dwivedi [Fri, 17 Jun 2022 13:39:30 +0000 (19:09 +0530)]
crypto/cnxk: fix build with GCC 12
The following warning is observed with GCC 12 compilation:
In file included from ../drivers/crypto/cnxk/cn10k_cryptodev_ops.c:17:
In function ‘fill_sg_comp_from_iov’,
inlined from ‘cpt_pdcp_chain_alg_prep’ at
../drivers/crypto/cnxk/cnxk_se.h:1194:8,
inlined from ‘cpt_fc_enc_hmac_prep’ at
../drivers/crypto/cnxk/cnxk_se.h:1871:9,
inlined from ‘fill_digest_params’ at
../drivers/crypto/cnxk/cnxk_se.h:2829:8,
inlined from ‘cpt_sym_inst_fill’ at
../drivers/crypto/cnxk/cn10k_cryptodev_ops.c:92:9,
inlined from ‘cn10k_cpt_fill_inst.constprop’ at
../drivers/crypto/cnxk/cn10k_cryptodev_ops.c:146:10:
../drivers/crypto/cnxk/cnxk_se.h:222:52: warning: array subscript 0 is
outside array bounds of ‘struct roc_se_buf_ptr[0]’ [-Warray-bounds]
222 | e_vaddr = (uint64_t)bufs[j].vaddr;
| ~~~~~~~^~~~~~
../drivers/crypto/cnxk/cnxk_se.h:223:48: warning: array subscript 0 is
outside array bounds of ‘struct roc_se_buf_ptr[0]’ [-Warray-bounds]
223 | e_len = (size > bufs[j].size) ? bufs[j].size : size;
| ~~~~~~~^~~~~
This patch resolves the warning.
Fixes: 3de331795f73 ("crypto/cnxk: add flexi cipher encryption") Cc: stable@dpdk.org Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Reviewed-by: Anoob Joseph <anoobj@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com> Tested-by: David Marchand <david.marchand@redhat.com>
Ankur Dwivedi [Fri, 17 Jun 2022 13:39:29 +0000 (19:09 +0530)]
common/cpt: fix build with GCC 12
The following warning is observed with GCC 12 compilation:
In function ‘fill_sg_comp_from_iov’,
inlined from ‘cpt_zuc_snow3g_enc_prep’ at
../drivers/common/cpt/cpt_ucode.h:1672:9,
inlined from ‘cpt_fc_enc_hmac_prep’ at
../drivers/common/cpt/cpt_ucode.h:2472:3,
inlined from ‘fill_digest_params’ at
../drivers/common/cpt/cpt_ucode.h:3548:14,
inlined from ‘otx_cpt_enq_single_sym’ at
../drivers/crypto/octeontx/otx_cryptodev_ops.c:541:9,
inlined from ‘otx_cpt_enq_single_sym_sessless’ at
../drivers/crypto/octeontx/otx_cryptodev_ops.c:584:8,
inlined from ‘otx_cpt_enq_single’ at
../drivers/crypto/octeontx/otx_cryptodev_ops.c:611:11,
inlined from ‘otx_cpt_pkt_enqueue’ at
../drivers/crypto/octeontx/otx_cryptodev_ops.c:643:9,
inlined from ‘otx_cpt_enqueue_sym’ at
../drivers/crypto/octeontx/otx_cryptodev_ops.c:668:9:
../drivers/common/cpt/cpt_ucode.h:415:36: warning: array subscript 0 is
outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’}
[-Warray-bounds]
415 | e_dma_addr = bufs[j].dma_addr;
| ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~
../drivers/common/cpt/cpt_ucode.h:416:48: warning: array subscript 0 is
outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’}
[-Warray-bounds]
416 | e_len = (size > bufs[j].size) ?
| ~~~~~~~^~~~~
This patch resolves the warning.
Bugzilla ID: 861 Fixes: 9be415daf469 ("common/cpt: add common defines for microcode") Fixes: b74652f3a91f ("common/cpt: add microcode interface for encryption") Cc: stable@dpdk.org Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Reviewed-by: Anoob Joseph <anoobj@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com> Tested-by: David Marchand <david.marchand@redhat.com>
Radu Nicolau [Fri, 10 Jun 2022 10:45:54 +0000 (11:45 +0100)]
examples/ipsec-secgw: fix packet type parsing
Add new packet type flags instead of overwriting.
Fixes: d04bb1c52647 ("examples/ipsec-secgw: use HW parsed packet type in poll mode") Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
examples/ipsec-secgw: add option for descriptors per QP
Added option to configure number of queue pair descriptors via command
line (--desc-nb NUMBER_OF_DESC).
When the crypto processing takes longer durations, small queue pair size
would result in cryptodev enqueue failures. Larger queue pair size would
allow more packets to stay in flight simultaneously and reduce enqueue
failures.
Rahul Lakkireddy [Mon, 13 Jun 2022 09:52:23 +0000 (15:22 +0530)]
test/crypto: fix build with optimization=1
Fail IPSec ESN and antireplay cases, if there are no packets. Fixes
following warning when using optimization=1 build flag with GCC 11.
../app/test/test_cryptodev.c: In function ‘test_ipsec_pkt_replay’:
../app/test/test_cryptodev.c:10074:15: warning: ‘td_outb’ may be used uninitialized [-Wmaybe-uninitialized]
ret = test_ipsec_proto_process(td_outb, td_inb, nb_pkts, true,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
&flags);
~~~~~~~
../app/test/test_cryptodev.c:9150:1: note: by argument 1 of type ‘const struct ipsec_test_data[]’ to ‘test_ipsec_proto_process’ declared here
test_ipsec_proto_process(const struct ipsec_test_data td[],
^~~~~~~~~~~~~~~~~~~~~~~~
../app/test/test_cryptodev.c:10056:32: note: ‘td_outb’ declared here
struct ipsec_test_data td_outb[IPSEC_TEST_PACKETS_MAX];
^~~~~~~
Radu Nicolau [Wed, 25 May 2022 13:59:11 +0000 (14:59 +0100)]
examples/ipsec-secgw: fix NAT-T header fields
Use the proper IP protocol (UDP instead of ESP) and set the ports when
UDP encapsulation is enabled.
Fixes: 9ae86b4cfc77 ("examples/ipsec-secgw: support UDP encap for inline crypto") Cc: stable@dpdk.org Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Radu Nicolau [Wed, 25 May 2022 13:59:10 +0000 (14:59 +0100)]
ipsec: fix NAT-T ports and length
Fix the UDP header fields, wrong byte order used for src and dst port
and wrong offset used when updating UDP datagram length.
Fixes: 01eef5907fc3 ("ipsec: support NAT-T") Cc: stable@dpdk.org Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Nicolas Chautru [Tue, 31 May 2022 22:31:42 +0000 (15:31 -0700)]
baseband/acc100: update companion PF configure function
Update of the device configuration function from PF used for bbdev-test
to latest sequence for ACC199 PRQ device and matching version in
pf_bb_config 22.03.
The function rte_pie_drop was attempting to do a random probability
drop, but because of incorrect usage of fixed point divide
it would always return 1.
Change to use new rte_drand() instead.
Fixes: 44c730b0e379 ("sched: add PIE based congestion management") Cc: stable@dpdk.org Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
The PIE code and other applications can benefit from having a
fast way to get a random floating point value. This new function
is equivalent to drand() in the standard library.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Ray Kinsella <mdr@ashroe.eu>
common/cnxk: support switching CPRI/ETH back and forth
Add support for toggling modes between ETH and CPRI on
newer MACs (RPM).
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
common/cnxk: sync eth mode change command with firmware
Layout of eth mode change command defined by firmware has been changed
recently. So in order to retain compatibility between ROC and firmware
update existing codebase.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
raw/cnxk_bphy: support enabling Tx for CPRI SERDES
Add support for enabling or disablig TX for SERDES
configured in CPRI mode.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
raw/cnxk_bphy: support switching from eCPRI to CPRI
Add support for switching from ethernet (eCPRI) to CPRI mode.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
common/cnxk: do not switch affinity back and forth
Switching affinity back and forth was used as a mean to pass CPU number
to IRQ registration routine which is an overkill.
Simplify current logic by extending IRQ registration routine parameter
list with a CPU which should run IRQ handler.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Some platforms have more RPMs available than the others. Take than
into account when retrieving id of a particular RPM.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com> Tested-by: Jerin Jacob <jerinj@marvell.com>
Due to HW changes some fields which were used to enable
xmit were moved elsewhere. This patch takes care of this.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com> Tested-by: Jerin Jacob <jerinj@marvell.com>
David Marchand [Mon, 13 Jun 2022 07:37:00 +0000 (09:37 +0200)]
test: drop reference to removed tests
cycles_autotest and delay_us_sleep_autotest tests were removed in the
commit ee00af60170b ("test: remove strict timing requirements some tests")
and were wrongly reintroduced later.
Bugzilla ID: 1021 Fixes: 74822233bdc2 ("test: create a list of extra tests") Cc: stable@dpdk.org Signed-off-by: David Marchand <david.marchand@redhat.com>
Bruce Richardson [Fri, 17 Jun 2022 10:59:20 +0000 (11:59 +0100)]
dma/idxd: fix AVX2 in non-datapath functions
While all systems which will use the idxd driver for hardware will
support AVX2, if the driver is present the initialization functions e.g.
to register logs, will be called on all systems - irrespective of HW
support. This can cause issues if the system running DPDK does not have
AVX2, and the compiler has included AVX instructions in the
initialization code.
To fix this, remove AVX2 instruction set from the whole build of the
driver. Instead, we add "target(avx2)" attribute to all datapath
functions, so those - and only those functions - will having AVX2
instructions in them.
Bruce Richardson [Fri, 17 Jun 2022 11:17:50 +0000 (12:17 +0100)]
dma/idxd: fix default for workqueue options
When no --wq-option flag is passed to dpdk_idxd_cfg.py script, the
default value used by argparse is None. This leads to later errors which
are expecting an array value:
TypeError: 'NoneType' object is not iterable
This is fixed by specifying that the empty array should be the default
if no flags are passed.
Fixes: 94b0f04dc0e3 ("dma/idxd: add generic option for queue config") Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Sunil Pai G <sunil.pai.g@intel.com> Acked-by: Conor Walsh <conor.walsh@intel.com>
Tyler Retzlaff [Fri, 20 May 2022 10:12:06 +0000 (03:12 -0700)]
test: enable most driver tests on Windows
Enable most of the driver tests to run on Windows, most tests will be
skipped since the drivers themselves are not available on Windows.
Tests not removed from conditional run:
cryptodev_openssl_asym_autotest
Test fails because it does not bother checking to see if required
driver is available as the other cryptodev tests do.
The test should be updated to fix the issue.
eventdev_selftest_octeontx, eventdev_selftest_sw
Because it has a dependency on eventdev library which doesn't build
on Windows. These should be resolved by including/running the tests
dependent on if dpdk_conf.has('RTE_LIB_EVENT')
dump_xxx tests are still to be evaluated, no attempt has been made
to move these out of conditional run for Windows.