Pavan Nikhilesh [Wed, 3 Nov 2021 00:52:13 +0000 (06:22 +0530)]
event/cnxk: rework enqueue path
Rework SSO enqueue path for CN9K make it similar to CN10K
enqueue interface.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Wed, 3 Nov 2021 00:52:12 +0000 (06:22 +0530)]
event/cnxk: reduce workslot memory consumption
SSO group base addresses are always are always contiguous we
need not store all the base addresses in workslot memory, instead
just store the base address and compute the group address offset
when required.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Wed, 3 Nov 2021 00:52:11 +0000 (06:22 +0530)]
event/cnxk: fix packet Tx overflow
The transmit loop incorrectly assumes that nb_mbufs is always
a multiple of 4 when transmitting an event vector. The max
size of the vector might not be reached and pushed out early
due to timeout.
Fixes:
761a321acf91 ("event/cnxk: support vectorized Tx event fast path")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Wed, 3 Nov 2021 00:52:10 +0000 (06:22 +0530)]
event/cnxk: use common XAQ pool functions
Use the common API to create and free XAQ pool.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Wed, 3 Nov 2021 00:52:09 +0000 (06:22 +0530)]
common/cnxk: add SSO XAQ pool create and free
Add common API to create and free SSO XAQ pool.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Naga Harish K S V [Thu, 28 Oct 2021 10:27:28 +0000 (05:27 -0500)]
test/event: add unit test for Rx adapter
add unit test for rte_event_eth_rx_adapter_queue_stats_get() and
rte_event_eth_rx_adapter_queue_stats_reset() APIs.
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Naga Harish K S V [Thu, 28 Oct 2021 10:27:27 +0000 (05:27 -0500)]
eventdev/eth_rx: support telemetry
Added telemetry support for rxa_queue_stats and
rxa_queue_stats_reset to get and reset rx queue
stats respectively.
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Naga Harish K S V [Thu, 28 Oct 2021 10:27:26 +0000 (05:27 -0500)]
eventdev/eth_rx: add queue stats API
This patch adds new api ``rte_event_eth_rx_adapter_queue_stats_get`` to
retrieve queue stats. The queue stats are in the format
``struct rte_event_eth_rx_adapter_queue_stats``.
For resetting the queue stats,
``rte_event_eth_rx_adapter_queue_stats_reset`` api is added.
The adapter stats_get and stats_reset apis are also updated to
handle queue level event buffer use case.
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Tal Shnaiderman [Thu, 4 Nov 2021 18:48:43 +0000 (20:48 +0200)]
doc: add cryptodev table for supported operating systems
Added table to the crypto device drivers documentation
stating the support of each PMD on Linux, FreeBSD and Windows.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Vidya Sagar Velumuri [Wed, 3 Nov 2021 09:31:08 +0000 (09:31 +0000)]
test/crypto: fix vectors for ZUC-256
Fix the test vectors added for ZUC 256-bit key
Add known vectors form ZUC 256 RFC.
Fixes:
fa5bf9345d4e ("test/crypto: add ZUC cases with 256-bit keys")
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Przemyslaw Zegan [Wed, 3 Nov 2021 15:08:23 +0000 (15:08 +0000)]
common/qat: fix queue pairs number
This patch fixes incorrect number of queue pairs.
Fixes:
4c0d2ee23c39 ("crypto/qat: remove incorrect usage of bundle number")
Cc: stable@dpdk.org
Signed-off-by: Przemyslaw Zegan <przemyslawx.zegan@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:57 +0000 (10:34 +0000)]
crypto/qat: add gen-specific implementation
This patch replaces the mixed QAT symmetric and asymmetric
support implementation by separate files with shared or
individual implementation for specific QAT generation.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:56 +0000 (10:34 +0000)]
crypto/qat: define gen-specific structs and functions
This patch adds the symmetric and asymmetric crypto data
structure and function prototypes for different QAT
generations.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:55 +0000 (10:34 +0000)]
crypto/qat: unify device private data structure
This patch unifies the QAT symmetric and asymmetric device
private data structures and functions.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:54 +0000 (10:34 +0000)]
compress/qat: add gen-specific implementation
This patch replaces the mixed QAT compression support
implementation by separate files with shared or individual
implementation for specific QAT generation.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:53 +0000 (10:34 +0000)]
compress/qat: define gen-specific structs and functions
This patch adds the compression data structure and function
prototypes for different QAT generations.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:52 +0000 (10:34 +0000)]
common/qat: add gen-specific queue implementation
This patch replaces the mixed QAT queue pair configuration
implementation by separate files with shared or individual
implementation for specific QAT generation.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Signed-off-by: Przemyslaw Zegan <przemyslawx.zegan@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:51 +0000 (10:34 +0000)]
common/qat: add gen-specific queue pair function
This patch adds the queue pair data structure and function
prototypes for different QAT generations.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:50 +0000 (10:34 +0000)]
common/qat: add gen-specific device implementation
This patch replaces the mixed QAT device configuration
implementation by separate files with shared or
individual implementation for specific QAT generation.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Fan Zhang [Thu, 4 Nov 2021 10:34:49 +0000 (10:34 +0000)]
common/qat: define gen-specific structs and functions
This patch adds the data structure and function prototypes for
different QAT generations.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Pablo de Lara [Sun, 31 Oct 2021 22:04:21 +0000 (22:04 +0000)]
test/crypto: fix test vectors for ZUC-256
Fix the IV for ZUC-256 test vectors
Fixes:
216125c62d28 ("test/crypto: add ZUC-256 vectors")
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Gowrishankar Muthukrishnan [Thu, 4 Nov 2021 05:11:51 +0000 (10:41 +0530)]
security: add telemetry endpoint for capabilities
Add telemetry endpoint for cryptodev security capabilities.
Details of endpoints added in documentation.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Vidya Sagar Velumuri [Wed, 3 Nov 2021 13:18:53 +0000 (13:18 +0000)]
crypto/cnxk: fix IV length for ZUC-256
Fix supported IV length for ZUC 256
Add support in capability for 4 byte mac len for ZUC 256
Pack the last 8 bytes of IV to 6 bytes by ignoring the 2 msb bits of
each byte.
Fixes:
29742632ac9e ("crypto/cnxk: support ZUC with 256-bit key")
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Vidya Sagar Velumuri [Wed, 3 Nov 2021 13:18:52 +0000 (13:18 +0000)]
common/cnxk: fix ZUC constants
Use appropriate ZUC constants based on key length and mac length
Fixes:
a90db80d7d72 ("common/cnxk: set key length for PDCP algos")
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Raja Zidane [Tue, 2 Nov 2021 09:32:56 +0000 (09:32 +0000)]
crypto/mlx5: support 1MB data-unit
Add 1MB data-unit length to the capability's bitmap.
Handle 1MB data-unit length in the mlx5 session create operation,
and expose its capability in the mlx5 capabilities.
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Rebecca Troy [Fri, 29 Oct 2021 09:04:17 +0000 (09:04 +0000)]
test/crypto: refactor DOCSIS to show hidden cases
In the current implementation, the DOCSIS test cases are running
and being reported as one test, despite the fact that multiple
test cases are hidden inside i.e. "test_DOCSIS_PROTO_all" runs
52 test cases. Each DOCSIS test case should be reported individually
instead.
This commit achieves this by removing the use of the
test_DOCSIS_PROTO_all function and statically listing the test cases
to run when building the test suite, which are then reported to the
user by description.
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Reviewed-by: David Coyle <david.coyle@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Srujana Challa [Wed, 3 Nov 2021 03:24:07 +0000 (08:54 +0530)]
examples/ipsec-secgw: support event vector
Adds event vector support to inline protocol offload mode.
By default vector support is disabled, it can be enabled by
using the option --event-vector.
Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector-size and
--vector-tmo.
Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:15 +0000 (12:58 +0000)]
examples/ipsec-secgw: support additional algorithms
Add support for AES-GMAC, AES_CTR, AES_XCBC_MAC,
AES_CCM, CHACHA20_POLY1305
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:14 +0000 (12:58 +0000)]
examples/ipsec-secgw: add ethdev reset callback
Applications should not quietly ignore an ethdev reset event.
Register an event handler for ethdev reset callback
RTE_ETH_EVENT_INTR_RESET that prints a message and
quits the application.
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:13 +0000 (12:58 +0000)]
examples/ipsec-secgw: define initial ESN value
New option added to the SA configuration arguments that
allows setting an arbitrary start value for ESN.
For example in the SA below ESN will be enabled and first egress
IPsec packet will have the ESN value 10000:
sa out 15 cipher_algo null auth_algo null mode ipv4-tunnel \
src 172.16.1.5 dst 172.16.2.5 \
esn 10000
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:12 +0000 (12:58 +0000)]
examples/ipsec-secgw: support telemetry
Add telemetry support to the IPsec GW sample app and add
support for per SA telemetry when using IPsec library.
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:11 +0000 (12:58 +0000)]
examples/ipsec-secgw: support UDP encap for inline crypto
Enable UDP encapsulation for both transport and tunnel modes for the
inline crypto offload path.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:10 +0000 (12:58 +0000)]
examples/ipsec-secgw: update inline session create
Rework create inline session function as to update the session
configuration parameters before create session is called.
Also updated the rss key array size to prevent buffers overflows
with PMDs that copy more than 40 bytes.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Mon, 1 Nov 2021 12:58:09 +0000 (12:58 +0000)]
examples/ipsec-secgw: add stats interval argument
Add -t for stats screen update interval, disabled by default.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Radu Nicolau [Wed, 3 Nov 2021 11:56:18 +0000 (11:56 +0000)]
examples/ipsec-secgw: move global array from header
When STATS_INTERVAL is set to a non-zero value the
core_statistics array will be defined in multiple
compilation units and this can trigger a linker error
on particular environments. In order to fix this the
core_statistics definition was moved out of the header file.
Fixes:
1329602b6c8f ("examples/ipsec-secgw: add per-core packet statistics")
Cc: stable@dpdk.org
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Jim Harris [Fri, 29 Oct 2021 17:16:22 +0000 (17:16 +0000)]
test/compress-perf: remove unused variable
clang-13 rightfully complains that the total_deq_ops
variable in cperf_cyclecount_op_setup is set but not
used, since the final accumulated total_deq_ops
results isn't used anywhere. So just remove the
total_deq_ops variable.
Fixes:
2695db95a147 ("test/compress: add cycle-count mode to perf tool")
Cc: stable@dpdk.org
Signed-off-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Kiran Kumar K [Fri, 29 Oct 2021 04:36:58 +0000 (10:06 +0530)]
test/crypto-perf: fix memory allocation in asym case
While populating the crypto ops in case of asymmetric, result
is being allocated from stack. This is causing crash in the
application. And operation type is also not being initialized
properly. Adding a fix by allocating the result from global
memory and initialized the operation memory properly.
Fixes:
ba588ce3f9339 ("test/crypto-perf: test asymmetric crypto throughput")
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Archana Muniganti [Thu, 28 Oct 2021 16:52:28 +0000 (22:22 +0530)]
crypto/cnxk: support IPv6 mixed tunnel mode
Adds IPv6 mixed tunnel mode support for cn9k.
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Archana Muniganti [Thu, 28 Oct 2021 16:52:27 +0000 (22:22 +0530)]
crypto/cnxk: update auth key size
Update auth key size in capabilities for to support
SHA256_HMAC for cn9k.
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Archana Muniganti [Thu, 28 Oct 2021 16:52:26 +0000 (22:22 +0530)]
doc: update feature list in CN9K crypto guide
Updated feature list supported with cn9k crypto PMD.
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Archana Muniganti [Thu, 28 Oct 2021 16:52:25 +0000 (22:22 +0530)]
crypto/cnxk: support ESN and anti-replay on CN9K
Adds ESN and anti-replay support for lookaside IPsec
on CN9K platforms.
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Thu, 28 Oct 2021 16:52:24 +0000 (22:22 +0530)]
crypto/cnxk: support null authentication in IPsec
Add null auth support with lookaside IPsec on cn10k crypto PMDs.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Thu, 28 Oct 2021 16:52:23 +0000 (22:22 +0530)]
common/cnxk: add null authentication with IPsec
Add support for null auth with IPsec operations on cn10k.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Thu, 28 Oct 2021 12:22:46 +0000 (13:22 +0100)]
examples/ipsec-secgw: support TCP TSO
Add support to allow user to specific MSS for TCP TSO offload on a per SA
basis. MSS configuration in the context of IPsec is only supported for
outbound SA's in the context of an inline IPsec Crypto offload.
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Radu Nicolau [Thu, 28 Oct 2021 12:22:45 +0000 (13:22 +0100)]
ipsec: support TSO
Add support for transmit segmentation offload to inline crypto processing
mode. This offload is not supported by other offload modes, as at a
minimum it requires inline crypto for IPsec to be supported on the
network interface.
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Signed-off-by: Abhijit Sinha <abhijit.sinha@intel.com>
Signed-off-by: Daniel Martin Buckley <daniel.m.buckley@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tejasree Kondoj [Thu, 28 Oct 2021 11:11:11 +0000 (16:41 +0530)]
crypto/octeontx2: fix lookaside IPsec IPv6
Fixing IPv6 mixed tunnel mode support by updating
inputs to firmware.
Fixes:
4edede7bc6ee ("crypto/octeontx2: support lookaside IPsec IPv6")
Cc: stable@dpdk.org
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Fan Zhang [Thu, 28 Oct 2021 10:22:00 +0000 (11:22 +0100)]
examples/fips_validation: fix device start
This patch fixes the missing device start for fips validation
sample app.
Bugzilla ID: 842
Fixes:
261bbff75e34 ("examples: use separate crypto session mempools")
Cc: stable@dpdk.org
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Archana Muniganti [Thu, 28 Oct 2021 07:22:46 +0000 (12:52 +0530)]
crypto/octeontx2: fix ESN seqhi
For current pkt, previous seqhi is used instead of its
guessed seqhi. Fixed it.
Fixes:
5be562bc5b78 ("crypto/octeontx2: support IPsec ESN and anti-replay")
Cc: stable@dpdk.org
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Raja Zidane [Tue, 26 Oct 2021 01:52:42 +0000 (01:52 +0000)]
compress/mlx5: add block size option
Currently, the compression block size is 15 by default, which
is the maximum.
Add "log-block-size" devarg to select compression block size manually.
The value provided should be between 4 to 15.
Any out-of-range value will be defaulted to 15.
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Raja Zidane [Tue, 26 Oct 2021 01:52:41 +0000 (01:52 +0000)]
compress/mlx5: fix compression level configuration
The mlx5 compress PMD uses HW acceleration for the compress operations.
The mlx5 HW device has no level style mode, which does a tradeoff between
throughput and compression ratio, unlike SW drivers where the CPU is doing
the compress, and more CPU effort can cause a better compression ratio.
The mlx5 driver wrongly defined the Huffman block size configuration
according to the level that doesn't fill the level API requirement for
the tradeoff.
Remove the effect of the level configuration in compress operation.
Fixes:
237aad88245b ("compress/mlx5: fix compression level translation")
Fixes:
39a2c8715f8f ("compress/mlx5: add transformation operations")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Kiran Kumar K [Mon, 25 Oct 2021 04:00:04 +0000 (09:30 +0530)]
crypto/cnxk: fix bus error on RSA verify
While creating RSA session, private key length is not being
calculated properly. This is causing bus error on RSA verify.
This patch fix the issue with length calculation.
Fixes:
5a3513caeb455 ("crypto/cnxk: add asymmetric session")
Cc: stable@dpdk.org
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Arek Kusztal [Thu, 21 Oct 2021 10:06:01 +0000 (11:06 +0100)]
crypto/qat: fix uncleared cookies after operation
This commit fixes uncleared cookies issue when using
RSA algorithm.
Fixes:
e2c5f4ea994c ("crypto/qat: support RSA in asym")
Cc: stable@dpdk.org
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Arek Kusztal [Thu, 21 Oct 2021 10:05:43 +0000 (11:05 +0100)]
crypto/qat: fix status in RSA decryption
This commit fixes not set crypto op status when decrypting
with RSA algorithm.
Fixes:
e2c5f4ea994c ("crypto/qat: support RSA in asym")
Cc: stable@dpdk.org
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Chandubabu Namburu [Thu, 21 Oct 2021 06:17:17 +0000 (06:17 +0000)]
maintainers: update for AMD CCP
Updating AMD CCP crypto maintainer.
Signed-off-by: Chandubabu Namburu <chandu@amd.com>
Acked-by: Somalapuram Amaranath <asomalap@amd.com>
Kai Ji [Fri, 8 Oct 2021 11:33:45 +0000 (12:33 +0100)]
test/crypto: fix max length for raw data path
Update the calculation of the max length needed when converting mbuf to
data vec in partial digest test case. This update make sure the enough
vec buffers are allocated for the appended digest in sgl op for raw
datapath api.
Fixes:
4868f6591c6f ("test/crypto: add cases for raw datapath API")
Cc: stable@dpdk.org
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Nicolas Chautru [Tue, 31 Aug 2021 16:25:30 +0000 (09:25 -0700)]
bbdev: promote API as stable
This promotes the bbdev interface to stable.
Overdue for some time as bbdev interface has been stable.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:17 +0000 (11:46 +0300)]
crypto/mlx5: support on Windows
Add support for mlx5 crypto pmd on Windows OS.
Add changes to release note and PMD guide.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:16 +0000 (11:46 +0300)]
drivers/crypto: move Windows build check
Remove the check and build failure from crypto/meson.build
in case building for Windows OS.
Add this check/failure in the meson.build file of each crypto PMD
that is not enforcing it to allow PMD support for Windows
per driver when applicable.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:15 +0000 (11:46 +0300)]
crypto/mlx5: fix size of UMR WQE
The size of the UMR WQE allocated object is decided by a sizof
operation on the struct, however since the struct contains
a union of flexible array members this sizeof results can differ
between compilers.
GCC for example treats the union as 0 sized, MSVC adds a padding
of 16Bits.
To resolve the ambiguity the allocation size will be calculated
by the sizes of the members excluding the flexible union.
Fixes:
a1978aa23bf4 ("crypto/mlx5: add maximum segments configuration")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:14 +0000 (11:46 +0300)]
crypto/mlx5: replace mutex initializer
Remove the usage of PTHREAD_MUTEX_INITIALIZER which is not
supported in Windows and initialize priv_list_lock in RTE_INIT.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tal Shnaiderman [Mon, 25 Oct 2021 08:46:13 +0000 (11:46 +0300)]
common/mlx5: add Direct Verbs constants for Windows
Add needed DV enums used by the crypto PMD and missing
for Windows OS.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Gowrishankar Muthukrishnan [Tue, 26 Oct 2021 13:13:10 +0000 (18:43 +0530)]
cryptodev: add telemetry endpoint for capabilities
Add telemetry endpoint for getting cryptodev capabilities.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Rebecca Troy [Tue, 26 Oct 2021 12:00:45 +0000 (12:00 +0000)]
cryptodev: support telemetry
The cryptodev library now registers commands with telemetry, and
implements the corresponding callback functions. These commands
allow a list of cryptodevs to be queried, as well as info and stats
for the corresponding cryptodev.
An example usage can be seen below:
Connecting to /var/run/dpdk/rte/dpdk_telemetry.v2
{"version": "DPDK 21.11.0-rc0", "pid":
1135019, "max_output_len": 16384}
--> /
{"/": ["/", "/cryptodev/info", "/cryptodev/list", "/cryptodev/stats", ...]}
--> /cryptodev/list
{"/cryptodev/list": [0,1,2,3]}
--> /cryptodev/info,0
{"/cryptodev/info": {"device_name": "0000:1c:01.0_qat_sym", \
"max_nb_queue_pairs": 2}}
--> /cryptodev/stats,0
{"/cryptodev/stats": {"enqueued_count": 0, "dequeued_count": 0, \
"enqueue_err_count": 0, "dequeue_err_count": 0}}
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Harman Kalra [Wed, 3 Nov 2021 17:50:56 +0000 (23:20 +0530)]
doc: remove deprecation notice for interrupt
Deprecation notice targeted for 21.11 has been committed with
following as the first commit of the series.
Fixes:
b7c984291611 ("interrupts: add allocator and accessors")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Viacheslav Galaktionov [Wed, 3 Nov 2021 13:13:31 +0000 (16:13 +0300)]
net/sfc: allow control threads for counter queue polling
MAE counters can be polled from a control thread if no service core is
allocated for this.
Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Andrew Rybchenko [Tue, 2 Nov 2021 13:13:40 +0000 (16:13 +0300)]
net/sfc: merge Rx and Tx doorbell counters into one
Datapath queue is either Rx or Tx, so just one counter is sufficient
for doorbells. It can count Tx doorbells in the case of Tx queue and
Rx doorbells in the case of Rx queue.
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Gregory Etelson [Thu, 4 Nov 2021 16:00:14 +0000 (18:00 +0200)]
doc: add flow flex item to default NIC features
Flex item or flex parser is port infrastructure that allows
application to add support for a custom network header and
offload flows to match the header elements.
Flex item API adds FLEX flow item to RTE flows.
Fixes:
dc4d860e8a89 ("ethdev: introduce configurable flexible item")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Jiawen Wu [Tue, 2 Nov 2021 08:10:25 +0000 (16:10 +0800)]
net/txgbe: fix packet statistics
Fix specific length packet statistics caused by wrong register
addresses.
Fixes:
24a4c76aff4d ("net/txgbe: add error types and registers")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Huisong Li [Tue, 2 Nov 2021 01:38:29 +0000 (09:38 +0800)]
net/hns3: refactor multi-process initialization
Currently, the logic of the PF and VF initialization codes for multiple
process is the same. A common function can be extracted to initialize
and unload multiple process.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Tue, 2 Nov 2021 01:38:28 +0000 (09:38 +0800)]
net/hns3: unregister MP action on close for secondary
This patch fixes lack of unregistering MP action for secondary process
when PMD is closed.
Fixes:
9570b1fdbdad ("net/hns3: check multi-process action register result")
Fixes:
23d4b61fee5d ("net/hns3: support multiple process")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Tue, 2 Nov 2021 01:38:27 +0000 (09:38 +0800)]
net/hns3: fix multi-process action register and unregister
The multi-process has the following problems:
1) After a port in primary process is closed, the mp action of the
process is unregistered. Which will cause that other device in the
primary process cannot respond to requests from secondary processes.
2) Because variable "hns3_inited" is set to true without returning an
initial value, the mp action cannot be registered again after it is
unregistered.
3) The mp action of primary and secondary process need to be registered
only once regardless of port numbers in the process. That's what
variable "hns3_inited" does. But the variable is difficult to
understand.
This patch adds a hns3_process_local_data structure to resolve above
problems.
Fixes:
9570b1fdbdad ("net/hns3: check multi-process action register result")
Fixes:
23d4b61fee5d ("net/hns3: support multiple process")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Tue, 2 Nov 2021 01:38:26 +0000 (09:38 +0800)]
net/hns3: fix secondary process reference count
The "secondary_cnt" will be increased when a secondary process
initialized. But the value of this variable is not decreased when the
secondary process exits, which causes the primary process senses that
the secondary process still exists. As a result, the primary process
fails to send messages to the secondary process after the secondary
process exits.
Fixes:
23d4b61fee5d ("net/hns3: support multiple process")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Dapeng Yu [Thu, 4 Nov 2021 08:45:35 +0000 (16:45 +0800)]
net/ice: fix flow redirect
It's possible that a switch rule can't be redirect successfully due
to kernel driver is busy to handle an ongoing VF reset, so the
redirect action need to be deferred into next redirect request which
is promised by kernel driver after VF reset done.
This patch uses the saved flow rule's data to replay switch rule
remove/add during next flow redirect.
Fixes:
397b4b3c5095 ("net/ice: enable flow redirect on switch")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Dapeng Yu [Thu, 4 Nov 2021 08:45:34 +0000 (16:45 +0800)]
net/ice: save rule on switch filter creation
The VSI number, lookup elements and rule information for creating switch
filter are abandoned when switch filter is created in original
implementation.
This patch saved the abandoned data in RTE flow, it is for future
use on replay when handling exception at flow redirect.
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Yuying Zhang [Tue, 2 Nov 2021 10:45:05 +0000 (10:45 +0000)]
net/ice: fix order of flow filter parser list
The order of flow filter parser list was not definite and
linked to the register order of parsers. It caused ACL filter
covered by switch filter in some cases.
This patch fixed order of parser list to guarantee the usage
of each filter. Below lists the order.
ACL filter > Switch filter > FDIR > Hash filter.
Fixes:
e4a0a7599d97 ("net/ice: fix flow priority support in non-pipeline mode")
Cc: stable@dpdk.org
Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Gregory Etelson [Thu, 4 Nov 2021 11:27:21 +0000 (13:27 +0200)]
ethdev: fix variable length flow elements support
RTE flow API defines two flow elements types - common and PMD private.
Common RTE flow types are defined in rte_flow.h while PMD private
types exists inside specific PMD only. Application can create a flow
rule with PMD private items or actions. RTE flow API restricts
private PMD types to negative values.
Current implementation tried to use negative PMD private item type
value as index in the rte_flow_desc_item[] array.
The patch allows access to rte_flow_desc_item[] and
rte_flow_desc_action[] arrays to non-private PMD types only.
Fixes:
6cf72047332b ("ethdev: support flow elements with variable length")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Tudor Cornea [Tue, 2 Nov 2021 15:47:24 +0000 (17:47 +0200)]
net/af_packet: fix ignoring full ring on Tx
The poll call can return POLLERR which is ignored, or it can return
POLLOUT, even if there are no free frames in the mmap-ed area.
We can account for both of these cases by re-checking if the next
frame is empty before writing into it.
We have attempted to reproduce this issue with pktgen-dpdk, using the
following configuration.
pktgen -l 1-4 -n 4 --proc-type=primary --no-pci --no-telemetry \
--no-huge -m 512 \
--vdev=net_af_packet0,iface=eth1,blocksz=16384,framesz=8192, \
framecnt=2048,qpairs=1,qdisc_bypass=0 \
-- \
-P \
-T \
-m "3.0" \
-f themes/black-yellow.theme
We configure a low tx rate (~ 335 packets / second) and a small
packet size, of about 300 Bytes from the pktgen CLI.
set 0 size 300
set 0 rate 0.008
set 0 burst 1
start 0
After bringing the interface down, and up again, we seem to arrive
in a state in which the tx rate is inconsistent, and does not recover.
ifconfig eth1 down; sleep 7; ifconfig eth1 up
[1] http://code.dpdk.org/pktgen-dpdk/pktgen-20.11.2/source/INSTALL.md
Fixes:
364e08f2bbc0 ("af_packet: add PMD for AF_PACKET-based virtual devices")
Cc: stable@dpdk.org
Signed-off-by: Mihai Pogonaru <pogonarumihai@gmail.com>
Signed-off-by: Tudor Cornea <tudor.cornea@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Igor Romanov [Fri, 29 Oct 2021 15:33:30 +0000 (18:33 +0300)]
net/sfc: support Xilinx Riverhead VF
Add the device and vendor numbers to the PCI ID map so
that a VF can be probed.
Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
John Daley [Thu, 28 Oct 2021 20:04:24 +0000 (13:04 -0700)]
net/enic: support GTP header flow matching
The GTP, GTP-U, GTP-C header fields can be matched, however NIC does not
support GTP tunneling so no items after the GTP header can be specified.
If a GTP-U or GTP-C item is specified without a preceding UDP item, the
UDP destination port is implicitly matched. For GTP, the destination UDP
port must be specified but its value is not enforced.
Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
Thomas Monjalon [Thu, 28 Oct 2021 08:35:13 +0000 (10:35 +0200)]
ethdev: promote device removal check function as stable
The function rte_eth_dev_is_removed() was introduced in DPDK 18.02,
and is integrated in error checks of ethdev library.
It is promoted as stable ABI.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ting Xu [Thu, 4 Nov 2021 02:22:28 +0000 (10:22 +0800)]
net/ice: enable protocol agnostic flow offloading in RSS
Enable protocol agnostic flow offloading to support raw pattern input
for RSS hash flow rule creation. It is based on Parser Library feature.
Current rte_flow raw API is utilized.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Ting Xu [Thu, 4 Nov 2021 02:22:27 +0000 (10:22 +0800)]
net/ice/base: support add HW profile for RSS raw flow
Based on the parser library, we can directly set HW profile and
associate VSI for RSS raw flows. Add symmetric hash configuration
for raw flow.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Hyong Youb Kim [Tue, 26 Oct 2021 00:04:18 +0000 (17:04 -0700)]
net/enic: avoid error message when no advanced filtering
Probing the availability of Flow Manager API may print the following
error log.
PMD: rte_enic_pmd: Devcmd 88 failed with error code -1
The error indicates a flow manager operation failed and happens when
advanced filtering is disabled on vNIC. It is harmless but confusing
to the user. Since advanced filtering is a prerequisite, check first
if it is available and avoid the error message altogether.
Fixes:
ea7768b5bba8 ("net/enic: add flow implementation based on Flow Manager API")
Cc: stable@dpdk.org
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
Hyong Youb Kim [Tue, 26 Oct 2021 00:02:56 +0000 (17:02 -0700)]
net/enic: fix crash caused by changing MTU
Changing MTU after the device start causes a segfault in the Rx
handler. The MTU handler (enic_set_mtu) performs the following steps.
1. Stop NIC Rx
2. Change Rx handler '(struct rte_eth_dev)->rx_pkt_burst' to
the dummy handler and sleep a while to quiesce
3. Re-allocate/initialize Rx structures
4. Change Rx handler back to the real handler
(e.g. enic_noscatter_recv_pkts)
enic_set_mtu does not update the recently introduced fast-path pointer
'(struct rte_eth_fp_ops)->rx_pkt_burst'. Since rte_eth_rx_burst only
uses the fast-path pointer, it keeps invoking the real Rx handler, not
the dummy one set by (2). And, (3) causes a segfault in the real Rx
handler (e.g. dereferencing freed structures).
Fix the segfault by updating the fast-path pointer as well.
Fixes:
c87d435a4d79 ("ethdev: copy fast-path API into separate structure")
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
Tomasz Duszynski [Tue, 2 Nov 2021 18:41:34 +0000 (19:41 +0100)]
doc: add BPHY to list of cnxk platform blocks
Add BPHY to the list of platform hardware accelerator blocks.
Fixes:
3d27e49e0722 ("raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Tue, 2 Nov 2021 18:41:33 +0000 (19:41 +0100)]
raw/cnxk_bphy: add header includes
Generally it is good practice to include all headers that provide APIs
which are being used. This is especially true in situations where 3rd
party apps include our public headers and assume that all should work
out of the box.
Including all headers explicitly helps to achieve that.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Tue, 2 Nov 2021 18:41:32 +0000 (19:41 +0100)]
raw/cnxk_bphy: keep leading zero in device name
Device naming might be misleading which is especially true if one takes
it from lspci output. In order to keep naming consistent keep leading
zero in front of pci bus number.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Rakesh Kudurumalla [Tue, 2 Nov 2021 06:41:36 +0000 (12:11 +0530)]
net/cnxk: integrate BPF count get mailbox
Bandwidth profile count is updated in meter capabilities during device
initialization using mbox interface.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Jakub Palider [Tue, 2 Nov 2021 18:41:31 +0000 (19:41 +0100)]
raw/cnxk_bphy: remove dependencies from internal headers
This patch resolves problem with internal header
inclusion. In addition prevents C++ name mangling.
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Harman Kalra [Wed, 3 Nov 2021 07:59:14 +0000 (13:29 +0530)]
common/cnxk: fix device MSI-X greater than default value
Handling the case where number of MSIX interrupts are greater
than default value i.e. PLT_MAX_RXTX_INTR_VEC_ID. On PCI probe
device is queried for supported MSIX interrupts, and respective
interrupt resources are reallocated with this value. Same MSIX
count should be used while registering new interrupt vectors.
Fixes:
8cb5d08db940 ("interrupts: extend event list")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Tue, 2 Nov 2021 18:47:13 +0000 (19:47 +0100)]
common/cnxk: fix typos
Fix a few typos.
Fixes:
fa8f86a14e2e ("common/cnxk: add build infrastructre and HW definition")
Fixes:
f6d567b03d28 ("common/cnxk: support NIX IRQ")
Fixes:
5e076b609f2a ("common/cnxk: add SE set key for crypto")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Satha Rao [Mon, 1 Nov 2021 07:28:57 +0000 (03:28 -0400)]
common/cnxk: consider adjust value for TM burst calculation
To support lower pps in packet mode we are changing adjust value,
same needs to be consider for burst size calculations.
When both peak and committed rates requested, then peak rate should
be larger than committed rate.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Rakesh Kudurumalla [Tue, 2 Nov 2021 06:41:35 +0000 (12:11 +0530)]
common/cnxk: change policer time unit to configured value
Ingress meter rate is calculated based on hardcoded
policer time unit. Patch adds mbox interface to
retrieve configured policer time unit.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nithin Dabilpuram [Tue, 2 Nov 2021 15:54:20 +0000 (21:24 +0530)]
event/cnxk: disable drop Rx error on vector enable
Disable drop_re i.e dropping packets with receive errors on
vector enable for few cn10k revisions due to HW errata.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nithin Dabilpuram [Tue, 2 Nov 2021 15:54:19 +0000 (21:24 +0530)]
net/cnxk: allow FC on LBK and enable TM BP on Rx pause
Allow flow control on LBK VF's and enable TM to listen on
backpressure when Rx pause is enabled.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Srujana Challa [Tue, 2 Nov 2021 15:54:18 +0000 (21:24 +0530)]
net/cnxk: support CPT CTX write through microcode op
Adds support to write CPT CTX through microcode op(SET_CTX/WRITE_SA)
for cn10k inline mode.
Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nithin Dabilpuram [Tue, 2 Nov 2021 15:54:17 +0000 (21:24 +0530)]
common/cnxk: support changing drop Rx error flag
Added API to toggle drop_re flag after nix_lf_alloc() so that it
can be used to toggle it runtime.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nithin Dabilpuram [Tue, 2 Nov 2021 15:54:16 +0000 (21:24 +0530)]
common/cnxk: enable backpressure on CPT with inline inbound
Enable backpressure on CPT with inline inbound enabled.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nithin Dabilpuram [Tue, 2 Nov 2021 15:54:15 +0000 (21:24 +0530)]
common/cnxk: enable TM to listen on Rx pause frames
Enable TM topology to listen on backpressure received when
Rx pause frame is enabled. Only one TM node in Tl3/TL2 per
channel can listen on backpressure on that channel.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Nithin Dabilpuram [Tue, 2 Nov 2021 15:54:14 +0000 (21:24 +0530)]
common/cnxk: support flow control on loopback interface
Support flow control enable/disable on LBK VF's as HW
supports backpressure on LBK links.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>