Vamsi Attunuru [Tue, 4 Feb 2020 11:17:25 +0000 (16:47 +0530)]
net/octeontx2: sync inline tag type
Tag type configuration for the inline processed packets is set during
ethdev configuration, it might conflict with tag type configuration
done during Rx adapter configuration which would be setup later.
This conflict is fixed as part of flow rule creation by updating
tag type config of inline same as Rx adapter configured tag type.
examples/ipsec-secgw: get rid of maximum SP limitation
Get rid of maximum SP limitation.
Keep parsed SP's into the sorted by SPI value array.
Use binary search in the sorted SP array to find appropriate SP
for a given SPI.
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com> Acked-by: Anoob Joseph <anoobj@marvell.com>
examples/ipsec-secgw: get rid of maximum SA limitation
Get rid of maximum SA limitation.
Keep parsed SA's into the sorted by SPI value array.
Use binary search in the sorted SA array to find appropriate SA
for a given SPI.
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com> Acked-by: Anoob Joseph <anoobj@marvell.com>
1. Use SAD library for inbound SA lookup
2. Changes in struct sa_ctx:
- sa array allocates dynamically depending on number of configured sa
- All SA's are kept one by one without using SPI2IDX
3. SP's userdata now contain index of SA in sa_ctx instead of SPI
4. Get rid of SPI2IDX macro
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com> Acked-by: Anoob Joseph <anoobj@marvell.com>
Gagandeep Singh [Mon, 27 Jan 2020 09:07:23 +0000 (14:37 +0530)]
crypto/dpaa_sec: fix IOVA conversions
DPAA sec driver is using virtual to physical address
translation in its data path and driver is using
dpaax_iova_table_update() API in every address translation
which is very costly.
This patch moves dpaax_iova_table_update() calling to rte_dpaa_mem_ptov(),
only if it fails to found translation from DPAAX table.
Artur Trybula [Wed, 11 Dec 2019 15:50:00 +0000 (16:50 +0100)]
test/compress: add cycle-count mode to perf tool
This commit adds cycle-count mode to the compression perf tool.
The new mode enhances the compression performance tool to allow
cycle-count measurement of both hardware and softwate PMDs.
Signed-off-by: Artur Trybula <arturx.trybula@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Ruifeng Wang [Thu, 23 Jan 2020 03:45:57 +0000 (11:45 +0800)]
crypto/armv8: fix clang build
1. Clang requires braces around initialization of subobject.
2. Clang complains implicit conversion of enumeration type.
Trapped issue with Clang version 8.0 and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO
was set.
Error messages:
rte_armv8_pmd.c:144:2: error: suggest braces around initialization of
subobject [-Werror,-Wmissing-braces]
NULL
^~~~
{ }
/usr/lib/llvm-8/lib/clang/8.0.0/include/stddef.h:105:16: note: expanded
from macro 'NULL'
^~~~~~~~~~
rte_armv8_pmd.c:429:21: error: implicit conversion from enumeration
type 'enum rte_crypto_cipher_operation' to different enumeration type
'enum armv8_crypto_cipher_operation' [-Werror,-Wenum-conversion]
cop = sess->cipher.direction;
~ ~~~~~~~~~~~~~^~~~~~~~~
Fixes: 169ca3db550c ("crypto/armv8: add PMD optimized for ARMv8 processors") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Ruifeng Wang [Thu, 23 Jan 2020 03:45:53 +0000 (11:45 +0800)]
crypto/armv8: link to library hosted by Arm
Armv8 crypto PMD linked to armv8_crypto library created by Marvell.
Maintenance of armv8_crypto library will be discontinued.
Change Armv8 PMD to link to AArch64 crypto library hosted by Arm.
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Adam Dybkowski [Mon, 20 Jan 2020 13:11:46 +0000 (14:11 +0100)]
test/crypto: refactor unit tests into one combined array
This patch refactors most of unit tests to be contained in one
combined array, and run depending on the PMD capabilities instead of
providing multiple array with tests for individual PMDs.
Only a subset of unit tests was merged into one array - it combines
all tests originally meant to be run on these PMDs:
null, aesni_mb, aesni_gcm, openssl, qat, sw_snow3g, sw_kasumi, sw_zuc.
Adam Dybkowski [Mon, 20 Jan 2020 13:11:45 +0000 (14:11 +0100)]
test/crypto: add capability checks
This patch adds capability checks to many tests meant to be run
in the future on various PMDs. This way the code is prepared for
more thorough refactoring in order to create one big central
unit tests array.
Adam Dybkowski [Mon, 20 Jan 2020 13:11:44 +0000 (14:11 +0100)]
test/crypto: refactor unit tests
This patch gets rid of individual functions that all call
test_blockcipher_all_tests separately for every PMD and instead
provides just one set universal for all PMDs that's basing on the
driver id from the global variable gbl_driver_id.
Pablo de Lara [Mon, 20 Jan 2020 11:47:56 +0000 (11:47 +0000)]
crypto/snow3g: use IPsec library
Link against Intel IPsec Multi-buffer library, which
added support for SNOW3G-UEA2 and SNOW3G-UIA2 from version v0.53,
moving from libSSO SNOW3G library.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Maxime Coquelin [Thu, 16 Jan 2020 10:44:27 +0000 (11:44 +0100)]
vhost: catch overflow causing mmap of size 0
This patch catches an overflow that could happen if an
invalid region size or page alignment is provided by the
guest via the VHOST_USER_SET_MEM_TABLE request.
If the sum of the size to mmap and the alignment overflows
uint64_t, then RTE_ALIGN_CEIL(mmap_size, alignment) macro
will return 0. This value was passed as is as size argument
to mmap().
While kernel handling of mmap() syscall returns an error
if size is 0, it is better to catch it earlier and provide
a meaningful error log.
Fixes: ec09c280b839 ("vhost: fix mmap not aligned with hugepage size") Cc: stable@dpdk.org Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Eugenio Pérez [Wed, 29 Jan 2020 19:33:10 +0000 (20:33 +0100)]
vhost: flush shadow Tx if no more packets
The current implementation of vhost_net in packed vring tries to fill
the shadow vector before send any actual changes to the guest. While
this can be beneficial for the throughput, it conflicts with some
bufferfloats methods like the linux kernel napi, that stops
transmitting packets if there are too much bytes/buffers in the
driver.
To solve it, we flush the shadow packets at the end of
virtio_dev_tx_packed if we have starved the vring, i.e. the next
buffer is not available for the device.
Since this last check can be expensive because of the atomic, we only
check it if we have not obtained the expected "count" packets. If it
happens to obtain "count" packets and there is no more available
packets the caller needs to keep call virtio_dev_tx_packed again.
Fixes: 31d6c6a5b820 ("vhost: optimize packed ring dequeue") Cc: stable@dpdk.org Signed-off-by: Eugenio Pérez <eperezma@redhat.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Vitaliy Mysak [Thu, 30 Jan 2020 08:05:39 +0000 (09:05 +0100)]
vhost: do not treat empty socket message as error
According to recvmsg() specification, 0 is a valid
return code when client is disconnecting.
Therefore, it should not be reported as error, unless there
are other dependencies that require message to not be empty.
But there are none, since the next immediate caller of recvmsg()
reports "vhost peer closed" info (not error) when message is empty.
This patch changes return code check for recvmsg() so that
misleading error message is not printed when the code is 0.
Zhike Wang [Thu, 16 Jan 2020 02:07:37 +0000 (10:07 +0800)]
vhost: fix crash on port deletion
The vhost_user_read_cb() and rte_vhost_driver_unregister()
can be called at the same time by 2 threads. Eg thread1
calls vhost_user_read_cb() and removes the vsocket from
conn_list, then thread2 calls rte_vhost_driver_unregister()
and frees the vsocket since it is NOT in the conn_list.
So thread1 will access invalid memory when trying to
reconnect.
The fix is to move the "removing of vsocket from conn_list"
to end of the vhost_user_read_cb(), then avoid the race
condition.
The core trace is:
Program terminated with signal 11, Segmentation fault.
Fixes: af1475918124 ("vhost: introduce API to start a specific driver") Cc: stable@dpdk.org Signed-off-by: Zhike Wang <wangzhike@jd.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Dekel Peled [Wed, 5 Feb 2020 06:42:02 +0000 (08:42 +0200)]
net/mlx5: fix dirty array of actions
Previous patch changed the format of struct
mlx5_flow_dv_modify_hdr_resource, to use a flexible array for
modification actions.
In __flow_dv_translate() a union was defined with item of this struct,
and an array of maximal possible size.
Array elements are filled in several functions.
In function flow_dv_convert_action_set_reg(), array element is filled
partially, while the other fields of this array element are left
uninitialized.
This may cause failure of flow_dv_modify_hdr_resource_register()
when calling driver function with the 'dirty' array.
This patch updates flow_dv_convert_action_set_reg(), setting the
selected array element fields while clearing the other fields.
Other functions that fill the same array elements are also updated
for clarity and proofing future use.
Michael Baum [Tue, 4 Feb 2020 13:36:09 +0000 (15:36 +0200)]
net/mlx5: fix memory regions release deadlock
The mpx5 PMD maintains the list of devices for those the memory
operation callback routines must be invoked to keep the device MRs (MR
is the entity backing the hardware DMA transactions) consistent with the
mapped memory.
Each device context in the list is protected with dedicated lock on per
device basis, which might be taken inside the callback routine.
When device is closing the PMD frees all MRs by calling
mlx5_mr_release(), that might call rte_free() under the taken device
lock. If this rte_free call triggers the entire memory segment freeing
it, in its turn, invokes the callback routine and attempt to take the
lock inside this one causes the deadlock.
The patch proposes the remove the device from the callback list first
and then call mlx5_mr_release() and free the remaining device MRs
explicitly.
Wei Hu (Xavier) [Tue, 21 Jan 2020 11:44:33 +0000 (19:44 +0800)]
app/testpmd: fix uninitialized members when setting PFC
Only a part of members in the local structure variable named pfc_conf
are initialized in the function named cmd_priority_flow_ctrl_set_parsed
when typing "set pfc_ctrl..." command, and others are random values.
However, those uninitialized members may cause failure.
This patch adds clearing zero operation before calling the API named
rte_eth_dev_priority_flow_ctrl_set API with pfc_conf as the input
parameter.
Fixes: 9b53e542e9e1 ("app/testpmd: add priority flow control") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Xuan Li <lixuan47@hisilicon.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Wei Hu (Xavier) [Tue, 21 Jan 2020 11:44:32 +0000 (19:44 +0800)]
app/testpmd: fix initial value when setting PFC
Currently, the initial values of the local structure variable named
rx_tx_onoff_2_lfc_mode and rx_tx_onoff_2_pfc_mode are different in the
similar part of these two following functions:
cmd_link_flow_ctrl_set_parsed
cmd_priority_flow_ctrl_set_parsed
1) The code snippset in cmd_link_flow_ctrl_set_parsed function:
static enum rte_eth_fc_mode rx_tx_onoff_2_lfc_mode[2][2] = {
{RTE_FC_NONE, RTE_FC_TX_PAUSE}, {RTE_FC_RX_PAUSE, RTE_FC_FULL}
};
fc_conf.mode = rx_tx_onoff_2_lfc_mode[rx_fc_en][tx_fc_en];
<...>
ret = rte_eth_dev_flow_ctrl_set(res->port_id, &fc_conf);
<...>
2) The code snippset in cmd_priority_flow_ctrl_set_parsed function:
static enum rte_eth_fc_mode rx_tx_onoff_2_pfc_mode[2][2] = {
{RTE_FC_NONE, RTE_FC_RX_PAUSE}, {RTE_FC_TX_PAUSE, RTE_FC_FULL}
};
rx_fc_enable = (!strncmp(res->rx_pfc_mode, "on",2)) ? 1 : 0;
tx_fc_enable = (!strncmp(res->tx_pfc_mode, "on",2)) ? 1 : 0;
pfc_conf.fc.mode =
rx_tx_onoff_2_pfc_mode[rx_fc_enable][tx_fc_enable];
<...>
ret = rte_eth_dev_priority_flow_ctrl_set(res->port_id, &pfc_conf);
<...>
The initial value of rx_tx_onoff_2_pfc_mode is wrong, it should be the
same as rx_tx_onoff_2_lfc_mode.
Fixes: 9b53e542e9e1 ("app/testpmd: add priority flow control") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Xuan Li <lixuan47@hisilicon.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ori Kam [Tue, 4 Feb 2020 13:39:46 +0000 (13:39 +0000)]
app/testpmd: fix copy of dynamic flag name
When working with testpmd and setting the dynflag name, we copy the
name given by the cmd to the dynflag name.
The issue is that the size of the dynflag name is smaller then the
string used by testpmd.
This commit solves this issue by checking that the length of the requested
flag name is not too long.
Coverity issue: 353610 Fixes: b57b66a97ebf ("app/testpmd: support mbuf dynamic flag") Signed-off-by: Ori Kam <orika@mellanox.com> Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
Matan Azrad [Sun, 2 Feb 2020 16:03:53 +0000 (16:03 +0000)]
vdpa/mlx5: disable RoCE
In order to support virtio queue creation by the FW, RoCE mode
should be disabled in the device.
Do it by netlink which is like the devlink tool commands:
1. devlink dev param set pci/[pci] name enable_roce value false
cmode driverinit
2. devlink dev reload pci/[pci]
Or by sysfs which is like:
echo 0 > /sys/bus/pci/devices/[pci]/roce_enable
The IB device is matched again after ROCE disabling.
Matan Azrad [Sun, 2 Feb 2020 16:03:51 +0000 (16:03 +0000)]
vdpa/mlx5: support live migration
Add support for live migration feature by the HW:
Create a single Mkey that maps the memory address space of the
VHOST live migration log file.
Modify VIRTIO_NET_Q object and provide vhost_log_page,
dirty_bitmap_mkey, dirty_bitmap_size, dirty_bitmap_addr
and dirty_bitmap_dump_enable.
Modify VIRTIO_NET_Q object and move state to SUSPEND.
Query VIRTIO_NET_Q and get hw_available_idx and hw_used_idx.
Matan Azrad [Sun, 2 Feb 2020 16:03:50 +0000 (16:03 +0000)]
vdpa/mlx5: map doorbell
The HW supports only 4 bytes doorbell writing detection.
The virtio device set only 2 bytes when it rings the doorbell.
Map the virtio doorbell detected by the virtio queue kickfd to the HW
VAR space when it expects to get the virtio emulation doorbell.
Use the EAL interrupt mechanism to get notification when a new event
appears in kickfd by the guest and write 4 bytes to the HW doorbell space
in the notification callback.
Matan Azrad [Sun, 2 Feb 2020 16:03:47 +0000 (16:03 +0000)]
vdpa/mlx5: support stateless offloads
Add support for the next features in virtq configuration:
VIRTIO_F_RING_PACKED,
VIRTIO_NET_F_HOST_TSO4,
VIRTIO_NET_F_HOST_TSO6,
VIRTIO_NET_F_CSUM,
VIRTIO_NET_F_GUEST_CSUM,
VIRTIO_F_VERSION_1,
These features support depends in the DevX capabilities reported by the
device.
Matan Azrad [Sun, 2 Feb 2020 16:03:46 +0000 (16:03 +0000)]
vdpa/mlx5: prepare virtio queues
The HW virtq object represents an emulated context for a VIRTIO_NET
virtqueue which was created and managed by a VIRTIO_NET driver as
defined in VIRTIO Specification.
Add support to prepare and release all the basic HW resources needed
the user virtqs emulation according to the rte_vhost configurations.
This patch prepares the basic configurations needed by DevX commands to
create a virtq.
Add new file mlx5_vdpa_virtq.c to manage virtq operations.
Matan Azrad [Sun, 2 Feb 2020 16:03:44 +0000 (16:03 +0000)]
vdpa/mlx5: prepare memory regions
In order to map the guest physical addresses used by the virtio device
guest side to the host physical addresses used by the HW as the host
side, memory regions are created.
By this way, for example, the HW can translate the addresses of the
packets posted by the guest and to take the packets from the correct
place.
The design is to work with single MR which will be configured to the
virtio queues in the HW, hence a lot of direct MRs are grouped to single
indirect MR.
Create functions to prepare and release MRs with all the related
resources that are required for it.
Create a new file mlx5_vdpa_mem.c to manage all the MR related code
in the driver.
Matan Azrad [Sun, 2 Feb 2020 16:03:41 +0000 (16:03 +0000)]
vdpa/mlx5: introduce Mellanox vDPA driver
Add a new driver to support vDPA operations by Mellanox devices.
The first Mellanox devices which support vDPA operations are
ConnectX-6 Dx and Bluefield1 HCA for their PF ports and VF ports.
This driver is depending on rdma-core like the mlx5 PMD, also it is
going to use mlx5 DevX to create HW objects directly by the FW.
Hence, the common/mlx5 library is linked to the mlx5_vdpa driver.
This driver will not be compiled by default due to the above
dependencies.
Get a burst mode information for Rx/Tx queues in mlx5.
Provide callback functions to show this information in
a "show rxq info" and "show txq info" output.
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Sunil Kumar Kori [Wed, 29 Jan 2020 09:17:04 +0000 (14:47 +0530)]
net/octeontx: fix memory leak of MAC address table
MAC address table is allocated during octeontx device create and
same is used to maintain list of MAC address associated to port.
This table is not getting freed niether in case of error nor during
graceful shutdown of port.
Patch fixes memory required memory for both the cases as mentioned.
Kiran Kumar K [Thu, 30 Jan 2020 16:23:24 +0000 (21:53 +0530)]
net/octeontx2: fix Tx flow control for HIGIG
Tx flow controlled is disabled in the Ax silicon version due to an errata.
This errata is not applicable for HIGIG Tx flow control, therefore
not enabling in HIGIG case.
Fixes: 602009ee2dfb ("net/octeontx2: support HIGIG2") Cc: stable@dpdk.org Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Lunyuan Cui [Fri, 17 Jan 2020 08:22:58 +0000 (08:22 +0000)]
net/i40e: fix multi-queue Rx interrupt for VF
The interrupt vector which bind to queues should not be larger than
the max available vector. It will cause port start failed. This patch
changed the judgement condition of the limited vector id. It can
effectively avoid vector id out of range.
Fixes: 6a6cf5f88b4a ("net/i40e: enable multi-queue Rx interrupt for VF") Signed-off-by: Lunyuan Cui <lunyuanx.cui@intel.com> Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Raslan Darawsheh [Mon, 27 Jan 2020 15:34:12 +0000 (17:34 +0200)]
net/mlx5: fix VXLAN-GPE item translation
Currently, when using VXLAN-GPE or VXLAN item in the flow
both are being treated the same with flags 0x8 in VXLAN
header. Which mean the matching of the item VXLAN-GPE
will match any VXLAN packet.
This fixes the translation of VXLAN GPE item into PMD flow
item. Which will by default set the flags to VXLAN-GPE
to be 0xc.
Krzysztof Kanas [Tue, 28 Jan 2020 13:31:47 +0000 (14:31 +0100)]
doc: add secondary VF details in thunderx guide
thunderx-nic uses secondary VF's to provide more queues to DPDK.
Current instructions explain the concept but don't show an easy way to
find which PCI id is primary and which is secondary VF's.
This patch extending the documentation of secondary VF w.r.t
the enumeration details.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
The above scheme has the following drawbacks:
1) It is not in line with other standard NIC behavior.
2) There can be an SW use case where SW can compute the hash
upfront using Toeplitz function and predict the queue selection
to optimize some packet lookup function. The nonstandard
way of doing XOR makes the consumer to not predict the queue selection.
C0 HW revision onward, The HW can configure the
rss_adder<7:0> as flow_tag<7:0> to align with standard NICs.
This patch adds an option to select legacy RSS adder mode
using tag_as_xor=1 devargs option while keeping the standard NIC
behavior as default.
Somnath Kotur [Fri, 31 Jan 2020 06:16:58 +0000 (11:46 +0530)]
net/bnxt: remove spurious warning in Rx handler
HW seems to populate the cfa code in the Rx descriptor even
if an explicit flow rule is not configured via application as
there might be a default rule configured in HW even for promisc
mode.
Fixes: 94eb699bc82e ("net/bnxt: support flow mark action") Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Use the MLX5_ASSERT macros instead of the standard assert clause.
Depends on the RTE_LIBRTE_MLX5_DEBUG configuration option to define it.
If RTE_LIBRTE_MLX5_DEBUG is enabled MLX5_ASSERT is equal to RTE_VERIFY
to bypass the global CONFIG_RTE_ENABLE_ASSERT option.
If RTE_LIBRTE_MLX5_DEBUG is disabled, the global CONFIG_RTE_ENABLE_ASSERT
can still make this assert active by calling RTE_VERIFY inside RTE_ASSERT.
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Use the RTE_LIBRTE_MLX5_DEBUG configuration flag to get rid of dependency
on the NDEBUG definition. This is a preparation step to switch
from standard assert clauses to DPDK RTE_ASSERT ones in MLX5 driver.
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Use the MLX4_ASSERT macros instead of the standard assert clause.
Depends on the RTE_LIBRTE_MLX4_DEBUG configuration option to define it.
If RTE_LIBRTE_MLX4_DEBUG is enabled MLX4_ASSERT is equal to RTE_VERIFY
to bypass the global CONFIG_RTE_ENABLE_ASSERT option.
If RTE_LIBRTE_MLX4_DEBUG is disabled, the global CONFIG_RTE_ENABLE_ASSERT
can still make this assert active by calling RTE_VERIFY inside RTE_ASSERT.
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Use the RTE_LIBRTE_MLX4_DEBUG compilation flag to get rid of dependency
on the NDEBUG definition. This is a preparation step to switch
from standard assert clauses to DPDK RTE_ASSERT ones in MLX4 driver.
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Remove -Werror-all flag in ICC configuration file to stop treating ICC
warnings as errors in DPDK due to many false positives. We are using
GCC and Clang as a benchmark for warnings anyway for simplification.
Suggested-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
This patch adds support for dynamic flag that hints transmit
datapath do not copy data to the descriptors. This flag is
useful when data are located in the memory of another (not NIC)
physical device and copying to the host memory is undesirable.
This hint flag is per mbuf for multi-segment packets.
This hint flag might be partially ignored if:
- hardware requires minimal data header to be inline into
descriptor, it depends on the hardware type and its configuration.
In this case PMD copies the minimal required number of bytes to
the descriptor, ignoring the no inline hint flag, the rest of data
is not copied.
- VLAN tag insertion offload is requested and hardware does not
support this options. In this case the VLAN tag is inserted by
software means and at least 18B are copied to descriptor.
Matan Azrad [Tue, 28 Jan 2020 17:06:43 +0000 (17:06 +0000)]
net/mlx5: make FDB default rule optional
There are RDMA-CORE versions which are not supported multi-table for
some Mellanox mlx5 devices.
Hence, the optimization added in commit [1] which forwards all the FDB
traffic to table 1 cannot be configured.
Make the above optimization optional:
Do not fail when either table 1 cannot be created or the jump rule
(all =>jump to table 1) is not configured successfully.
In this case, all the flows will be configured to table 0.
[1] commit b67b4ecbde22 ("net/mlx5: skip table zero to improve
insertion rate")
Matan Azrad [Wed, 29 Jan 2020 12:38:50 +0000 (12:38 +0000)]
common/mlx5: support ROCE disable through Netlink
Add new 4 Netlink commands to support enable/disable ROCE:
1. mlx5_nl_devlink_family_id_get to get the Devlink family ID of
Netlink general command.
2. mlx5_nl_enable_roce_get to get the ROCE current status.
3. mlx5_nl_driver_reload - to reload the device kernel driver.
4. mlx5_nl_enable_roce_set - to set the ROCE status.
When the user changes the ROCE status, the IB device may disappear and
appear again, so DPDK driver should wait for it and to restart itself.
Matan Azrad [Wed, 29 Jan 2020 12:38:40 +0000 (12:38 +0000)]
common/mlx5: add DevX virtq commands
Virtio emulation offload allows SW to offload the I/O operations of a
virtio virtqueue, using the device, allowing an improved performance
for its users.
While supplying all the relevant Virtqueue information (type, size,
memory location, doorbell information, etc.). The device can then
offload the I/O operation of this queue, according to its device type
characteristics.
Some of the virtio features can be supported according to the device
capability, for example, TSO and checksum.
Add virtio queue create, modify and query DevX commands.
Matan Azrad [Wed, 29 Jan 2020 12:38:37 +0000 (12:38 +0000)]
common/mlx5: glue UAR allocation
The isolated, protected and independent direct access to the HW by
multiple processes is implemented via User Access Region (UAR)
mechanism.
The UAR is part of PCI address space that is mapped for direct access to
the HW from the CPU.
UAR is comprised of multiple pages, each page containing registers that
control the HW operation.
UAR mechanism is used to post execution or control requests to the HW.
It is used by the HW to enforce protection and isolation between
different processes.
Matan Azrad [Wed, 29 Jan 2020 12:38:36 +0000 (12:38 +0000)]
common/mlx5: glue event interrupt commands
Add the next commands to glue in order to support interrupt event
channel operations associated to events in the EQ:
devx_create_event_channel,
devx_destroy_event_channel,
devx_subscribe_devx_event,
devx_subscribe_devx_event_fd,
devx_get_event.
git.droids-corp.org / dpdk.git / log