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(parent: 7c6cca6) | patch
acl: add 256-bit AVX512 classify method
authorKonstantin Ananyev <konstantin.ananyev@intel.com>
Tue, 6 Oct 2020 15:03:10 +0000 (16:03 +0100)
committerDavid Marchand <david.marchand@redhat.com>
Wed, 14 Oct 2020 12:23:00 +0000 (14:23 +0200)
commitb64c2295f7fcfae9273c1501819826e59449e185
tree441e505b571b3fd4ba2151a7f4b45ada7dec7e13tree | snapshot
parent7c6cca6b604d59fe1ab5eb4639507c4dfdbc4592commit | diff
acl: add 256-bit AVX512 classify method

Introduce classify implementation that uses AVX512 specific ISA.
rte_acl_classify_avx512x16() is able to process up to 16 flows in parallel.
It uses 256-bit width registers/instructions only
(to avoid frequency level change).
Note that for now only 64-bit version is supported.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
app/test-acl/main.c diff | blob | history
app/test/test_acl.c diff | blob | history
doc/guides/prog_guide/packet_classif_access_ctrl.rst diff | blob | history
doc/guides/rel_notes/release_20_11.rst diff | blob | history
lib/librte_acl/acl.h diff | blob | history
lib/librte_acl/acl_gen.c diff | blob | history
lib/librte_acl/acl_run_avx512.c diff | blob | history
lib/librte_acl/acl_run_avx512x8.h [new file with mode: 0644] blob
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