raw/ifpga/base: configure FEC mode
authorTianfei Zhang <tianfei.zhang@intel.com>
Thu, 14 Nov 2019 09:03:02 +0000 (17:03 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 20 Nov 2019 16:36:05 +0000 (17:36 +0100)
commitbc44402f184eb38ee35598ed86bea37424ca5f05
treed1664b8885ffdf2a32a06a32bbcee874cc2b539f
parent71da60b8380a35639342551536c4168f100c426a
raw/ifpga/base: configure FEC mode

We can change the PKVL FEC mode when the A10 NIOS FW
initialization. The end-user can use this feature the
change the FEC mode, the default mode is RS FEC mode.

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>
drivers/raw/ifpga/base/ifpga_fme.c
drivers/raw/ifpga/base/opae_spi.h