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net/mlx5: update Tx error handling routine
2020-01-20
Viacheslav Ovsiienko
net/mlx5: update Tx error handling routine
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-20
Viacheslav Ovsiienko
net/mlx5: move Tx complete request routine
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-20
Viacheslav Ovsiienko
net/mlx5: allow allocated mbuf with external buffer
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-20
Viacheslav Ovsiienko
app/testpmd: add mempool with external data buffers
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-20
Viacheslav Ovsiienko
mbuf: create pool with external memory buffers
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-20
Viacheslav Ovsiienko
mbuf: detach mbuf with pinned external buffer
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-20
Viacheslav Ovsiienko
mbuf: introduce routine to get private mbuf pool flags
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-17
Viacheslav Ovsiienko
net/mlx5: fix metadata item endianness conversion
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-17
Viacheslav Ovsiienko
net/mlx5: fix matcher field usage for metadata entities
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-17
Viacheslav Ovsiienko
net/mlx5: fix shared metadata matcher field setup
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-17
Viacheslav Ovsiienko
ethdev: fix switching domain allocation
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-17
Viacheslav Ovsiienko
net/mlx5: fix doorbell register offset type
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2020-01-17
Viacheslav Ovsiienko
net/mlx5: fix Tx burst routines set
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-27
Viacheslav Ovsiienko
net/mlx5: fix legacy inline multi-packet performance
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-27
Viacheslav Ovsiienko
net/mlx5: fix legacy non-inline multi-packet performance
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-27
Viacheslav Ovsiienko
net/mlx5: fix default mark copy flow
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-26
Viacheslav Ovsiienko
net/mlx5: fix legacy multi-packet Tx descriptors
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-26
Viacheslav Ovsiienko
doc: update metadata feature in mlx5 guide
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-26
Viacheslav Ovsiienko
net/mlx5: fix getting metadata register for E-Switch...
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix assert in Tx inline settings
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix port action for LAG
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix Tx doorbell write memory barrier
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix vport index in port action
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix vport id in port id action
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix environment variable recovery
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix suffix flow creation in metadata split
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-20
Viacheslav Ovsiienko
net/mlx5: fix query host adapter attributes
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: control transmit doorbell register mapping
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: fix asserts for multi-segment Tx offload...
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: add metadata register copy table
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: split Rx flows to provide metadata copy
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: introduce flow splitters chain
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: add metadata support to Rx datapath
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: extend flow metadata support
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: extend flow mark support
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: support flow tag
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: update metadata register ID query
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: check maximum modify actions number
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: adjust shared register according to mask
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: add devarg for extensive metadata support
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: check metadata registers availability
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: rename structure and function
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: update meta register matcher set
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: update flow functions
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: refactor flow structure
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: add metadata register copy
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: update modify header action translator
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-11
Viacheslav Ovsiienko
net/mlx5: convert internal tag endianness
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-08
Viacheslav Ovsiienko
ethdev: move egress metadata to dynamic field
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-08
Viacheslav Ovsiienko
ethdev: extend flow metadata
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-11-08
Viacheslav Ovsiienko
ethdev: add flow tag
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-23
Viacheslav Ovsiienko
net/mlx5: fix Tx packets statistics
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: fix direct call to rdma-core library
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: fix device scan within switch domain
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: adjust inline setting for large Tx queue...
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: check sibling device configurations mismatch
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: update switch port id in bonding configuration
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: extend switch domain searching range
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: update source and destination vport translations
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-08
Viacheslav Ovsiienko
net/mlx5: elaborate E-Switch port parameters query
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: query vport index match mode and parameters
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: check kernel support for VF LAG bonding
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: generate bonding device name
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: add VF LAG mode bonding device recognition
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: allocate device list explicitly
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: update PCI address retrieving routine
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: move backing PCI device to private context
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: fix ConnectX-6 VF type recognition
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: fix BlueField VF type recognition
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-10-07
Viacheslav Ovsiienko
net/mlx5: fix UAR remap initialization for 32-bit systems
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-09-20
Viacheslav Ovsiienko
net/mlx5: fix netlink RDMA socket callback routine
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-09-20
Viacheslav Ovsiienko
net/mlx5: fix Tx descriptor with VLAN insertions
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-07
Viacheslav Ovsiienko
net/mlx5: fix completion request for multi-segment
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-08
Viacheslav Ovsiienko
doc: add limitation with mlx5 Tx inline settings
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-07
Viacheslav Ovsiienko
doc: update Tx inline settings in mlx5 guide
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix memory event callback list
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix completion queue overflow for large burst
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix packet size inline settings
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix inline data settings
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix completion queue drain loop
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix inline data length assert
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: fix default minimal data inline
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-08-06
Viacheslav Ovsiienko
net/mlx5: add workaround for VLAN in virtual machine
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-29
Viacheslav Ovsiienko
net/mlx5: fix Tx completion request generation
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-29
Viacheslav Ovsiienko
net/mlx5: fix ConnectX-4LX minimal inline data limit
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-29
Viacheslav Ovsiienko
net/mlx5: fix Tx completion descriptors fetching loop
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: revert Netlink socket sharing
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: cache associated network device index
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: report max number of mbuf segments
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: implement Tx burst template
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: introduce Tx burst routine template
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: add Tx configuration and setup
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: extend NIC attributes query via DevX
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: update Tx definitions
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: add Tx devargs
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
net/mlx5: remove Tx implementation
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-07-23
Viacheslav Ovsiienko
app/testpmd: fix show port info routine
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-06-13
Viacheslav Ovsiienko
net/mlx5: fix master device Netlink socket sharing
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
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2019-06-06
Viacheslav Ovsiienko
net/mlx5: fix event handler uninstall
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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2019-05-12
Viacheslav Ovsiienko
net/mlx5: fix device removal handler for multiport
...off-by: Viacheslav Ovsiienko <
viacheslavo@mellanox.com
>
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