net/virtio: setup Rx queue interrupts
authorJianfeng Tan <jianfeng.tan@intel.com>
Tue, 17 Jan 2017 08:00:03 +0000 (08:00 +0000)
committerYuanhan Liu <yuanhan.liu@linux.intel.com>
Tue, 17 Jan 2017 08:26:54 +0000 (09:26 +0100)
commit26b683b4f7d042a136b60d1887cfba80dceb9b62
tree973897038f88262a9661b7f25a2f0f01ceb90a90
parentc056be239db5b1f0e6f3337a7c54b3df45035233
net/virtio: setup Rx queue interrupts

This patch mainly allocates structure to store queue/irq mapping,
and configure queue/irq mapping down through PCI ops. It also creates
eventfds for each Rx queue and tell the kernel about the eventfd/intr
binding.

Note: So far, we hard-code 1:1 queue/irq mapping (each rx queue has
one exclusive interrupt), like this:
  vec 0 -> config irq
  vec 1 -> rxq0
  vec 2 -> rxq1
  ...

which means, the "vectors" option of QEMU should be configured with
a value >= N+1 (N is the number of the queue pairs).

Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Tested-by: Lei Yao <lei.a.yao@intel.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
doc/guides/nics/features/virtio.ini
doc/guides/nics/features/virtio_vec.ini
doc/guides/nics/virtio.rst
doc/guides/rel_notes/release_17_02.rst
drivers/net/virtio/virtio_ethdev.c