dpdk.git
7 years agopdump: fix coverage warning
Andrew Rybchenko [Wed, 18 Jan 2017 07:26:08 +0000 (07:26 +0000)]
pdump: fix coverage warning

Fix GCC 4.8.2 20140120 (Red Hat 4.8.2-16) (RHEL 7.0) false warning
when build with EXTRA_CFLAGS='--coverage'.

Fixes: 278f945402c5 ("pdump: add new library for packet capture")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
7 years agoapp/testpmd: add offload capabilities query
Qiming Yang [Mon, 16 Jan 2017 02:31:26 +0000 (10:31 +0800)]
app/testpmd: add offload capabilities query

Add two new commands "show port cap <port>" and "show
port cap all" to display what offload capabilities supported
in ports. It will not only display all the capabilities of
the port, but also the enabling condition for each capability
in the running time.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agoacl: fix flow data comments
Michał Mirosław [Tue, 13 Dec 2016 01:08:16 +0000 (02:08 +0100)]
acl: fix flow data comments

Signed-off-by: Michał Mirosław <michal.miroslaw@atendesoftware.pl>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
7 years agoacl: allow zero verdict
Michał Mirosław [Wed, 18 Jan 2017 19:32:51 +0000 (20:32 +0100)]
acl: allow zero verdict

This enables ACL matches to return 0 where the distinction
from no-match case is not needed.

Signed-off-by: Michał Mirosław <michal.miroslaw@atendesoftware.pl>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
7 years agoacl: remove invalid test
Michał Mirosław [Wed, 18 Jan 2017 19:32:51 +0000 (20:32 +0100)]
acl: remove invalid test

rte_acl_add_rules() has no way of checking rule size.

This was hidden because the test effectively checked that
adding a rule with userdata == 0 failed.

Signed-off-by: Michał Mirosław <michal.miroslaw@atendesoftware.pl>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
7 years agoefd: fix build by removing dependency to libmath
Olivier Matz [Fri, 27 Jan 2017 14:23:17 +0000 (15:23 +0100)]
efd: fix build by removing dependency to libmath

When we compile the dpdk with:
  CONFIG_RTE_LIBRTE_EFD=y
  CONFIG_RTE_LIBRTE_NFP_PMD=n
  CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n
  CONFIG_RTE_LIBRTE_SCHED=n
  CONFIG_RTE_LIBRTE_METER=n

The linker gives the following error:
  lib/librte_efd.a(rte_efd.o): In function `rte_efd_create':
  lib/librte_efd/rte_efd.c:560: undefined reference to `log2'
  collect2: error: ld returned 1 exit status

This is because the '-lm' is missing in mk/rte.app.mk.

An alternative, which is proposed by this patch, is to use the compiler
builtin rte_bsf32() to process log2 instead of the libmath log2() that
requires to include math.h and link with -lm.

Fixes: 56b6ef874f80 ("efd: new Elastic Flow Distributor library")

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agoethdev: remove useless pointer initialization
Emmanuel Roullit [Tue, 24 Jan 2017 20:28:35 +0000 (21:28 +0100)]
ethdev: remove useless pointer initialization

Found with clang static analysis:
lib/librte_ether/rte_ethdev.c:2467:22:
warning: Value stored to 'dev' during its initialization is never read
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
                    ^~~   ~~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: 88ac4396ad29 ("ethdev: add VMDq support")

Signed-off-by: Emmanuel Roullit <emmanuel.roullit@gmail.com>
7 years agoethdev: fix MAC address replay
Steve Shin [Fri, 27 Jan 2017 17:57:29 +0000 (09:57 -0800)]
ethdev: fix MAC address replay

This patch fixes a bug in replaying MAC address to the hardware
in rte_eth_dev_config_restore() routine. Added default MAC replay as well.

Fixes: 4bdefaade6d1 ("ethdev: VMDQ enhancements")

Signed-off-by: Steve Shin <jonshin@cisco.com>
Reviewed-by: Igor Ryzhov <iryzhov@nfware.com>
7 years agombuf: remove redundant assignment when attaching
Ilya V. Matveychikov [Fri, 20 Jan 2017 00:19:23 +0000 (04:19 +0400)]
mbuf: remove redundant assignment when attaching

mi->next will be assigned to NULL few lines later, trivial patch

Fixes: ea672a8b1655 ("mbuf: remove the rte_pktmbuf structure")

Signed-off-by: Ilya V. Matveychikov <matvejchikov@gmail.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
7 years agomempool: fix stack handler dequeue
Olivier Matz [Mon, 23 Jan 2017 17:11:03 +0000 (18:11 +0100)]
mempool: fix stack handler dequeue

The return value of the stack handler is wrong: it should be 0 on
success, not the number of objects dequeued.

This could lead to memory leaks depending on how the caller checks the
return value (ret < 0 or ret != 0). This was also breaking autotests
with debug enabled, because the debug cookies are only updated when the
function returns 0, so the cookies were not updated, leading to
an abort().

Fixes: 295a530b0844 ("mempool: add stack mempool handler")
Cc: stable@dpdk.org
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
7 years agodevargs: reset driver name pointer on parsing failure
Emmanuel Roullit [Tue, 24 Jan 2017 20:26:56 +0000 (21:26 +0100)]
devargs: reset driver name pointer on parsing failure

The pointer set by strdup() needs to be cleared on failure to avoid a
potential double-free from the caller.

Found with clang static analysis:
lib/librte_eal/common/eal_common_devargs.c:123:2:
warning: Attempt to free released memory
        free(buf);
        ^~~~~~~~~

Fixes: 0fe11ec592b2 ("eal: add vdev init and uninit")

Signed-off-by: Emmanuel Roullit <emmanuel.roullit@gmail.com>
7 years agoeal: fix warning about debug log at startup
Olivier Matz [Tue, 24 Jan 2017 16:21:12 +0000 (17:21 +0100)]
eal: fix warning about debug log at startup

The log "Debug logs available - lower performance" should
now only be displayed when dataplane debug logs are enabled.

The issue occurs only if the default log level (CONFIG_RTE_LOG_LEVEL) is
set to DEBUG in the configuration, which is not the case by default.

Fixes: 5d8f0baf69ea ("log: do not drop debug logs at compile time")

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
7 years agokni: guard against unterminated name oops
Michał Mirosław [Tue, 13 Dec 2016 01:08:19 +0000 (02:08 +0100)]
kni: guard against unterminated name oops

If the name is too long, it triggers BUG in alloc_netdev().

Signed-off-by: Michał Mirosław <michal.miroslaw@atendesoftware.pl>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
7 years agokni: set interface name source as user-space
Michał Mirosław [Tue, 13 Dec 2016 01:08:18 +0000 (02:08 +0100)]
kni: set interface name source as user-space

Signed-off-by: Michał Mirosław <michal.miroslaw@atendesoftware.pl>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
7 years agoconfig: disable KNI ethtool by default
Ferruh Yigit [Tue, 17 Jan 2017 18:01:47 +0000 (18:01 +0000)]
config: disable KNI ethtool by default

KNI ethtool support (KNI control path) is not commonly used,
and it tends to break the build with new version of the Linux kernel.

KNI ethtool feature is disabled by default. KNI datapath is not effected
from this update.

It is possible to enable feature explicitly with config option:
"CONFIG_RTE_KNI_KMOD_ETHTOOL=y"

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
7 years agokni: add build option for ethtool support
Ferruh Yigit [Tue, 17 Jan 2017 18:01:46 +0000 (18:01 +0000)]
kni: add build option for ethtool support

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
7 years agobuildtools: allow symlinks within a source directory
Bruce Richardson [Mon, 23 Jan 2017 12:11:28 +0000 (12:11 +0000)]
buildtools: allow symlinks within a source directory

When creating the symlinks for header files to the include folder, the
relpath script dereferenced all symlinks. This made it impossible to
have file A.h renamed to B.h and then symlinked back to its original
name. This is useful to be able to do when refactoring or reworking
a library. Change this so that we just use the dirname of the path from
readlink, we can use the basename as it was originally, even if it was a
symlink.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
7 years agomk: remove default toolchain prefix for ThunderX
Thomas Monjalon [Mon, 23 Jan 2017 09:10:12 +0000 (10:10 +0100)]
mk: remove default toolchain prefix for ThunderX

The environment variable CROSS must be set when using a cross-toolchain.
However it is counter intuitive to set a default value, considering
the toolchain required to build this architecture is well known.
It is especially weird when using a native toolchain and requiring to
unset this variable on the command line.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agodevtools: add more git headline checks for acronyms
Ferruh Yigit [Thu, 26 Jan 2017 14:16:47 +0000 (14:16 +0000)]
devtools: add more git headline checks for acronyms

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
7 years agodevtools: update git headline prefix check for drivers
Ferruh Yigit [Thu, 26 Jan 2017 14:07:43 +0000 (14:07 +0000)]
devtools: update git headline prefix check for drivers

For the patches that touch multiple drivers in same driver group,
script forces headline prefix start with drv group.

Like for net/a net/b net/c, patch title should be "net: x y z"

Update rule to let "driver" prefix in headline,
for above sample patch title becomes: "drivers/net: x y z"

This prevents patch confused with library with same name.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
7 years agoethdev: fix data reset when allocating port
Yuanhan Liu [Fri, 20 Jan 2017 08:04:53 +0000 (16:04 +0800)]
ethdev: fix data reset when allocating port

Fix an silly error by auto-complete while managing the merge conflicts.
It's the eth_dev_data (but not eth_dev) entry should be memset.

Fixes: d948f596fee2 ("ethdev: fix port data mismatched in multiple process model")

Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
7 years agonet/tap: fix build with old kernels
Keith Wiles [Fri, 20 Jan 2017 14:30:25 +0000 (08:30 -0600)]
net/tap: fix build with old kernels

IFF_MULTI_QUEUE does not exist in older kernels:
drivers/net/tap/rte_eth_tap.c:143:19: error: ‘IFF_MULTI_QUEUE’ undeclared

Signed-off-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
7 years agoeal: fix FreeBSD build
Pablo de Lara [Thu, 19 Jan 2017 14:21:35 +0000 (14:21 +0000)]
eal: fix FreeBSD build

rte_bus_scan() and rte_bus_probe() have been introduced
in eal.c, but it is missing the rte_bus.h header file,
for BSD systems.

Fixes: f44abbc12fa0 ("bus: add scanning")
Fixes: c3cec1d80708 ("bus: add probing")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agoversion: 17.02-rc1
Thomas Monjalon [Thu, 19 Jan 2017 04:54:41 +0000 (05:54 +0100)]
version: 17.02-rc1

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
7 years agobus: add probing
Shreyansh Jain [Wed, 18 Jan 2017 14:05:22 +0000 (19:35 +0530)]
bus: add probing

Bus implementations can implement a probe handler to match the devices
scanned against the drivers registered.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
7 years agobus: add scanning
Shreyansh Jain [Wed, 18 Jan 2017 14:05:21 +0000 (19:35 +0530)]
bus: add scanning

Scan for bus discovers the devices available on the bus and adds them
to a bus specific device list. Each bus mandatorily implements this
method.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
7 years agobus: introduce bus abstraction
Shreyansh Jain [Wed, 18 Jan 2017 14:05:17 +0000 (19:35 +0530)]
bus: introduce bus abstraction

This patch introduces the rte_bus abstraction for EAL.
The model is:
 - One or more devices are connected to a Bus
 - Drivers are running instances which manage one or more devices
 - Bus is responsible for identifying devices (and interrupt propogation)
 - Driver is responsible for initializing the device

This patch adds a 'rte_bus' base class which would be extended for
specific implementations. It also introduces Bus registration and
deregistration functions.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
7 years agocrypto/armv8: add documentation
Zbigniew Bodek [Wed, 18 Jan 2017 20:01:58 +0000 (21:01 +0100)]
crypto/armv8: add documentation

Add documentation about the driver and update
release notes.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoapp/test: add ARMv8 crypto tests and test vectors
Zbigniew Bodek [Wed, 18 Jan 2017 20:02:01 +0000 (21:02 +0100)]
app/test: add ARMv8 crypto tests and test vectors

Introduce unit tests for ARMv8 crypto PMD.
Add test vectors for short cases such as 160 bytes.
These test cases are ARMv8 specific since the code provides
different processing paths for different input data sizes.

User can validate correctness of algorithms' implementation using:
* cryptodev_sw_armv8_autotest
For performance test one can use:
* cryptodev_sw_armv8_perftest

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agocryptodev: introduce ARM-specific feature flags
Zbigniew Bodek [Wed, 18 Jan 2017 20:01:57 +0000 (21:01 +0100)]
cryptodev: introduce ARM-specific feature flags

Add two new feature flags:
* RTE_CRYPTODEV_FF_CPU_NEON
  represents ARM NEON (TM) instructions
* RTE_CRYPTODEV_FF_CPU_ARM_CE
  represents ARM crypto extensions

Add them to both cryptodev library, documentation and relevant
PMD driver for ARMv8.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
7 years agocrypto/armv8: add PMD optimized for ARMv8 processors
Zbigniew Bodek [Wed, 18 Jan 2017 20:01:54 +0000 (21:01 +0100)]
crypto/armv8: add PMD optimized for ARMv8 processors

This patch introduces crypto poll mode driver
using ARMv8 cryptographic extensions.
CPU compatibility with this driver is detected in
run-time and virtual crypto device will not be
created if CPU doesn't provide:
AES, SHA1, SHA2 and NEON.

This PMD is optimized to provide performance boost
for chained crypto operations processing,
such as encryption + HMAC generation,
decryption + HMAC validation. In particular,
cipher only or hash only operations are
not provided.

The driver currently supports AES-128-CBC
in combination with: SHA256 HMAC and SHA1 HMAC
and relies on the external armv8_crypto library:
https://github.com/caviumnetworks/armv8_crypto

Build ARMv8 crypto PMD if compiling for ARM64
and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO option
is enable in the configuration file.
ARMV8_CRYPTO_LIB_PATH environment variable will
point to the appropriate library directory.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agodoc: add ZUC to crypto matrices
Pablo de Lara [Wed, 18 Jan 2017 17:31:00 +0000 (17:31 +0000)]
doc: add ZUC to crypto matrices

When ZUC PMD was added, it was not added in the
Crypto Device Supported Functionality Matrices.
This commit adds a column in all the matrices, plus
the ZUC EEA3/EIA3 algorithms.

Fixes: cf7685d68f00 ("crypto/zuc: add driver for ZUC library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agocrypto/aesni_gcm: test new features
Piotr Azarewicz [Tue, 17 Jan 2017 11:19:19 +0000 (12:19 +0100)]
crypto/aesni_gcm: test new features

Added new unit tests for AES-NI GCM PMD to verify new functionalities.

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agocrypto/aesni_gcm: migrate from MB library to ISA-L
Piotr Azarewicz [Tue, 17 Jan 2017 11:19:18 +0000 (12:19 +0100)]
crypto/aesni_gcm: migrate from MB library to ISA-L

Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer
Crypto library.This patch reimplement the device using ISA-L Crypto
library: https://github.com/01org/isa-l_crypto.

The migration entailed the following additional support for:
  * GMAC algorithm.
  * 256-bit cipher key.
  * Session-less mode.
  * Out-of place processing
  * Scatter-gatter support for chained mbufs (only out-of place and
    destination mbuf must be contiguous)

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agoapp/test: fix symmetric session free in crypto perf tests
Arek Kusztal [Tue, 17 Jan 2017 13:33:07 +0000 (13:33 +0000)]
app/test: fix symmetric session free in crypto perf tests

This commit fixes problem with deallocation of symmetric
session entries in cryptodev performance tests.

Fixes: 390919829fdb ("app/test: update AES SHA performance test")
Fixes: 79521c438363 ("app/test: add AES GCM performance test")
Fixes: ffbe3be0d4b5 ("app/test: add libcrypto")
Fixes: 97fe6461c7cb ("app/test: add SNOW 3G performance test")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
7 years agocryptodev: add user defined name for vdev
Fan Zhang [Mon, 16 Jan 2017 14:14:54 +0000 (14:14 +0000)]
cryptodev: add user defined name for vdev

This patch adds a user defined name initializing parameter to cryptodev
library.

Originally, for software cryptodev PMD, the vdev name parameter is
treated as the driver identifier, and will create an unique name for each
device automatically, which is not necessarily as same as the vdev
parameter.

This patch allows the user to either create a unique name for his software
cryptodev, or by default, let the system creates a unique one. This should
help the user managing the created cryptodevs easily.

Examples:
CLI command fragment 1: --vdev "crypto_aesni_gcm_pmd"
The above command will result in creating a AESNI-GCM PMD with name of
"crypto_aesni_gcm_X", where postfix X is the number assigned by the system,
starting from 0. This fragment can be placed in the same CLI command
multiple times, resulting the postfixs incremented by one for each new
device.

CLI command fragment 2: --vdev "crypto_aesni_gcm_pmd,name=gcm1"
The above command will result in creating a AESNI-GCM PMD with name of
"gcm1". This fragment can be placed in the same CLI command multiple
times, as long as each having a unique name value.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agocrypto/qat: add scatter gather to feature flags
Arek Kusztal [Wed, 4 Jan 2017 08:37:32 +0000 (08:37 +0000)]
crypto/qat: add scatter gather to feature flags

This commit adds scatter gather option to Intel(R) QuickAssist
Technology driver feature flags.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agoexamples/ipsec-secgw: support SHA256 HMAC
Zbigniew Bodek [Thu, 12 Jan 2017 14:52:37 +0000 (15:52 +0100)]
examples/ipsec-secgw: support SHA256 HMAC

Add minor adjustments to support SHA256 HMAC:
- extend maximum key length to match SHA256 HMAC
- add SHA256 HMAC parameters and configuration string
- add SHA256 HMAC to inbound and outbound cases

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
7 years agoapp/test: check scatter-gather for crypto drivers
Tomasz Kulasek [Fri, 13 Jan 2017 15:23:17 +0000 (16:23 +0100)]
app/test: check scatter-gather for crypto drivers

This patch provides unit tests for set of cipher/hash combinations covering
currently implemented crypto PMD's and allowing to verify scatter gather
support.

Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agocrypto/openssl: support scatter-gather
Tomasz Kulasek [Fri, 13 Jan 2017 15:23:16 +0000 (16:23 +0100)]
crypto/openssl: support scatter-gather

Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agocrypto: support scatter-gather in software drivers
Tomasz Kulasek [Fri, 13 Jan 2017 15:23:15 +0000 (16:23 +0100)]
crypto: support scatter-gather in software drivers

This patch introduces RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER feature flag
informing that selected crypto device supports segmented mbufs natively
and doesn't need to be coalesced before crypto operation.

While using segmented buffers in crypto devices may have unpredictable
results, for PMDs which doesn't support it natively, additional check is
made for debug compilation.

Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agocrypto/openssl: fix indentation in guide
Daniel Mrzyglod [Tue, 10 Jan 2017 14:44:25 +0000 (15:44 +0100)]
crypto/openssl: fix indentation in guide

The code section was lacking indentation to be be correctly formatted.

Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agocryptodev: fix loop in device query
Fan Zhang [Wed, 11 Jan 2017 14:09:47 +0000 (14:09 +0000)]
cryptodev: fix loop in device query

This patch fixes the dev value update problem in
rte_cryptodev_pmd_get_named_dev, orginally, dev won't be updated
after the initial step in the loop.

Fixes: d11b0f30df88 ("cryptodev: introduce API and framework for crypto devices")

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agocrypto/openssl: remove unneeded check
Piotr Azarewicz [Mon, 9 Jan 2017 14:45:36 +0000 (15:45 +0100)]
crypto/openssl: remove unneeded check

EVP_CIPHER_CTX_set_padding() function always returns 1, so the check is
unneeded.

Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Tested-by: Zhaoyan Chen <zhaoyan.chen@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agoapp/test: add integrity check for crypto mbuf data
Fiona Trahe [Thu, 22 Dec 2016 16:51:07 +0000 (16:51 +0000)]
app/test: add integrity check for crypto mbuf data

In block cipher test cases, add checks that the source
and destination mbufs are not modified except where expected.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
7 years agocrypto/qat: fix IV size in capabilities
Arek Kusztal [Fri, 23 Dec 2016 08:24:53 +0000 (08:24 +0000)]
crypto/qat: fix IV size in capabilities

This patch sets iv size in qat PMD to 12 bytes to be
conformant with nist SP800-38D.

Fixes: 26c2e4ad5ad4 ("cryptodev: add capabilities discovery")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agocrypto/aesni_gcm: fix IV size in capabilities
Arek Kusztal [Fri, 23 Dec 2016 08:24:52 +0000 (08:24 +0000)]
crypto/aesni_gcm: fix IV size in capabilities

This patch sets iv size in aesni gcm PMD to 12 bytes to be
conformant with nist SP800-38D.

Fixes: eec136f3c54f ("aesni_gcm: add driver for AES-GCM crypto operations")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
7 years agocrypto/aesni_gcm: fix J0 padding bytes
Arek Kusztal [Fri, 23 Dec 2016 08:24:51 +0000 (08:24 +0000)]
crypto/aesni_gcm: fix J0 padding bytes

This commit fixes pre-counter block (J0) padding by clearing
four most significant bytes before setting initial counter value.

Fixes: b2bb3597470c ("crypto/aesni_gcm: move pre-counter block to driver")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
7 years agocrypto/aesni_mb: support AVX512
Declan Doherty [Wed, 21 Dec 2016 22:05:00 +0000 (22:05 +0000)]
crypto/aesni_mb: support AVX512

Release v0.44 of Intel(R) Multi-Buffer Crypto for IPsec library adds
support for AVX512 instructions. This patch enables the new AVX512
accelerated functions from the aesni_mb_pmd crypto poll mode driver.

This patch set requires that the aesni_mb_pmd is linked against the
version 0.44 or greater of the Multi-Buffer Crypto for IPsec library.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agocrypto/aesni_mb: add missing supported algos in guide
Pablo de Lara [Mon, 19 Dec 2016 17:29:03 +0000 (17:29 +0000)]
crypto/aesni_mb: add missing supported algos in guide

AESNI MB PMD supports SHA224-HMAC and SHA384-HMAC,
but the documentation was not updated with this.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
7 years agocrypto/aesni_mb: add single operation functionality
Pablo de Lara [Mon, 19 Dec 2016 17:29:02 +0000 (17:29 +0000)]
crypto/aesni_mb: add single operation functionality

Update driver to use new AESNI Multibuffer IPSec library single
operation functionality (cipher only and authentication only).
This patch also adds tests for this new feature.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agocrypto/aesni_mb: update dependency in guide
Pablo de Lara [Mon, 19 Dec 2016 17:29:01 +0000 (17:29 +0000)]
crypto/aesni_mb: update dependency in guide

The Intel(R) Multi Buffer Crypto library used in the AESNI MB PMD
has been moved to a new repository, in github.
This patch updates the link where it can be downloaded.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
7 years agocrypto/aesni_mb: fix incorrect crypto session
Pablo de Lara [Mon, 19 Dec 2016 17:29:00 +0000 (17:29 +0000)]
crypto/aesni_mb: fix incorrect crypto session

When using sessionless crypto operations, crypto session
is obtained from a pool of sessions, when processing the
operation. Once the operation is processed, the session
is put back in the pool, but for the AESNI MB PMD, this
session was not being saved in the operation and therefore,
it did not return to the session pool.

Fixes: 924e84f87306 ("aesni_mb: add driver for multi buffer based crypto")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
7 years agoapp/test: check SGL on QAT
Arek Kusztal [Fri, 23 Dec 2016 12:51:10 +0000 (12:51 +0000)]
app/test: check SGL on QAT

This commit adds GCM tests to use within scatter-gather list.
Test use direct chained mbufs created based on the input parameter
for max size for in place operations and out of place operations.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agocrypto/qat: add SGL capability
Arek Kusztal [Fri, 23 Dec 2016 12:51:09 +0000 (12:51 +0000)]
crypto/qat: add SGL capability

This commit adds scatter-gather list capability to Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agoapp/test: check DES on QAT
Arek Kusztal [Fri, 2 Dec 2016 14:16:02 +0000 (14:16 +0000)]
app/test: check DES on QAT

This commit adds tests of Data Encryption Standard (DES)
algorithm to Intel QuickAssist technology crypto test suites

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agocrypto/qat: add DES capability
Arek Kusztal [Fri, 2 Dec 2016 14:16:01 +0000 (14:16 +0000)]
crypto/qat: add DES capability

This commit adds DES capability to Intel QuickAssist
Technology Driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agocryptodev: add DES CBC cipher algorithm
Arek Kusztal [Fri, 2 Dec 2016 14:16:00 +0000 (14:16 +0000)]
cryptodev: add DES CBC cipher algorithm

This commit adds DES CBC ciper algorithm to available algorithms

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
7 years agocrypto/openssl: fix extra bytes written at end of data
Piotr Azarewicz [Wed, 7 Dec 2016 10:45:54 +0000 (11:45 +0100)]
crypto/openssl: fix extra bytes written at end of data

Extra bytes are being written at end of data while process standard
openssl cipher encryption. This behaviour is unexpected.

This patch disable the padding feature in openssl library, which is
causing the problem.

Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
7 years agocrypto/qat: fix buffer overwrite in OOP case
Fiona Trahe [Fri, 9 Dec 2016 15:39:05 +0000 (15:39 +0000)]
crypto/qat: fix buffer overwrite in OOP case

In out-of-place operation, data is DMAed from source mbuf
to destination mbuf. To avoid header data in dest mbuf being
overwritten, the minimal data-set should be DMAed.

Fixes: 39e0bee48e81 ("crypto/qat: rework request builder for performance")

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
7 years agocryptodev: fix crash on null dereference
Jerin Jacob [Sat, 3 Dec 2016 18:34:01 +0000 (00:04 +0530)]
cryptodev: fix crash on null dereference

crypodev->data->name will be null when
rte_cryptodev_get_dev_id() invoked without a valid
crypto device instance.

Fixes: d11b0f30df88 ("cryptodev: introduce API and framework for crypto devices")

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
7 years agoapp/test: check AES cipher-only on QAT
Fiona Trahe [Thu, 24 Nov 2016 18:29:24 +0000 (18:29 +0000)]
app/test: check AES cipher-only on QAT

Extended functional AES-CBC and AES-CTR cipher-only
tests to run on QAT PMD.
Added AES_CBC cipher-only performance tests on QAT PMD.
No driver changes, but as now tested, QAT documentation
is updated to remove constraint.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
7 years agocryptodev: remove unused digest-appended feature
Fiona Trahe [Thu, 17 Nov 2016 17:33:17 +0000 (17:33 +0000)]
cryptodev: remove unused digest-appended feature

The cryptodev API had specified that if the digest address field was
left empty on an authentication operation, then the PMD would assume
the digest was appended to the source or destination data.
This case was not handled at all by most PMDs and incorrectly handled
by the QAT PMD.
As no bugs were raised, it is assumed to be not needed, so this patch
removes it, rather than add handling for the case on all PMDs.
The digest can still be appended to the data, but its
address must now be provided in the op.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
7 years agodoc: add flow distributor example guide
Pablo de Lara [Tue, 17 Jan 2017 22:23:56 +0000 (22:23 +0000)]
doc: add flow distributor example guide

Signed-off-by: Sameh Gobriel <sameh.gobriel@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Christian Maciocco <christian.maciocco@intel.com>
7 years agodoc: add EFD library section in programmers guide
Pablo de Lara [Tue, 17 Jan 2017 22:23:55 +0000 (22:23 +0000)]
doc: add EFD library section in programmers guide

Signed-off-by: Sameh Gobriel <sameh.gobriel@intel.com>
Acked-by: Christian Maciocco <christian.maciocco@intel.com>
7 years agoexamples/flow_distributor: new example to demonstrate EFD
Pablo de Lara [Tue, 17 Jan 2017 22:23:54 +0000 (22:23 +0000)]
examples/flow_distributor: new example to demonstrate EFD

This new sample app, based on the client/server sample app,
shows the user an scenario using the EFD library.
It consists of:

- A front-end server which has an EFD table that stores the
  node id for each flow key, which will distribute the incoming
  packets to the different nodes

- A back-end node, which has a hash table where node checks,
  after reading packets coming from the server, whether the packet
  is meant to be used in such node, in which case it will be TXed,
  or not, in which case, packet will be dropped.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com>
Acked-by: Christian Maciocco <christian.maciocco@intel.com>
7 years agoapp/test: add EFD functional and perf tests
Pablo de Lara [Tue, 17 Jan 2017 22:23:53 +0000 (22:23 +0000)]
app/test: add EFD functional and perf tests

Signed-off-by: Byron Marohn <byron.marohn@intel.com>
Signed-off-by: Karla Saur <karla.saur@intel.com>
Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Christian Maciocco <christian.maciocco@intel.com>
7 years agoefd: add AVX2 vector lookup function
Pablo de Lara [Tue, 17 Jan 2017 22:23:52 +0000 (22:23 +0000)]
efd: add AVX2 vector lookup function

Signed-off-by: Byron Marohn <byron.marohn@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com>
Acked-by: Christian Maciocco <christian.maciocco@intel.com>
7 years agoefd: new Elastic Flow Distributor library
Pablo de Lara [Tue, 17 Jan 2017 22:23:51 +0000 (22:23 +0000)]
efd: new Elastic Flow Distributor library

Elastic Flow Distributor (EFD) is a distributor library that uses
perfect hashing to determine a target/value for a given incoming flow key.
It has the following advantages:

- First, because it uses perfect hashing, it does not store
  the key itself and hence lookup performance is not dependent
  on the key size.

- Second, the target/value can be any arbitrary value hence
  the system designer and/or operator can better optimize service rates
  and inter-cluster network traffic locating.

- Third, since the storage requirement is much smaller than a hash-based
  flow table (i.e. better fit for CPU cache), EFD can scale to
  millions of flow keys.
  Finally, with current optimized library implementation performance
  is fully scalable with number of CPU cores.

Signed-off-by: Byron Marohn <byron.marohn@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com>
Acked-by: Christian Maciocco <christian.maciocco@intel.com>
7 years agocrypto/qat: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:28 +0000 (06:51 +0530)]
crypto/qat: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.

CC: John Griffin <john.griffin@intel.com>
CC: Fiona Trahe <fiona.trahe@intel.com>
CC: Deepak Kumar Jain <deepak.k.jain@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/vmxnet3: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:42 +0000 (06:51 +0530)]
net/vmxnet3: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Yong Wang <yongwang@vmware.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/virtio: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:41 +0000 (06:51 +0530)]
net/virtio: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
7 years agonet/thunderx: use I/O device memory read/write API
Jerin Jacob [Wed, 18 Jan 2017 01:21:40 +0000 (06:51 +0530)]
net/thunderx: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/ena: use I/O device memory read/write API
Jerin Jacob [Wed, 18 Jan 2017 01:21:34 +0000 (06:51 +0530)]
net/ena: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

Suggested-by: Jan Medala <jan@semihalf.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jan Medala <jan@semihalf.com>
7 years agonet/qede: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:39 +0000 (06:51 +0530)]
net/qede: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Harish Patil <harish.patil@cavium.com>
CC: Rasesh Mody <rasesh.mody@cavium.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/bnxt: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:29 +0000 (06:51 +0530)]
net/bnxt: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal abstraction
for I/O device memory read/write access to fix portability issues across
different architectures.

CC: Stephen Hurd <stephen.hurd@broadcom.com>
CC: Ajit Khaparde <ajit.khaparde@broadcom.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/bnx2x: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:30 +0000 (06:51 +0530)]
net/bnx2x: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal abstraction
for I/O device memory read/write access to fix portability issues across
different architectures.

CC: Harish Patil <harish.patil@cavium.com>
CC: Rasesh Mody <rasesh.mody@cavium.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/cxgbe: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:31 +0000 (06:51 +0530)]
net/cxgbe: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/nfp: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:38 +0000 (06:51 +0530)]
net/nfp: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Alejandro Lucero <alejandro.lucero@netronome.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Alejandro Lucero <alejandro.lucero@netronome.com>
7 years agonet/enic: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:33 +0000 (06:51 +0530)]
net/enic: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.

CC: John Daley <johndale@cisco.com>
CC: Nelson Escobar <neescoba@cisco.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/fm10k: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:35 +0000 (06:51 +0530)]
net/fm10k: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Jing Chen <jing.d.chen@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/i40e: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:36 +0000 (06:51 +0530)]
net/i40e: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal abstraction
for I/O device memory read/write access to fix portability issues across
different architectures.

CC: Helin Zhang <helin.zhang@intel.com>
CC: Jingjing Wu <jingjing.wu@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Satha Rao <skoteshwar@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/ixgbe: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:37 +0000 (06:51 +0530)]
net/ixgbe: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Helin Zhang <helin.zhang@intel.com>
CC: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agonet/e1000: use I/O device memory read/write API
Santosh Shukla [Wed, 18 Jan 2017 01:21:32 +0000 (06:51 +0530)]
net/e1000: use I/O device memory read/write API

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Wenzhuo Lu <wenzhuo.lu@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/arm64: change barrier definitions to macros
Jerin Jacob [Wed, 18 Jan 2017 01:21:27 +0000 (06:51 +0530)]
eal/arm64: change barrier definitions to macros

Change rte_*wb definitions to macros in order to
keep consistent with other barrier definitions in
the file.

Suggested-by: Jianbo Liu <jianbo.liu@linaro.org>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/arm64: override I/O device read/write access
Jerin Jacob [Wed, 18 Jan 2017 01:21:26 +0000 (06:51 +0530)]
eal/arm64: override I/O device read/write access

Override the generic I/O device memory read/write access and implement it
using armv8 instructions for arm64.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal: let all architectures use generic I/O implementation
Jerin Jacob [Wed, 18 Jan 2017 01:21:25 +0000 (06:51 +0530)]
eal: let all architectures use generic I/O implementation

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal: add generic I/O device read/write implementation
Jerin Jacob [Wed, 18 Jan 2017 01:21:24 +0000 (06:51 +0530)]
eal: add generic I/O device read/write implementation

This patch implements the generic version of rte_read[b/w/l/q]_[relaxed]
and rte_write[b/w/l/q]_[relaxed] using rte_io_wmb() and rte_io_rmb()

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal: introduce I/O device memory read/write operations
Jerin Jacob [Wed, 18 Jan 2017 01:21:23 +0000 (06:51 +0530)]
eal: introduce I/O device memory read/write operations

This commit introduces 8-bit, 16-bit, 32bit, 64bit I/O device
memory read/write operations along with the relaxed versions.

The weakly-ordered machine like ARM needs additional I/O barrier for
device memory read/write access over PCI bus.
By introducing the eal abstraction for I/O device memory read/write access,
The drivers can access I/O device memory in architecture agnostic manner.

The relaxed version does not have additional I/O memory barrier, useful in
accessing the device registers of integrated controllers which
implicitly strongly ordered with respect to memory access.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/arm64: define I/O device memory barriers
Jerin Jacob [Wed, 18 Jan 2017 01:21:22 +0000 (06:51 +0530)]
eal/arm64: define I/O device memory barriers

CC: Jianbo Liu <jianbo.liu@linaro.org>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/arm64: define SMP barrier
Jerin Jacob [Wed, 18 Jan 2017 01:21:21 +0000 (06:51 +0530)]
eal/arm64: define SMP barrier

dmb instruction based barrier is used for smp version of memory barrier.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/arm64: fix memory barrier definition
Jerin Jacob [Wed, 18 Jan 2017 01:21:20 +0000 (06:51 +0530)]
eal/arm64: fix memory barrier definition

dsb instruction based barrier is used for non smp
version of memory barrier.

Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
7 years agoeal/armv7: define I/O device memory barriers
Jerin Jacob [Wed, 18 Jan 2017 01:21:19 +0000 (06:51 +0530)]
eal/armv7: define I/O device memory barriers

The patch does not provide any functional change for ARMv7.
I/O barriers are mapped to existing smp barriers.

CC: Jan Viktorin <viktorin@rehivetech.com>
CC: Jianbo Liu <jianbo.liu@linaro.org>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/arm: separate SMP barrier definition for ARMv7 and ARMv8
Jerin Jacob [Wed, 18 Jan 2017 01:21:18 +0000 (06:51 +0530)]
eal/arm: separate SMP barrier definition for ARMv7 and ARMv8

Separate the smp barrier definition for arm and arm64 for fine
control on smp barrier definition for each architecture.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/ppc64: define I/O device memory barriers
Jerin Jacob [Wed, 18 Jan 2017 01:21:17 +0000 (06:51 +0530)]
eal/ppc64: define I/O device memory barriers

The patch does not provide any functional change for ppc_64.
I/O barriers are mapped to existing smp barriers.

CC: Chao Zhu <chaozhu@linux.vnet.ibm.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/tile: define I/O device memory barriers
Jerin Jacob [Wed, 18 Jan 2017 01:21:16 +0000 (06:51 +0530)]
eal/tile: define I/O device memory barriers

The patch does not provide any functional change for tile.
I/O barriers are mapped to existing smp barriers.

CC: Zhigang Lu <zlu@ezchip.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal/x86: define I/O device memory barriers
Jerin Jacob [Wed, 18 Jan 2017 01:21:15 +0000 (06:51 +0530)]
eal/x86: define I/O device memory barriers

The patch does not provide any functional change for IA.
I/O barriers are mapped to existing smp barriers.

CC: Bruce Richardson <bruce.richardson@intel.com>
CC: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agoeal: introduce I/O device memory barriers
Jerin Jacob [Wed, 18 Jan 2017 01:21:14 +0000 (06:51 +0530)]
eal: introduce I/O device memory barriers

This commit introduce rte_io_mb(), rte_io_wmb() and rte_io_rmb(), in
order to enable memory barriers between I/O device and CPU.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
7 years agodevtools: relax tag checking in fixes
Thomas Monjalon [Tue, 17 Jan 2017 14:35:11 +0000 (15:35 +0100)]
devtools: relax tag checking in fixes

The tag "Cc: stable@dpdk.org" must be set when the commit must be
backported to a stable branch. The reminder is reworded.

It should be located just below the "Fixes:" tag (without blank line)
and followed by a blank line, separated from SoB and review tags below.
However, there is no strong need for checking blank lines.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
7 years agodevtools: fix lookup commit fixing a fix of many commits
Thomas Monjalon [Tue, 17 Jan 2017 14:24:20 +0000 (15:24 +0100)]
devtools: fix lookup commit fixing a fix of many commits

There was a bug when looking at a commit fixing a commit which
itself was fixing many commits:

% devtools/git-log-fixes.sh 12ee45a36~..12ee45a36
devtools/git-log-fixes.sh: 96: local: 5499c1fc9baa: bad variable name

In this case, the list of commits was not quoted in variable assignment.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>