+++ /dev/null
-/*
- * Copyright Droids Corporation, Microb Technology, Eirbot (2006)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * Revision : $Id: timers.h,v 1.1.2.4 2009-01-23 23:54:16 zer0 Exp $
- *
- */
-
-/*
- * This file contains definitions used for timer use
- *
- * In the future, most of definitions will be added in autogenerated
- * files from atmel's documentation (aversive/parts.h and
- * aversive/parts/ATxxxx.h) which are not timer specific.
- */
-
-/* XXX won't be needed : use parts.h */
-
-#ifndef _AVERSIVE_TIMERS_H_
-#define _AVERSIVE_TIMERS_H_
-
-// Timer WGM bits
-#define TIMER_8_MODE_NORMAL 0
-#define TIMER_8_MODE_PWM_PC 1 // phase correct PWM
-#define TIMER_8_MODE_CTC 2
-#define TIMER_8_MODE_PWM 3 // fast PWM
-
-#define TIMER_16_MODE_NORMAL 0
-#define TIMER_16_MODE_PWM_PC_8 1 // phase correct PWM 8 bits
-#define TIMER_16_MODE_PWM_PC_9 2 // phase correct PWM 9 bits
-#define TIMER_16_MODE_PWM_PC_10 3 // phase correct PWM 10 bits
-#define TIMER_16_MODE_CTC1 4 // clear on compare, TOP = OCRA
-#define TIMER_16_MODE_PWM_8 5 // fast PWM 8 bits
-#define TIMER_16_MODE_PWM_9 6 // fast PWM 9 bits
-#define TIMER_16_MODE_PWM_10 7 // fast PWM 10 bits
-#define TIMER_16_MODE_PWM_PFC1 8 // PWM, Phase & Freq Correct
-#define TIMER_16_MODE_PWM_PFC2 9 // PWM, Phase & Freq Correct
-#define TIMER_16_MODE_PWM_PC1 10 // PWM, Phase Correct
-#define TIMER_16_MODE_PWM_PC2 11 // PWM, Phase Correct
-#define TIMER_16_MODE_CTC2 12 // clear on compare, TOP = ICR
-#define TIMER_16_MODE_PWM_F1 14 // fast PWM
-#define TIMER_16_MODE_PWM_F2 15 // fast PWM
-
-
-// ATMEGA128 ////////////////////////////////////////
-#if defined (__AVR_ATmega128__)
-
-// OCR_BITS
-#define OCR0_DDR DDRB
-#define OCR0_BIT 4
-#define OCR1A_DDR DDRB
-#define OCR1A_BIT 5
-#define OCR1B_DDR DDRB
-#define OCR1B_BIT 6
-#define OCR1C_DDR DDRB
-#define OCR1C_BIT 7
-#define OCR2_DDR DDRB
-#define OCR2_BIT 7
-#define OCR3A_DDR DDRE
-#define OCR3A_BIT 3
-#define OCR3B_DDR DDRE
-#define OCR3B_BIT 4
-#define OCR3C_DDR DDRE
-#define OCR3C_BIT 5
-
-
-
-
-// ATMEGA1281 ////////////////////////////////////////
-#elif defined (__AVR_ATmega1281__)
-
-// OCR_BITS
-#define OCR0A_DDR DDRB
-#define OCR0A_BIT 7
-#define OCR0B_DDR DDRG
-#define OCR0B_BIT 5
-#define OCR1A_DDR DDRB
-#define OCR1A_BIT 5
-#define OCR1B_DDR DDRB
-#define OCR1B_BIT 6
-#define OCR1C_DDR DDRB
-#define OCR1C_BIT 7
-#define OCR2A_DDR DDRB
-#define OCR2A_BIT 4
-#define OCR3A_DDR DDRE
-#define OCR3A_BIT 3
-#define OCR3B_DDR DDRE
-#define OCR3B_BIT 4
-#define OCR3C_DDR DDRE
-#define OCR3C_BIT 5
-
-
-
-// ATMEGA32 ////////////////////////////////////////
-#elif defined (__AVR_ATmega32__) || defined (__AVR_ATmega323__)
-
-#ifdef __AVR_ATmega323__
-
-// renamed bits
-#define WGM20 PWM2
-#define WGM21 CTC2
-
-#define WGM10 PWM10
-#define WGM11 PWM11
-#define WGM12 3//CTC1
-#define WGM13 4 // reserve bit
-
-#define WGM00 PWM0
-#define WGM01 CTC0
-
-#endif // mega323
-
-
-// OCR_BITS
-#define OCR0_DDR DDRB
-#define OCR0_BIT 3
-#define OCR1A_DDR DDRD
-#define OCR1A_BIT 5
-#define OCR1B_DDR DDRD
-#define OCR1B_BIT 4
-#define OCR2_DDR DDRD
-#define OCR2_BIT 7
-
-
-// ATMEGA8 ////////////////////////////////////////
-#elif defined (__AVR_ATmega8__)
-
-// OCR_BITS
-#define OCR1A_DDR DDRB
-#define OCR1A_BIT 1
-#define OCR1B_DDR DDRB
-#define OCR1B_BIT 2
-#define OCR2_DDR DDRB
-#define OCR2_BIT 3
-
-
-
-// ATMEGA163 ////////////////////////////////////////
-#elif defined (__AVR_ATmega163__)
-
-// renamed bits
-#define WGM20 PWM2
-#define WGM21 CTC2
-
-#define WGM10 PWM10
-#define WGM11 PWM11
-#define WGM12 CTC1
-#define WGM13 4 // reserve bit
-
-// OCR_BITS
-#define OCR1A_DDR DDRD
-#define OCR1A_BIT 5
-#define OCR1B_DDR DDRD
-#define OCR1B_BIT 4
-#define OCR2_DDR DDRD
-#define OCR2_BIT 7
-
-
-// ATMEGAx8 ////////////////////////////////////////
-#elif defined (__AVR_ATmega48__) || defined (__AVR_ATmega88__) || defined (__AVR_ATmega168__)
-
-// OCR_BITS
-#define OCR0A_DDR DDRD
-#define OCR0A_BIT 6
-#define OCR0B_DDR DDRD
-#define OCR0B_BIT 5
-
-#define OCR1A_DDR DDRB
-#define OCR1A_BIT 1
-#define OCR1B_DDR DDRB
-#define OCR1B_BIT 2
-
-#define OCR2A_DDR DDRB
-#define OCR2A_BIT 3
-#define OCR2B_DDR DDRD
-#define OCR2B_BIT 3
-
-
-#else
-//#error No timer/prescaler definitions for your AVR type
-#endif
-
-#endif
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