net/bnxt: check FW capability for VLAN offloads
[dpdk.git] / drivers / net / bnxt / bnxt.h
index 72513fe..3ccc06c 100644 (file)
 #define        BNXT_DEFAULT_VNIC_CHANGE_VF_ID_SFT              \
        HWRM_ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_VF_ID_SFT
 
+#define BNXT_EVENT_ERROR_REPORT_TYPE(data1)                            \
+       (((data1) &                                                     \
+         HWRM_ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_MASK)  >>\
+        HWRM_ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_SFT)
+
 #define BNXT_HWRM_CMD_TO_FORWARD(cmd)  \
                (bp->pf->vf_req_fwd[(cmd) / 32] |= (1 << ((cmd) % 32)))
 
@@ -292,6 +297,7 @@ struct bnxt_link_info {
        uint16_t                auto_pam4_link_speeds;
        uint16_t                support_pam4_auto_speeds;
        uint8_t                 req_signal_mode;
+       uint8_t                 module_status;
 };
 
 #define BNXT_COS_QUEUE_COUNT   8
@@ -571,8 +577,7 @@ struct bnxt_rep_info {
        ETH_RSS_NONFRAG_IPV6_UDP |      \
        ETH_RSS_LEVEL_MASK)
 
-#define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
-                                    DEV_TX_OFFLOAD_IPV4_CKSUM | \
+#define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_IPV4_CKSUM | \
                                     DEV_TX_OFFLOAD_TCP_CKSUM | \
                                     DEV_TX_OFFLOAD_UDP_CKSUM | \
                                     DEV_TX_OFFLOAD_TCP_TSO | \
@@ -585,7 +590,6 @@ struct bnxt_rep_info {
                                     DEV_TX_OFFLOAD_MULTI_SEGS)
 
 #define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
-                                    DEV_RX_OFFLOAD_VLAN_STRIP | \
                                     DEV_RX_OFFLOAD_IPV4_CKSUM | \
                                     DEV_RX_OFFLOAD_UDP_CKSUM | \
                                     DEV_RX_OFFLOAD_TCP_CKSUM | \
@@ -609,6 +613,49 @@ struct bnxt_flow_stat_info {
        struct bnxt_ctx_mem_buf_info tx_fc_out_tbl;
 };
 
+struct bnxt_ring_stats {
+       /* Number of transmitted unicast packets */
+       uint64_t        tx_ucast_pkts;
+       /* Number of transmitted multicast packets */
+       uint64_t        tx_mcast_pkts;
+       /* Number of transmitted broadcast packets */
+       uint64_t        tx_bcast_pkts;
+       /* Number of packets discarded in transmit path */
+       uint64_t        tx_discard_pkts;
+       /* Number of packets in transmit path with error */
+       uint64_t        tx_error_pkts;
+       /* Number of transmitted bytes for unicast traffic */
+       uint64_t        tx_ucast_bytes;
+       /* Number of transmitted bytes for multicast traffic */
+       uint64_t        tx_mcast_bytes;
+       /* Number of transmitted bytes for broadcast traffic */
+       uint64_t        tx_bcast_bytes;
+       /* Number of received unicast packets */
+       uint64_t        rx_ucast_pkts;
+       /* Number of received multicast packets */
+       uint64_t        rx_mcast_pkts;
+       /* Number of received broadcast packets */
+       uint64_t        rx_bcast_pkts;
+       /* Number of packets discarded in receive path */
+       uint64_t        rx_discard_pkts;
+       /* Number of packets in receive path with errors */
+       uint64_t        rx_error_pkts;
+       /* Number of received bytes for unicast traffic */
+       uint64_t        rx_ucast_bytes;
+       /* Number of received bytes for multicast traffic */
+       uint64_t        rx_mcast_bytes;
+       /* Number of received bytes for broadcast traffic */
+       uint64_t        rx_bcast_bytes;
+       /* Number of aggregated unicast packets */
+       uint64_t        rx_agg_pkts;
+       /* Number of aggregated unicast bytes */
+       uint64_t        rx_agg_bytes;
+       /* Number of aggregation events */
+       uint64_t        rx_agg_events;
+       /* Number of aborted aggregations */
+       uint64_t        rx_agg_aborts;
+};
+
 struct bnxt {
        void                            *bar0;
 
@@ -645,10 +692,9 @@ struct bnxt {
 #define BNXT_FLAG_RX_VECTOR_PKT_MODE           BIT(24)
 #define BNXT_FLAG_FLOW_XSTATS_EN               BIT(25)
 #define BNXT_FLAG_DFLT_MAC_SET                 BIT(26)
-#define BNXT_FLAG_TRUFLOW_EN                   BIT(27)
-#define BNXT_FLAG_GFID_ENABLE                  BIT(28)
-#define BNXT_FLAG_RFS_NEEDS_VNIC               BIT(29)
-#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(30)
+#define BNXT_FLAG_GFID_ENABLE                  BIT(27)
+#define BNXT_FLAG_RFS_NEEDS_VNIC               BIT(28)
+#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(29)
 #define BNXT_RFS_NEEDS_VNIC(bp)        ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC)
 #define BNXT_PF(bp)            (!((bp)->flags & BNXT_FLAG_VF))
 #define BNXT_VF(bp)            ((bp)->flags & BNXT_FLAG_VF)
@@ -664,14 +710,16 @@ struct bnxt {
 #define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_P5(bp))
 #define BNXT_FLOW_XSTATS_EN(bp)        ((bp)->flags & BNXT_FLAG_FLOW_XSTATS_EN)
 #define BNXT_HAS_DFLT_MAC_SET(bp)      ((bp)->flags & BNXT_FLAG_DFLT_MAC_SET)
-#define BNXT_TRUFLOW_EN(bp)    ((bp)->flags & BNXT_FLAG_TRUFLOW_EN)
 #define BNXT_GFID_ENABLED(bp)  ((bp)->flags & BNXT_FLAG_GFID_ENABLE)
 
        uint32_t                        flags2;
 #define BNXT_FLAGS2_PTP_TIMESYNC_ENABLED       BIT(0)
 #define BNXT_FLAGS2_PTP_ALARM_SCHEDULED                BIT(1)
+#define        BNXT_FLAGS2_ACCUM_STATS_EN              BIT(2)
 #define BNXT_P5_PTP_TIMESYNC_ENABLED(bp)       \
        ((bp)->flags2 & BNXT_FLAGS2_PTP_TIMESYNC_ENABLED)
+#define        BNXT_ACCUM_STATS_EN(bp)                 \
+       ((bp)->flags2 & BNXT_FLAGS2_ACCUM_STATS_EN)
 
        uint16_t                chip_num;
 #define CHIP_NUM_58818         0xd818
@@ -686,6 +734,9 @@ struct bnxt {
 #define BNXT_FW_CAP_ADV_FLOW_MGMT      BIT(5)
 #define BNXT_FW_CAP_ADV_FLOW_COUNTERS  BIT(6)
 #define BNXT_FW_CAP_LINK_ADMIN         BIT(7)
+#define BNXT_FW_CAP_TRUFLOW_EN         BIT(8)
+#define BNXT_FW_CAP_VLAN_TX_INSERT     BIT(9)
+#define BNXT_TRUFLOW_EN(bp)    ((bp)->fw_cap & BNXT_FW_CAP_TRUFLOW_EN)
 
        pthread_mutex_t         flow_lock;
 
@@ -693,6 +744,7 @@ struct bnxt {
 #define BNXT_VNIC_CAP_COS_CLASSIFY     BIT(0)
 #define BNXT_VNIC_CAP_OUTER_RSS                BIT(1)
 #define BNXT_VNIC_CAP_RX_CMPL_V2       BIT(2)
+#define BNXT_VNIC_CAP_VLAN_RX_STRIP    BIT(3)
        unsigned int            rx_nr_rings;
        unsigned int            rx_cp_nr_rings;
        unsigned int            rx_num_qs_per_vnic;
@@ -720,7 +772,7 @@ struct bnxt {
        uint32_t                max_ring_grps;
        struct bnxt_ring_grp_info       *grp_info;
 
-       unsigned int            nr_vnics;
+       uint16_t                        nr_vnics;
 
 #define BNXT_GET_DEFAULT_VNIC(bp)      (&(bp)->vnic_info[0])
        struct bnxt_vnic_info   *vnic_info;
@@ -828,16 +880,19 @@ struct bnxt {
        uint16_t                port_svif;
 
        struct tf               tfp;
+       struct tf               tfp_shared;
        struct bnxt_ulp_context *ulp_ctx;
        struct bnxt_flow_stat_info *flow_stat;
        uint16_t                max_num_kflows;
+       uint8_t                 app_id;
        uint16_t                tx_cfa_action;
+       struct bnxt_ring_stats  *prev_rx_ring_stats;
+       struct bnxt_ring_stats  *prev_tx_ring_stats;
 };
 
 static
 inline uint16_t bnxt_max_rings(struct bnxt *bp)
 {
-       struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
        uint16_t max_tx_rings = bp->max_tx_rings;
        uint16_t max_rx_rings = bp->max_rx_rings;
        uint16_t max_cp_rings = bp->max_cp_rings;
@@ -855,17 +910,12 @@ inline uint16_t bnxt_max_rings(struct bnxt *bp)
                                       bp->max_stat_ctx / 2U);
        }
 
-       if (BNXT_CHIP_P5(bp)) {
-               /* RSS table size in Thor is 512.
-                * Cap max Rx rings to the same value for RSS.
-                * For non-RSS case cap it to the max VNIC count.
-                */
-               if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
-                       max_rx_rings = RTE_MIN(max_rx_rings,
-                                              BNXT_RSS_TBL_SIZE_P5);
-               else
-                       max_rx_rings = RTE_MIN(max_rx_rings, bp->max_vnics);
-       }
+       /*
+        * RSS table size in Thor is 512.
+        * Cap max Rx rings to the same value for RSS.
+        */
+       if (BNXT_CHIP_P5(bp))
+               max_rx_rings = RTE_MIN(max_rx_rings, BNXT_RSS_TBL_SIZE_P5);
 
        max_tx_rings = RTE_MIN(max_tx_rings, max_rx_rings);
        if (max_cp_rings > BNXT_NUM_ASYNC_CPR(bp))
@@ -926,6 +976,20 @@ struct bnxt_vf_rep_tx_queue {
        struct bnxt_representor *bp;
 };
 
+#define I2C_DEV_ADDR_A0                        0xa0
+#define I2C_DEV_ADDR_A2                        0xa2
+#define SFF_DIAG_SUPPORT_OFFSET                0x5c
+#define SFF_MODULE_ID_SFP              0x3
+#define SFF_MODULE_ID_QSFP             0xc
+#define SFF_MODULE_ID_QSFP_PLUS                0xd
+#define SFF_MODULE_ID_QSFP28           0x11
+#define SFF8636_FLATMEM_OFFSET         0x2
+#define SFF8636_FLATMEM_MASK           0x4
+#define SFF8636_OPT_PAGES_OFFSET       0xc3
+#define SFF8636_PAGE1_MASK             0x40
+#define SFF8636_PAGE2_MASK             0x80
+#define BNXT_MAX_PHY_I2C_RESP_SIZE     64
+
 int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);
 int bnxt_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete,
                     bool exp_link_status);
@@ -987,7 +1051,11 @@ int32_t
 bnxt_ulp_create_vfr_default_rules(struct rte_eth_dev *vfr_ethdev);
 int32_t
 bnxt_ulp_delete_vfr_default_rules(struct bnxt_representor *vfr);
+void bnxt_get_iface_mac(uint16_t port, enum bnxt_ulp_intf_type type,
+                       uint8_t *mac, uint8_t *parent_mac);
 uint16_t bnxt_get_vnic_id(uint16_t port, enum bnxt_ulp_intf_type type);
+uint16_t bnxt_get_parent_vnic_id(uint16_t port, enum bnxt_ulp_intf_type type);
+struct bnxt *bnxt_get_bp(uint16_t port);
 uint16_t bnxt_get_svif(uint16_t port_id, bool func_svif,
                       enum bnxt_ulp_intf_type type);
 uint16_t bnxt_get_fw_func_id(uint16_t port, enum bnxt_ulp_intf_type type);