if (flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_LINK_ADMIN_STATUS_SUPPORTED)
bp->fw_cap |= BNXT_FW_CAP_LINK_ADMIN;
+ if (!(flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VLAN_ACCELERATION_TX_DISABLED)) {
+ bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT;
+ PMD_DRV_LOG(DEBUG, "VLAN acceleration for TX is enabled\n");
+ }
unlock:
HWRM_UNLOCK();
if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_RX_CMPL_V2_CAP)
bp->vnic_cap_flags |= BNXT_VNIC_CAP_RX_CMPL_V2;
+ if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_VLAN_STRIP_CAP) {
+ bp->vnic_cap_flags |= BNXT_VNIC_CAP_VLAN_RX_STRIP;
+ PMD_DRV_LOG(DEBUG, "Rx VLAN strip capability enabled\n");
+ }
+
bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported);
HWRM_UNLOCK();
bnxt_vnic_rss_configure_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic)
{
struct hwrm_vnic_rss_cfg_output *resp = bp->hwrm_cmd_resp_addr;
+ uint8_t *rxq_state = bp->eth_dev->data->rx_queue_state;
struct hwrm_vnic_rss_cfg_input req = {.req_type = 0 };
struct bnxt_rx_queue **rxqs = bp->rx_queues;
uint16_t *ring_tbl = vnic->rss_table;
/* Find next active ring. */
for (cnt = 0; cnt < max_rings; cnt++) {
- if (rxqs[k]->rx_started)
+ if (rxq_state[k] != RTE_ETH_QUEUE_STATE_STOPPED)
break;
if (++k == max_rings)
k = 0;