dpdk.git
5 years agonet/mlx5: revert mbuf address calculation for x86
Yongseok Koh [Mon, 25 Mar 2019 19:13:10 +0000 (12:13 -0700)]
net/mlx5: revert mbuf address calculation for x86

When replenishing mbufs on Rx, buffer address (mbuf->buf_addr) should be
loaded. non-x86 processors (mostly RISC such as ARM and Power) are more
vulnerable to load stall. For x86, reducing the number of instructions
seems to matter most.

For x86, this is simply a load but for other architectures, it is
calculated from the address of mbuf structure by rte_mbuf_buf_addr()
without having to load the first cacheline of the mbuf.

Fixes: 12d468a62bc1 ("net/mlx5: fix instruction hotspot on replenishing Rx buffer")
Cc: stable@dpdk.org
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
5 years agodoc: update LTS section
Kevin Traynor [Thu, 7 Feb 2019 15:39:58 +0000 (15:39 +0000)]
doc: update LTS section

Update the LTS section to mention the branch and how LTS support ends.

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
5 years agodoc: note validation and timeline required for stables
Kevin Traynor [Wed, 27 Mar 2019 17:22:06 +0000 (17:22 +0000)]
doc: note validation and timeline required for stables

If a stable branch for a specific DPDK release is to proceed,
along with needing a maintainer, there should also be commitment
from major contributors for validation of the releases.

Also, as decided in the March 27th techboard, to facilitate user
planning, a release should be designated as a stable release
no later than 1 month after it's initial master release.

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
5 years agocfgfile: replace strcat with strlcat
Chaitanya Babu Talluri [Fri, 8 Mar 2019 12:45:50 +0000 (12:45 +0000)]
cfgfile: replace strcat with strlcat

Replace strcat with strlcat to avoid buffer overflow.

Fixes: a6a47ac9c2 ("cfgfile: rework load function")
Cc: stable@dpdk.org
Signed-off-by: Chaitanya Babu Talluri <tallurix.chaitanya.babu@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agodoc: fix ABI check script examples
David Marchand [Tue, 19 Mar 2019 14:05:18 +0000 (15:05 +0100)]
doc: fix ABI check script examples

The doc examples are not aligned on the script following the
incriminated commit.

Fixes: c4a5fe3bf832 ("devtools: rework ABI checker script")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
5 years agodoc: fix two typos in contributing guide
Rami Rosen [Fri, 15 Mar 2019 09:19:00 +0000 (11:19 +0200)]
doc: fix two typos in contributing guide

This patch fixes two typos in the coding style part of
DPDK contributing guide:

- The header entry should have .h file instead of .c file.
- The will->This will

Fixes: 44a6dface13b ("doc: describe how to add new components")
Cc: stable@dpdk.org
Signed-off-by: Rami Rosen <ramirose@gmail.com>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
5 years agodoc: fix links to doxygen and sphinx sites
Dekel Peled [Wed, 3 Apr 2019 11:04:11 +0000 (14:04 +0300)]
doc: fix links to doxygen and sphinx sites

Update broken links, replace with valid links.

Fixes: 7798f17a0d62 ("doc: add documentation guidelines")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
5 years agoeal: fix typo in comment of vector function
Dekel Peled [Mon, 1 Apr 2019 11:06:20 +0000 (14:06 +0300)]
eal: fix typo in comment of vector function

Remove redundant item 'a4' in comment.

Fixes: 86c743cf9140 ("eal: define generic vector types")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
5 years agomaintainers: add switch doc to ethdev section
Dekel Peled [Mon, 1 Apr 2019 11:05:14 +0000 (14:05 +0300)]
maintainers: add switch doc to ethdev section

This patch adds file to "Ethernet API" section of MAINTAINERS file:
F: doc/guides/prog_guide/switch_representation.rst

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
5 years agotest/hash: replace sprintf with snprintf
Pallantla Poornima [Tue, 26 Mar 2019 10:27:23 +0000 (10:27 +0000)]
test/hash: replace sprintf with snprintf

sprintf function is not secure as it doesn't check the length of string.
More secure function snprintf is used.

Fixes: 473d1bebce ("hash: allow to store data in hash table")
Cc: stable@dpdk.org
Signed-off-by: Pallantla Poornima <pallantlax.poornima@intel.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
5 years agotest/distributor: replace sprintf with strlcpy
Pallantla Poornima [Thu, 14 Feb 2019 09:45:49 +0000 (09:45 +0000)]
test/distributor: replace sprintf with strlcpy

sprintf function is not secure as it doesn't check the length of string.
replaced sprintf with strlcpy.

Fixes: f74df2c57e ("test/distributor: test single and burst API")
Cc: stable@dpdk.org
Signed-off-by: Pallantla Poornima <pallantlax.poornima@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
5 years agopower: remove unused variable
Pallantla Poornima [Fri, 15 Feb 2019 10:28:44 +0000 (10:28 +0000)]
power: remove unused variable

Variable pfi_str is removed since it is unused.

Fixes: 450f0791312c ("power: add traffic pattern aware power control")
Cc: stable@dpdk.org
Signed-off-by: Pallantla Poornima <pallantlax.poornima@intel.com>
Reviewed-by: Rami Rosen <ramirose@gmail.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Acked-by: David Hunt <david.hunt@intel.com>
5 years agoraw/dpaa2_qdma: support non prefetch mode
Hemant Agrawal [Thu, 4 Apr 2019 11:50:28 +0000 (11:50 +0000)]
raw/dpaa2_qdma: support non prefetch mode

This patch add support for non prefetch mode in Rx functions.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agoraw/dpaa2: remove logs from datapath
Nipun Gupta [Thu, 4 Apr 2019 11:50:27 +0000 (11:50 +0000)]
raw/dpaa2: remove logs from datapath

The runtime traces shall not be present in datapath

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
5 years agoraw/dpaa2_qdma: support RBP mode
Hemant Agrawal [Thu, 4 Apr 2019 11:50:25 +0000 (11:50 +0000)]
raw/dpaa2_qdma: support RBP mode

Add support for route by port mode. The route by port
feature in HW helps in translating the PCI address
of connected device.

Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com>
Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agoraw/dpaa2_qdma: support burst mode
Hemant Agrawal [Thu, 4 Apr 2019 11:50:23 +0000 (11:50 +0000)]
raw/dpaa2_qdma: support burst mode

This patch adds support the batch processing for the qdma jobs

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Yi Liu <yi.liu@nxp.com>
5 years agoraw/dpaa2_qdma: fix to support multiprocess execution
Shreyansh Jain [Thu, 4 Apr 2019 11:50:21 +0000 (11:50 +0000)]
raw/dpaa2_qdma: fix to support multiprocess execution

Fixes: c22fab9a6c34 ("raw/dpaa2_qdma: support configuration APIs")
Cc: stable@dpdk.org
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agoraw/dpaa2_qdma: remove experimental tag from APIs
Hemant Agrawal [Thu, 4 Apr 2019 11:50:19 +0000 (11:50 +0000)]
raw/dpaa2_qdma: remove experimental tag from APIs

These APIs has been in the DPDK for few release now.
This patch removes the experimental tags for the APIs.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agoconfig: increase maximum number of raw devices to 64
Hemant Agrawal [Thu, 4 Apr 2019 11:50:18 +0000 (11:50 +0000)]
config: increase maximum number of raw devices to 64

The current value is 10, which is not sufficient for many use-cases.
e.g. NXP LX2 with raw qdma devices can use 32-48 raw devices in some
use-cases. So, making it to 64 to cover various cases.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agodoc: bump NXP SDK support version for dpaa2
Shreyansh Jain [Thu, 4 Apr 2019 07:23:25 +0000 (07:23 +0000)]
doc: bump NXP SDK support version for dpaa2

With the change in MC firmware, minimum supported version of
the Layerscape SDK too needs to be changed.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agonet/dpaa2: update MC firmware version for FSLMC bus
Shreyansh Jain [Thu, 4 Apr 2019 07:23:24 +0000 (07:23 +0000)]
net/dpaa2: update MC firmware version for FSLMC bus

MC firmware is the core component of FSLMC bus and DPAA2 devices.
Prior to this patch, MC firmware supported 10.10.x version. This
patch bumps the min supported version to 10.14.x.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agobus/fslmc: cleanup unused firmware code
Shreyansh Jain [Thu, 4 Apr 2019 07:23:22 +0000 (07:23 +0000)]
bus/fslmc: cleanup unused firmware code

Removes some unused firmware code which was added in last bump
of the firmware version. No current features uses these APIs.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agoreplace snprintf with strlcpy
Bruce Richardson [Wed, 3 Apr 2019 14:45:05 +0000 (15:45 +0100)]
replace snprintf with strlcpy

Do a global replace of snprintf(..."%s",...) with strlcpy, adding in the
rte_string_fns.h header if needed.  The function changes in this patch were
auto-generated via command:

  spatch --sp-file devtools/cocci/strlcpy.cocci --dir . --in-place

and then the files edited using awk to add in the missing header:

  gawk -i inplace '/include <rte_/ && ! seen { \
   print "#include <rte_string_fns.h>"; seen=1} {print}'

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agoreplace snprintf with strlcpy without adding extra include
Bruce Richardson [Wed, 3 Apr 2019 14:45:04 +0000 (15:45 +0100)]
replace snprintf with strlcpy without adding extra include

For files that already have rte_string_fns.h included in them, we can
do a straight replacement of snprintf(..."%s",...) with strlcpy. The
changes in this patch were auto-generated via command:

spatch --sp-file devtools/cocci/strlcpy-with-header.cocci --dir . --in-place

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agodevtools/cocci: create safer version of strlcpy script
Bruce Richardson [Wed, 3 Apr 2019 14:45:03 +0000 (15:45 +0100)]
devtools/cocci: create safer version of strlcpy script

The existing cocci script for coccinelle replaces all matching instances
of snprintf() with strlcpy() without regards to header inclusion. To allow
changes without build errors, we create a safer version of this script
that only makes changes when the rte_string_fns.h header is already
included.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agodevtools/cocci: make strlcpy replacement smarter
Bruce Richardson [Wed, 3 Apr 2019 14:45:02 +0000 (15:45 +0100)]
devtools/cocci: make strlcpy replacement smarter

The original coccinelle script worked by replacing instances of
snprintf(.."%s",...) with strlcpy(), but only where the source and dest
parameters were plain identifiers. Allowing expressions for those params
opens up a wide range of other possible changes.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agonet/bonding: fix buffer length when printing strings
Bruce Richardson [Wed, 3 Apr 2019 14:45:01 +0000 (15:45 +0100)]
net/bonding: fix buffer length when printing strings

Using the size of the source string is incorrect when printing using
snprintf. Instead pass in the buffer size to be used appropriately.

Fixes: 457ecf2953fc ("bond: add debug info for mode 6")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agoeal: tighten permissions on shared memory files
Bruce Richardson [Wed, 3 Apr 2019 16:00:34 +0000 (17:00 +0100)]
eal: tighten permissions on shared memory files

When creating files on disk, e.g. for EAL configuration or shared memory
locks, etc., there is no need to grant any permissions on those files to
other users. All directories are already created with 0700 permissions, so
we should create all files with 0600 permissions.

Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
5 years agodrivers: remove Linux EAL from include path
David Marchand [Wed, 3 Apr 2019 08:52:19 +0000 (10:52 +0200)]
drivers: remove Linux EAL from include path

None of those drivers require EAL linux specific headers.

Signed-off-by: David Marchand <david.marchand@redhat.com>
5 years agoring: fix namesize macro documentation block
Gage Eads [Thu, 4 Apr 2019 12:34:54 +0000 (07:34 -0500)]
ring: fix namesize macro documentation block

'/**<' style comments apply to the previous member, which caused doxygen to
emit the RTE_RING_NAMESIZE documentation for RTE_RING_MZ_PREFIX.

Fixes: 38c9817ee1d8 ("mempool: adjust name size in related data types")
Cc: stable@dpdk.org
Signed-off-by: Gage Eads <gage.eads@intel.com>
5 years agomempool/stack: add lock-free stack mempool handler
Gage Eads [Wed, 3 Apr 2019 23:20:20 +0000 (18:20 -0500)]
mempool/stack: add lock-free stack mempool handler

This commit adds support for lock-free (linked list based) stack mempool
handler.

In mempool_perf_autotest the lock-based stack outperforms the
lock-free handler for certain lcore/alloc count/free count
combinations*, however:
- For applications with preemptible pthreads, a standard (lock-based)
  stack's worst-case performance (i.e. one thread being preempted while
  holding the spinlock) is much worse than the lock-free stack's.
- Using per-thread mempool caches will largely mitigate the performance
  difference.

*Test setup: x86_64 build with default config, dual-socket Xeon E5-2699 v4,
running on isolcpus cores with a tickless scheduler. The lock-based stack's
rate_persec was 0.6x-3.5x the lock-free stack's.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
5 years agotest/stack: check lock-free implementation
Gage Eads [Wed, 3 Apr 2019 23:20:19 +0000 (18:20 -0500)]
test/stack: check lock-free implementation

This commit adds lock-free stack variants of stack_autotest
(stack_lf_autotest) and stack_perf_autotest (stack_lf_perf_autotest), which
differ only in that the lock-free versions pass the RTE_STACK_F_LF flag to
all rte_stack_create() calls.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
5 years agostack: add C11 atomic implementation
Gage Eads [Wed, 3 Apr 2019 23:20:18 +0000 (18:20 -0500)]
stack: add C11 atomic implementation

This commit adds an implementation of the lock-free stack push, pop, and
length functions that use __atomic builtins, for systems that benefit from
the finer-grained memory ordering control.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
5 years agostack: add lock-free implementation
Gage Eads [Wed, 3 Apr 2019 23:20:17 +0000 (18:20 -0500)]
stack: add lock-free implementation

This commit adds support for a lock-free (linked list based) stack to the
stack API. This behavior is selected through a new rte_stack_create() flag,
RTE_STACK_F_LF.

The stack consists of a linked list of elements, each containing a data
pointer and a next pointer, and an atomic stack depth counter.

The lock-free push operation enqueues a linked list of pointers by pointing
the tail of the list to the current stack head, and using a CAS to swing
the stack head pointer to the head of the list. The operation retries if it
is unsuccessful (i.e. the list changed between reading the head and
modifying it), else it adjusts the stack length and returns.

The lock-free pop operation first reserves num elements by adjusting the
stack length, to ensure the dequeue operation will succeed without
blocking. It then dequeues pointers by walking the list -- starting from
the head -- then swinging the head pointer (using a CAS as well). While
walking the list, the data pointers are recorded in an object table.

This algorithm stack uses a 128-bit compare-and-swap instruction, which
atomically updates the stack top pointer and a modification counter, to
protect against the ABA problem.

The linked list elements themselves are maintained in a lock-free LIFO
list, and are allocated before stack pushes and freed after stack pops.
Since the stack has a fixed maximum depth, these elements do not need to be
dynamically created.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
5 years agotest/stack: check stack performance
Gage Eads [Wed, 3 Apr 2019 23:20:16 +0000 (18:20 -0500)]
test/stack: check stack performance

stack_perf_autotest tests the following with one lcore:
- Cycles to attempt to pop an empty stack
- Cycles to push then pop a single object
- Cycles to push then pop a burst of 32 objects

It also tests the cycles to push then pop a burst of 8 and 32 objects with
the following lcore combinations (if possible):
- Two hyperthreads
- Two physical cores
- Two physical cores on separate NUMA nodes
- All available lcores

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
5 years agotest/stack: check stack API
Gage Eads [Wed, 3 Apr 2019 23:20:15 +0000 (18:20 -0500)]
test/stack: check stack API

stack_autotest performs positive and negative testing of the stack API, and
exercises the push and pop datapath functions with all available lcores.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
5 years agomempool/stack: use stack library
Gage Eads [Wed, 3 Apr 2019 23:20:14 +0000 (18:20 -0500)]
mempool/stack: use stack library

The new rte_stack library is derived from the mempool handler, so this
commit removes duplicated code and simplifies the handler by migrating it
to this new API.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
5 years agostack: introduce stack library
Gage Eads [Wed, 3 Apr 2019 23:20:13 +0000 (18:20 -0500)]
stack: introduce stack library

The rte_stack library provides an API for configuration and use of a
bounded stack of pointers. Push and pop operations are MT-safe, allowing
concurrent access, and the interface supports pushing and popping multiple
pointers at a time.

The library's interface is modeled after another DPDK data structure,
rte_ring, and its lock-based implementation is derived from the stack
mempool handler. An upcoming commit will migrate the stack mempool handler
to rte_stack.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
5 years agoeal/x86: fix pedantic build
Thomas Monjalon [Thu, 4 Apr 2019 12:53:05 +0000 (14:53 +0200)]
eal/x86: fix pedantic build

When enabling pedantic compilation with CONFIG_RTE_LIBRTE_MLX5_DEBUG,
the compiler complains about non standard 128-bit integer type:

include/rte_atomic_64.h:223:3: error:
ISO C does not support â€˜__int128’ types [-Werror=pedantic]

It must be marked as an extension of the standard C language
to be accepted in pedantic compilation.

Fixes: 640c5f09ef2c ("eal/x86: add 128-bit atomic compare exchange")
Cc: gage.eads@intel.com
Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Gage Eads <gage.eads@intel.com>
Tested-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agodoc: update supported algorithms in IPsec guide
Fan Zhang [Wed, 3 Apr 2019 11:03:24 +0000 (12:03 +0100)]
doc: update supported algorithms in IPsec guide

This patch updates the ipsec library programmer's guide with
the additional algorithms which are now supported.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
5 years agodoc: announce cryptodev xform API change
Fan Zhang [Fri, 22 Mar 2019 16:34:31 +0000 (16:34 +0000)]
doc: announce cryptodev xform API change

This patch adds the deprecation notice of changing Cryptodev
symmetric xform structure. The proposed change is to making
key pointers in the crypto xforms (cipher, auth, aead) to
indicate neither the library or the drivers will not change
the content of the key buffer.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
5 years agodoc: add IPsec library in release notes
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:44 +0000 (09:34 +0100)]
doc: add IPsec library in release notes

Add librte_ipsec into 'Shared Library Versions' list in the release notes.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: de-duplicate crypto op prepare
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:43 +0000 (09:34 +0100)]
ipsec: de-duplicate crypto op prepare

For sym_crypto_op prepare move common code into a separate function(s).

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: reorder packet process for ESP inbound
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:42 +0000 (09:34 +0100)]
ipsec: reorder packet process for ESP inbound

Change the order of operations for esp inbound post-process:
- read mbuf metadata and esp tail first for all packets in the burst
  first to minimize stalls due to load latency.
- move code that is common for both transport and tunnel modes into
  separate functions to reduce code duplication.
- add extra check for packet consitency

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: reorder packet check for ESP inbound
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:41 +0000 (09:34 +0100)]
ipsec: reorder packet check for ESP inbound

Right now check for packet length and padding is done inside cop_prepare().
It makes sense to have all necessary checks in one place at early stage:
inside pkt_prepare().
That allows to simplify (and later hopefully) optimize cop_prepare() part.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: move inbound and outbound code
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:40 +0000 (09:34 +0100)]
ipsec: move inbound and outbound code

sa.c becomes too big, so decided to split it into 3 chunks:
 - sa.c - control path related functions (init/fini, etc.)
 - esp_inb.c - ESP inbound packet processing
 - esp_outb.c - ESP outbound packet processing

Plus few changes in internal function names to follow the same
code convention.
No functional changes introduced.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: change the way unprocessed mbufs are accounted
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:39 +0000 (09:34 +0100)]
ipsec: change the way unprocessed mbufs are accounted

As was pointed in one of previous reviews - we can avoid updating
contents of mbuf array for successfully processed packets.
Instead store indexes of failed packets, to move them beyond the good
ones later.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: change order in filling crypto op
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:38 +0000 (09:34 +0100)]
ipsec: change order in filling crypto op

Right now we first fill crypto_sym_op part of crypto_op,
then in a separate cycle we fill crypto op fields.
It makes more sense to fill whole crypto-op in one go instead.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoipsec: add Tx offload template into SA
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:37 +0000 (09:34 +0100)]
ipsec: add Tx offload template into SA

Operations to set/update bit-fields often cause compilers
to generate suboptimal code. To avoid such negative effect,
use tx_offload raw value and mask to update l2_len and l3_len
fields within mbufs.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agombuf: add function to generate raw Tx offload value
Konstantin Ananyev [Tue, 2 Apr 2019 08:34:36 +0000 (09:34 +0100)]
mbuf: add function to generate raw Tx offload value

Operations to set/update bit-fields often cause compilers
to generate suboptimal code.
To help avoid such situation for tx_offload fields:
introduce new enum for tx_offload bit-fields lengths and offsets,
and new function to generate raw tx_offload value.
Add new test-case into UT for introduced function.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
5 years agoapp/compress-perf: add incompressible data handling
Tomasz Jozwiak [Fri, 1 Mar 2019 08:45:10 +0000 (09:45 +0100)]
app/compress-perf: add incompressible data handling

Currently, compress-perf doesn't respect incompressible
data inside one operation.

This patch adds such a functionality. Now the output buffer
in one operation is big enough to store such a data after
compression. Also added segment size checking to pass
values in right range.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocompress/isal: fix getting information about CPU
Tomasz Cel [Thu, 7 Mar 2019 11:28:21 +0000 (12:28 +0100)]
compress/isal: fix getting information about CPU

This patch adds query about CPU features

Fixes: 53a9baa98c36 ("compress/isal: add basic PMD ops")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
5 years agodrivers/qat: fix queue pair NUMA node
Tomasz Jozwiak [Tue, 26 Mar 2019 14:20:48 +0000 (15:20 +0100)]
drivers/qat: fix queue pair NUMA node

This patch assigns QAT queue pair resources to the correct NUMA nodes.
Any DMA'able memory should use NUMA node of QAT device
rather than socket_id of the initializing process.

Fixes: 98c4a35c736f ("crypto/qat: move common qat files to common dir")
Fixes: a795248d740b ("compress/qat: add configure and clear functions")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocompress/isal: add appropriate flag on overflow
Lee Daly [Thu, 24 Jan 2019 15:19:13 +0000 (15:19 +0000)]
compress/isal: add appropriate flag on overflow

This patch will change the operation status when ISA-L returns because
of a recoverable out of space error, rather than a just generic fail.

Signed-off-by: Lee Daly <lee.daly@intel.com>
Tested-by: Tomasz Cel <tomaszx.cel@intel.com>
5 years agotest/crypto: check key type feature flag for asym
Ayuj Verma [Thu, 28 Mar 2019 10:28:40 +0000 (10:28 +0000)]
test/crypto: check key type feature flag for asym

crypto pmds are queried to check if Sign and Decrypt
with CRT keys or exponent is supported, thus call
operation with relevant key type.

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/openssl: set RSA private op feature flag
Ayuj Verma [Thu, 28 Mar 2019 10:28:32 +0000 (10:28 +0000)]
crypto/openssl: set RSA private op feature flag

openssl PMD support RSA private key operation
using both qt and exp key type.
Set rsa key type feature flag

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocryptodev: add RSA private key feature flag
Ayuj Verma [Thu, 28 Mar 2019 10:28:22 +0000 (10:28 +0000)]
cryptodev: add RSA private key feature flag

Add feature flag to reflect RSA private key
operation support using quintuple (crt) or
exponent type key. if PMD support both,
then it should set both.

App should query cryptodev feature flag to check
if Sign and Decryt with CRT keys or exponent is
supported, thus call operation with relevant
key type.

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/dpaa2_sec: support multi-process
Akhil Goyal [Wed, 27 Mar 2019 11:53:37 +0000 (11:53 +0000)]
crypto/dpaa2_sec: support multi-process

- fle pool allocations should be done for each process.
- cryptodev->data is shared across muliple processes but
cryptodev itself is allocated for each process. So any
information which needs to be shared between processes,
should be kept in cryptodev->data.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/dpaa_sec: fix session queue attach/detach
Akhil Goyal [Wed, 27 Mar 2019 11:53:36 +0000 (11:53 +0000)]
crypto/dpaa_sec: fix session queue attach/detach

session inq and qp are assigned for each core from which the
packets arrive. This was not correctly handled while supporting
multiple sessions per queue pair.
This patch fixes the attach and detach of queues for each core.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/dpaa2_sec: remove unnecessary flc configurations
Akhil Goyal [Wed, 27 Mar 2019 11:53:34 +0000 (11:53 +0000)]
crypto/dpaa2_sec: remove unnecessary flc configurations

The removed fields are required in case the SEC block
allocates the buffer from bman pool.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agodrivers/crypto: update inline desc for sharing mode
Akhil Goyal [Wed, 27 Mar 2019 11:53:33 +0000 (11:53 +0000)]
drivers/crypto: update inline desc for sharing mode

SEC HW descriptor sharing mode can now be controlled
during Session preparation by the respective drivers

shared descriptors in case of non-protocol offload does not need
any sync between the subsequent jobs. Thus, changing it to
SHR_NEVER from SHR_SERIAL for cipher_only, auth_only, and gcm.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/dpaa2_sec: fix offset calculation for GCM
Akhil Goyal [Wed, 27 Mar 2019 11:53:32 +0000 (11:53 +0000)]
crypto/dpaa2_sec: fix offset calculation for GCM

In case of gcm, output buffer should have aad space
before the actual buffer which needs to be written.
CAAM will not write into the aad anything, it will skip
auth_only_len (aad) and write the buffer afterwards.

Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/dpaa2_sec: fix session clearing
Akhil Goyal [Wed, 27 Mar 2019 11:53:30 +0000 (11:53 +0000)]
crypto/dpaa2_sec: fix session clearing

private data should be cleared instead of the complete session

Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocompress/qat: add dynamic SGL allocation
Tomasz Jozwiak [Tue, 26 Mar 2019 13:51:24 +0000 (14:51 +0100)]
compress/qat: add dynamic SGL allocation

This patch adds dynamic SGL allocation instead of static one.
The number of element in SGL can be adjusted in each operation
depend of the request.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocrypto/aesni_mb: support newer library version only
Fan Zhang [Mon, 25 Mar 2019 13:58:35 +0000 (13:58 +0000)]
crypto/aesni_mb: support newer library version only

As stated in 19.02 deprecation notice, this patch updates the
aesni_mb PMD to remove the support of older Intel-ipsec-mb
library version earlier than 0.52.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
5 years agotest/crypto: check out of place for AESNI-MB
Fan Zhang [Mon, 25 Mar 2019 13:51:21 +0000 (13:51 +0000)]
test/crypto: check out of place for AESNI-MB

This patch updates the unit test to enable AESNI-MB PMD
out-of-place tests. A special test type that swap both
the source and destination buffer is added for a more
comprehensive test set to take place.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocrypto/aesni_mb: enable out of place processing
Fan Zhang [Mon, 25 Mar 2019 13:51:20 +0000 (13:51 +0000)]
crypto/aesni_mb: enable out of place processing

Add out-of-place processing, i.e. different source and
destination m_bufs, plus related capability update, tests
and documentation.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Paul Luse <paul.e.luse@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
5 years agotest/crypto: check asymmetric crypto
Damian Nowak [Wed, 27 Mar 2019 09:45:21 +0000 (10:45 +0100)]
test/crypto: check asymmetric crypto

This patch adds new test structure for modexp
and modinv for asymmetric cryptography.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocrypto/qat: add modular multiplicative inverse
Arek Kusztal [Thu, 28 Mar 2019 13:37:03 +0000 (14:37 +0100)]
crypto/qat: add modular multiplicative inverse

This commit adds modular multiplicative inverse to Intel
QuickAssist Technology driver. For capabilities or limitations
please refer to qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocrypto/qat: add modular exponentiation
Arek Kusztal [Thu, 28 Mar 2019 13:37:02 +0000 (14:37 +0100)]
crypto/qat: add modular exponentiation

This commit adds modular exponentiation to Intel QuickAssist
Technology driver. For capabilities or limitations please refer to
qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocrypto/qat: add asymmetric crypto PMD
Arek Kusztal [Thu, 28 Mar 2019 13:37:01 +0000 (14:37 +0100)]
crypto/qat: add asymmetric crypto PMD

This patch adds Poll Mode Driver for asymmetric crypto
functions of Intel QuickAssist Technology hardware.

It contains plain driver with no functions implemented, specific
algorithms will be introduced in separate patches.

This patch depends on a QAT PF driver for device initialization. See
the file docs/guides/cryptodevs/qat.rst for configuration details.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocommon/qat: add headers for asymmetric crypto
Arek Kusztal [Thu, 28 Mar 2019 13:37:00 +0000 (14:37 +0100)]
common/qat: add headers for asymmetric crypto

This commit adds headers to be used in conjunction with asymmetric
cryptography operations using Intel QuickAssist Technology driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agotest/crypto: check SNOW3G when digest is encrypted
Lukasz Krakowiak [Mon, 25 Mar 2019 10:47:58 +0000 (05:47 -0500)]
test/crypto: check SNOW3G when digest is encrypted

Add test case for encryption, decryption for snow3g when digest
is encrypted

Signed-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agoexamples/ipsec-secgw: fix test script
Konstantin Ananyev [Wed, 27 Mar 2019 09:33:29 +0000 (09:33 +0000)]
examples/ipsec-secgw: fix test script

Fixes: 929784452094 ("examples/ipsec-secgw: add scripts for functional test")
Cc: stable@dpdk.org
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoexamples/ipsec_secgw: fix possible null dereference
Konstantin Ananyev [Wed, 27 Mar 2019 09:33:28 +0000 (09:33 +0000)]
examples/ipsec_secgw: fix possible null dereference

Coverity issue: 336844
Fixes: 3e5f4625dc17 ("examples/ipsec-secgw: make data-path to use IPsec library")
Cc: stable@dpdk.org
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoexamples/ipsec-secgw: fix out-of-bound check
Konstantin Ananyev [Wed, 27 Mar 2019 09:33:27 +0000 (09:33 +0000)]
examples/ipsec-secgw: fix out-of-bound check

Coverity issue: 336791
Fixes: 7622291b641d ("examples/ipsec-secgw: allow to specify neighbour MAC address")
Cc: stable@dpdk.org
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agodoc: announce ABI change for cryptodev config
Anoob Joseph [Thu, 7 Mar 2019 10:39:50 +0000 (10:39 +0000)]
doc: announce ABI change for cryptodev config

Add new field ff_disable in rte_cryptodev_config. This enables
applications to control the features enabled on the crypto device.

Proposed new layout:

/** Crypto device configuration structure */
struct rte_cryptodev_config {
    int socket_id;            /**< Socket to allocate resources on */
    uint16_t nb_queue_pairs;
    /**< Number of queue pairs to configure on device */
+   uint64_t ff_disable;
+   /**< Feature flags to be disabled. Only the following features are
+    * allowed to be disabled,
+    *  - RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO
+    *  - RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO
+    *  - RTE_CRYTPODEV_FF_SECURITY
+    */
};

For eth devices, rte_eth_conf.rx_mode.offloads and
rte_eth_conf.tx_mode.offloads fields are used by applications to
control the offloads enabled on the eth device. This proposal adds a
similar ability for the crypto device.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocompress/isal: fix compression stream initialization
Tomasz Cel [Thu, 28 Mar 2019 09:06:27 +0000 (10:06 +0100)]
compress/isal: fix compression stream initialization

This patch fixes ISAL internal state fields initialization.

Fixes: dc49e6aa4879 ("compress/isal: add ISA-L compression functionality")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agotest/event: replace sprintf with snprintf
Pallantla Poornima [Wed, 6 Feb 2019 10:43:42 +0000 (10:43 +0000)]
test/event: replace sprintf with snprintf

sprintf function is not secure as it doesn't check the length of string.
More secure function snprintf is used.

Fixes: 2a9c83ae3b ("test/eventdev: add multi-ports test")
Cc: stable@dpdk.org
Signed-off-by: Pallantla Poornima <pallantlax.poornima@intel.com>
5 years agoapp/eventdev: add option for global dequeue timeout
Pavan Nikhilesh [Fri, 29 Mar 2019 07:11:46 +0000 (07:11 +0000)]
app/eventdev: add option for global dequeue timeout

Add option to provide a global dequeue timeout that is used to create
the eventdev.
The dequeue timeout provided will be common across all the worker
ports. If the eventdev hardware supports power management through
dequeue timeout then this option can be used for verifying power
demands at various packet rates.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
5 years agoevent/sw: fix enqueue checks in self-test
Harry van Haaren [Wed, 27 Mar 2019 18:45:46 +0000 (18:45 +0000)]
event/sw: fix enqueue checks in self-test

This patch fixes a number of instances of the same return
value mis-check, where previously we checked for a negative
return value as error, however the API returns an unsigned
integer, so these return value checks are invalid.

The rte_event_enqueue_burst() API returns the number of
events enqueued, so in order to identify the error case,
we must check for != the number of intended enqueues.

Fixes: cd1a9e3eab55 ("test/eventdev: add SW tests for load balancing")
Cc: stable@dpdk.org
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
5 years agotest/event: improve compatibility for timer adapter
Pavan Nikhilesh [Sat, 16 Mar 2019 20:27:39 +0000 (20:27 +0000)]
test/event: improve compatibility for timer adapter

Check if eventdev is open system eventdevs i.e. max_num_events = -1
before asserting.
Allow event timer adapter to adjust the resolution using
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES and re-calculate timeout ticks
based on the adjusted resolution.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
5 years agoeventdev: check timer adapter status before start
Pavan Nikhilesh [Sat, 16 Mar 2019 20:27:36 +0000 (20:27 +0000)]
eventdev: check timer adapter status before start

Check if timer adapter is already started before starting it.
Update the unit test accordingly.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
5 years agoeal: allow to override init macros per OS
Jerin Jacob [Wed, 3 Apr 2019 19:28:40 +0000 (19:28 +0000)]
eal: allow to override init macros per OS

baremetal execution environments may have a different
method to enable RTE_INIT instead of using compiler
constructor and/or OS specific linker scheme.
Allow an option to override RTE_INIT* macros using
rte_os.h or appropriate header file.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
5 years agoeal/x86: add 128-bit atomic compare exchange
Gage Eads [Wed, 3 Apr 2019 19:44:56 +0000 (14:44 -0500)]
eal/x86: add 128-bit atomic compare exchange

This operation can be used for non-blocking algorithms, such as a
non-blocking stack or ring.

It is available only for x86_64.

Signed-off-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
5 years agotest/hash: check lock-free extendable bucket
Dharmik Thakkar [Tue, 2 Apr 2019 19:44:55 +0000 (19:44 +0000)]
test/hash: check lock-free extendable bucket

Add unit test to check for hash lookup and bulk-lookup perf for
extendable bucket feature.
It is tested with both lock-free enabled and lock-free disabled case.

Test includes:

- hash lookup on keys in ext bkt
- hash delete causing key-shifts of keys from ext bkt to secondary bkt

Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
5 years agohash: support lock-free extendable bucket
Dharmik Thakkar [Tue, 2 Apr 2019 19:44:54 +0000 (19:44 +0000)]
hash: support lock-free extendable bucket

This patch enables lock-free read-write concurrency support for
extendable bucket feature.

Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
5 years agomem: limit use of address hint
Shahaf Shuler [Sun, 31 Mar 2019 08:43:48 +0000 (11:43 +0300)]
mem: limit use of address hint

The commit below added an address hint as starting address for 64-bit
systems in case an explicit base virtual address was not set by the user.

The justification for such hint was to help devices that work in VA
mode and has a address range limitation to work smoothly with the eal
memory subsystem.

While the base address value selected may work fine for the eal
initialization, it easily breaks when trying to register external memory
using rte_extmem_register API.

Trying to register anonymous memory on RH x86_64 machine took several
minutes, during them the function eal_get_virtual_area repeatedly
scanned for a good VA candidate.

The attempt to guess which VA address will be free for mapping will
always result in not portable, error prone code:
* different application may use different libraries along w/ DPDK. One
  can never guess which library was called first and how much virtual
  memory it consumed.
* external memory can be registered at any time in the application run
  time.

In order not to break the existing secondary process design, this patch
only limits the max number of tries that will be done with the
address hint.
When the number of tries exceeds the threshold the code
will use the suggested address from kernel.

Fixes: 1df21702873d ("mem: use address hint for mapping hugepages")
Cc: stable@dpdk.org
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Tested-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Alejandro Lucero <alejandro.lucero@netronome.com>
5 years agoring: fix an error message
Stephen Hemminger [Tue, 2 Apr 2019 15:30:26 +0000 (08:30 -0700)]
ring: fix an error message

Log message should end with newline.

Fixes: 4e32101f9b01 ("ring: support freeing")

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Rami Rosen <ramirose@gmail.com>
5 years agoeal: align hexdump output
Stephen Hemminger [Tue, 2 Apr 2019 15:23:50 +0000 (08:23 -0700)]
eal: align hexdump output

This fixes the issue where if the length of the output is not
a multiple of 16 the formatting was off.

Before:
00000000: 45 00 00 1C 12 34 2C E0 40 06 B8 2E C0 A8 01 12 | E....4,.@.......
00000010: C0 A8 01 37 |  |  |  |  |  |  |  |  |  |  |  |  | ...7

After:
00000000: 45 00 00 1C 12 34 2C E0 40 06 B8 2E C0 A8 01 12 | E....4,.@.......
00000010: C0 A8 01 37                                     | ...7

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
5 years agoeal: clean formatting of hexdump functions
Stephen Hemminger [Tue, 2 Apr 2019 15:23:49 +0000 (08:23 -0700)]
eal: clean formatting of hexdump functions

The hexdump code obviously came from somewhere else originally.
It is not formatted according to DPDK coding style.

Also, drop the comment which is not useful the docbock comment
is already in the rte_hexdump.h

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
5 years agoeal: make u64 reciprocal divisor const
Stephen Hemminger [Thu, 21 Mar 2019 19:59:10 +0000 (12:59 -0700)]
eal: make u64 reciprocal divisor const

The divisor is not modified here. Doesn't really matter for optimizaton
since the function is inline already; but helps with expressing
intent.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
5 years agodoc: add guide for Windows
Anand Rawat [Tue, 2 Apr 2019 03:54:57 +0000 (20:54 -0700)]
doc: add guide for Windows

Added documentation to build helloworld example
on Windows using meson and clang.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Tested-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agobuild: add workarounds for Windows helloworld
Anand Rawat [Tue, 2 Apr 2019 03:54:58 +0000 (20:54 -0700)]
build: add workarounds for Windows helloworld

Added meson workarounds to build helloworld on Windows.
Windows currently only supports kvargs and eal libraries.
This change restricts the build flow to supported libraries
only.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agoeal/windows: add minimum viable code
Anand Rawat [Tue, 2 Apr 2019 03:54:56 +0000 (20:54 -0700)]
eal/windows: add minimum viable code

Add Windows specific logic for eal.c, eal_lcore.c,
eal_debug.c and eal_thread.c. Updated header files to
contain suitable function declarations.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agoeal/windows: add headers for compatibility
Anand Rawat [Tue, 2 Apr 2019 03:54:55 +0000 (20:54 -0700)]
eal/windows: add headers for compatibility

Added headers to support Windows environment for common source.
These headers will have Windows specific implementions of the
system library APIs provided in Linux and FreeBSD.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agoeal/windows: add sys/queue.h implementation copy
Anand Rawat [Tue, 2 Apr 2019 03:54:54 +0000 (20:54 -0700)]
eal/windows: add sys/queue.h implementation copy

Adding sys/queue.h on Windows for supporting common code.
This implementation has BSD-3-Clause licensing.

Signed-off-by: Ranjit Menon <ranjit.menon@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agobuild: add module definition files for Windows
Anand Rawat [Tue, 2 Apr 2019 03:54:53 +0000 (20:54 -0700)]
build: add module definition files for Windows

Updated lib/meson.build to create shared libraries on Windows.
Added DEF files to list the exports for the eal and kvargs libraries.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agoeal/windows: add wrappers for string functions
Anand Rawat [Tue, 2 Apr 2019 03:54:52 +0000 (20:54 -0700)]
eal/windows: add wrappers for string functions

Updated rte_common.h to include rte_os.h to contain
OS specific macros and functions. Updated rte_string_fns.h
to include rte_common.h for rte_os.h

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
5 years agoeal: add OS specific header file
Anand Rawat [Tue, 2 Apr 2019 03:54:51 +0000 (20:54 -0700)]
eal: add OS specific header file

Added rte_os.h files to support OS specific functionality.
Updated build system to contain OS headers in the include
path.

Signed-off-by: Anand Rawat <anand.rawat@intel.com>
Reviewed-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Harini Ramakrishnan <harini.ramakrishnan@microsoft.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>