dpdk.git
2 years agopower: remove unused poll counter
Jim Harris [Fri, 5 Nov 2021 15:53:51 +0000 (15:53 +0000)]
power: remove unused poll counter

Following the previous fix, there is nothing using the ppi counter.

We can remove the related ppi_av array in struct priority_worker.
This allows us to also remove num_dequeue_pkts_prev and pc from
struct priority_worker since they are only used in conjunction
with the ppi_av array.

Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agopower: fix build with clang 13
Jim Harris [Fri, 5 Nov 2021 15:53:51 +0000 (15:53 +0000)]
power: fix build with clang 13

clang-13 rightfully complains that the tot_ppi variable in update_stats
is set but not used, since the final accumulated tot_ppi results isn't
used anywhere.

Fixes: 450f0791312c ("power: add traffic pattern aware power control")
Cc: stable@dpdk.org
Signed-off-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agoeal/arm64: support ASan
Volodymyr Fialko [Tue, 9 Nov 2021 09:59:52 +0000 (10:59 +0100)]
eal/arm64: support ASan

This patch defines ASAN_SHADOW_OFFSET for arm64 according to the ASan
documentation. This offset should cover all arm64 VMAs supported by
ASan.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agobuild: factorize jansson availability check
David Marchand [Mon, 8 Nov 2021 10:08:08 +0000 (11:08 +0100)]
build: factorize jansson availability check

Since two components wants to know if the jansson library is available,
move it to config/.

Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agonet/mlx5: workaround MR creation for flow counter
Michael Baum [Tue, 9 Nov 2021 12:36:12 +0000 (14:36 +0200)]
net/mlx5: workaround MR creation for flow counter

Due to kernel driver / FW issues in direct MKEY creation using the DevX
API, this patch replaces the counter MR creation to use wrapped mkey
API.

Fixes: 5382d28c2110 ("net/mlx5: accelerate DV flow counter transactions")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2 years agovdpa/mlx5: workaround guest MR registrations
Michael Baum [Tue, 9 Nov 2021 12:36:11 +0000 (14:36 +0200)]
vdpa/mlx5: workaround guest MR registrations

Due to kernel issue in direct MKEY creation using the DevX API, this
patch replaces the virtio MR creation to use Verbs API.

Fixes: cc07a42da250 ("vdpa/mlx5: prepare memory regions")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2 years agovdpa/mlx5: workaround dirty bitmap MR creation
Matan Azrad [Tue, 9 Nov 2021 12:36:10 +0000 (14:36 +0200)]
vdpa/mlx5: workaround dirty bitmap MR creation

Due to kernel driver/FW issues in direct MKEY creation using the DevX
API, this patch replaces the dirty bitmap MR creation to use wrapped
mkey instead.

Fixes: 9d39e57f21ac ("vdpa/mlx5: support live migration")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: create wrapped MR
Matan Azrad [Tue, 9 Nov 2021 12:36:09 +0000 (14:36 +0200)]
common/mlx5: create wrapped MR

The mlx5 PMD uses the kernel mlx5 driver to map physical memory to the
HW.

Using the Verbs API ibv_reg_mr, a mkey can be created for that.
In this case, the mkey is signed on the user ID of the kernel driver.

Using the DevX API, a mkey also can be created, but it should point an
umem object (represents the specific buffer mapping) created by the
kernel. In this case, the mkey is signed on the user ID of the process
DevX context.

In FW DevX control commands which get mkey as a parameter, there is
a security check on the user ID and Verbs mkeys are rejected.

Unfortunately, also when using DevX mkey, there is an error in the FW
command on umem validation because the umem is not designed to be used
for any mkey parameters.

As a workaround to the kernel driver/FW issue, it is needed to use a
wrapped MR, which is an indirect mkey(created by the DevX API) pointing to
direct mkey created by the kernel for any DevX command uses an MR.

Add an API to create and destroy this wrapped MR.

Fixes: 5382d28c2110 ("net/mlx5: accelerate DV flow counter transactions")
Fixes: 9d39e57f21ac ("vdpa/mlx5: support live migration")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: glue MR registration with IOVA
Michael Baum [Tue, 9 Nov 2021 12:36:08 +0000 (14:36 +0200)]
common/mlx5: glue MR registration with IOVA

Add support for rdma-core API to register IOVA MR.
The API gets the process VA, size, and IOVA and returns a memory region
with space pointed by a specific IOVA.

So any access in this MR should come with an address that is relative to
the IOVA specified in the API.

Fixes: cc07a42da250 ("vdpa/mlx5: prepare memory regions")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2 years agousertools/devbind: update octeontx2 DMA device
Radha Mohan Chintakuntla [Tue, 9 Nov 2021 23:32:19 +0000 (15:32 -0800)]
usertools/devbind: update octeontx2 DMA device

The octeontx2_dma rawdev driver is removed in DPDK-21.11. The new driver
for the same device uses the dmadev. So this patch updates the device
naming and lists it under dma devices section.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2 years agodma/dpaa: support statistics
Gagandeep Singh [Tue, 9 Nov 2021 04:39:10 +0000 (10:09 +0530)]
dma/dpaa: support statistics

This patch support DMA read and reset statistics operations.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agodma/dpaa: support DMA operations
Gagandeep Singh [Tue, 9 Nov 2021 04:39:09 +0000 (10:09 +0530)]
dma/dpaa: support DMA operations

This patch support copy, submit, completed and
completed status functionality of DMA driver.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agodma/dpaa: support basic operations
Gagandeep Singh [Tue, 9 Nov 2021 04:39:08 +0000 (10:09 +0530)]
dma/dpaa: support basic operations

This patch support basic DMA operations which includes
device capability and channel setup.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agodma/dpaa: add device probing
Gagandeep Singh [Tue, 9 Nov 2021 04:39:07 +0000 (10:09 +0530)]
dma/dpaa: add device probing

This patch add device initialisation functionality.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agodma/dpaa: introduce DPAA DMA driver skeleton
Gagandeep Singh [Tue, 9 Nov 2021 04:39:06 +0000 (10:09 +0530)]
dma/dpaa: introduce DPAA DMA driver skeleton

The DPAA DMA  driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
The initiated DMA is performed without CPU being involved
in the actual DMA transaction. This is achieved via using
the QDMA controller of DPAA SoC.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2 years agoci: add ppc64le cross compilation in GHA
David Christensen [Mon, 8 Nov 2021 17:53:11 +0000 (09:53 -0800)]
ci: add ppc64le cross compilation in GHA

Enable Github Actions to cross-compile code for POWER systems.

Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agotest: fix dependency on pcapng
David Marchand [Mon, 8 Nov 2021 10:09:19 +0000 (11:09 +0100)]
test: fix dependency on pcapng

The unit test code should depend on the pcapng library.

Fixes: 7a944656b33f ("test/pcapng: test pcapng library")

Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agobuild: cleanup libpcap dependent components
David Marchand [Mon, 8 Nov 2021 10:09:18 +0000 (11:09 +0100)]
build: cleanup libpcap dependent components

The RTE_PORT_PCAP variable is used to signal libpcap availability,
though its name seems to refer to pcap support in the port library.
Prefer a generic name and add explicit link dependencies where needed.

Fixes: 7a944656b33f ("test/pcapng: test pcapng library")
Fixes: 2eccf6afbea9 ("bpf: add function to convert classic BPF to DPDK BPF")
Fixes: cbb44143be74 ("app/dumpcap: add new packet capture application")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2 years agoexamples: skip build when missing dependencies
David Marchand [Sat, 6 Nov 2021 08:53:04 +0000 (09:53 +0100)]
examples: skip build when missing dependencies

Trying to disable the vhost library, meson will complain it can't build
the vhost* and vdpa examples when passing -Dexamples=all.

-Dexamples=all skips examples if the example itself announces it can't
be built (for external dependencies, internal dependencies and other
reasons).
Since examples/meson.build will evaluate the internal dependencies
in any case, let's move the check there and resolve the issue for
optional internal libraries.

Fixes: 0bf583222297 ("lib: allow disabling optional libraries")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2 years agotest: add bitmap to fast tests
David Marchand [Wed, 27 Oct 2021 14:05:44 +0000 (16:05 +0200)]
test: add bitmap to fast tests

This test was never added to the list of tests to run in CI.
Its name does not follow the implicit convention of ending with
_autotest.
Let's fix this.

Fixes: 5e9647fd5a1a ("test/bitmap: test scan after half cacheline is cleared")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agotest/ipfrag: check fragment offsets
Huichao Cai [Mon, 25 Oct 2021 07:58:59 +0000 (15:58 +0800)]
test/ipfrag: check fragment offsets

Add the test content of the fragment_offset(offset and MF)
to the test_ip_frag function. Add test data for a fragment
that is not the last fragment.

Signed-off-by: Huichao Cai <chcchc88@163.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agoversion: 21.11-rc2
Thomas Monjalon [Mon, 8 Nov 2021 23:45:12 +0000 (00:45 +0100)]
version: 21.11-rc2

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agoip_frag: revert fix fragmenting IPv4 fragment
Huichao Cai [Mon, 25 Oct 2021 07:55:53 +0000 (15:55 +0800)]
ip_frag: revert fix fragmenting IPv4 fragment

The patch ("ip_frag: fix fragmenting IPv4 fragment") introduces
a bug and needs to be rolled back. This is because the patch
and variables "flag_offset" conflict with each other.

Bugzilla ID: 835
Fixes: 567473433b7e ("ip_frag: fix fragmenting IPv4 fragment")
Cc: stable@dpdk.org
Signed-off-by: Huichao Cai <chcchc88@163.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agoip_frag: increase default maximum of fragments
Konstantin Ananyev [Tue, 2 Nov 2021 19:03:09 +0000 (19:03 +0000)]
ip_frag: increase default maximum of fragments

Increase default value for config parameter RTE_LIBRTE_IP_FRAG_MAX_FRAG
from 4 to 8. This parameter controls maximum number of fragments per
packet in ip reassembly table. Increasing this value from 4 to 8 will
allow users to cover common case with jumbo packet size of 9KB and
fragments with default frame size (1500B).
As RTE_LIBRTE_IP_FRAG_MAX_FRAG is used in definition of public
structure (struct rte_ip_frag_death_row), this is an ABI change.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agoip_frag: hide internal structures
Konstantin Ananyev [Mon, 8 Nov 2021 13:55:54 +0000 (13:55 +0000)]
ip_frag: hide internal structures

Move internal reassembly structures into new private
header 'ip_reassembly.h'.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2 years agoapp/testpmd: remove unused header file
Huisong Li [Mon, 25 Oct 2021 06:39:22 +0000 (14:39 +0800)]
app/testpmd: remove unused header file

This patch removes unused "rte_eth_bond.h" header file.

Fixes: 2950a769315e ("bond: testpmd support")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2 years agonet/sfc: support decrement IP TTL actions in transfer flows
Ivan Malov [Fri, 5 Nov 2021 21:54:09 +0000 (00:54 +0300)]
net/sfc: support decrement IP TTL actions in transfer flows

These actions map to MAE action DECR_IP_TTL. It affects
the outermost header in the current processing state of
the packet, which might have been decapsulated by prior
action DECAP. It also updates IPv4 checksum accordingly.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2 years agocommon/sfc_efx/base: add API to decrement TTL action to set
Ivan Malov [Fri, 5 Nov 2021 21:54:08 +0000 (00:54 +0300)]
common/sfc_efx/base: add API to decrement TTL action to set

Affects the outermost header, taking prior action DECAP into
account. Takes care to also update IPv4 checksum accordingly.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2 years agocommon/sfc_efx/base: factor out no-op helper functions
Ivan Malov [Fri, 5 Nov 2021 21:54:07 +0000 (00:54 +0300)]
common/sfc_efx/base: factor out no-op helper functions

When an action gets added to an action set, a special helper is
used to handle its arguments. There are actions which have no
arguments, and the corresponding helpers are duplicates in
fact. Use a unified no-op helper instead of them.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2 years agocommon/sfc_efx/base: refine adding count action to set
Ivan Malov [Fri, 5 Nov 2021 21:54:06 +0000 (00:54 +0300)]
common/sfc_efx/base: refine adding count action to set

1) Invalid counter ID is always set by default.
   Do not set it again when adding the action.

2) Counter ID validity check is missing in the
   action set allocation helper. Introduce it.

Fixes: 238306cf9aff ("common/sfc_efx/base: support counter in action set")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2 years agocommon/sfc_efx/base: refine adding encap action to set
Ivan Malov [Fri, 5 Nov 2021 21:54:05 +0000 (00:54 +0300)]
common/sfc_efx/base: refine adding encap action to set

1) Invalid encap. header ID is always set by default.
   Do not set it again when adding the action.

2) Encap. header ID validity check is missing in the
   action set allocation helper. Introduce it.

Fixes: 3907defa5bf0 ("common/sfc_efx/base: support adding encap action to a set")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2 years agonet/hns3: remove PF/VF duplicate code
Chengwen Feng [Sat, 6 Nov 2021 01:43:06 +0000 (09:43 +0800)]
net/hns3: remove PF/VF duplicate code

This patch remove PF/VF duplicate code of:
1. get firmware version.
2. get device info.
3. rx interrupt related functions.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: mark unchecked return of snprintf
Huisong Li [Sat, 6 Nov 2021 01:43:05 +0000 (09:43 +0800)]
net/hns3: mark unchecked return of snprintf

Fixing the return value of the function to clear static warning.

Fixes: 1181500b2fc5 ("net/hns3: adjust MAC address logging")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: remove magic numbers
Huisong Li [Sat, 6 Nov 2021 01:43:04 +0000 (09:43 +0800)]
net/hns3: remove magic numbers

Removing magic numbers with macros.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: move declarations in flow header file
Min Hu (Connor) [Sat, 6 Nov 2021 01:43:03 +0000 (09:43 +0800)]
net/hns3: move declarations in flow header file

This patch adds a hns3_flow.h to make the code easier to maintain.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: extract common code to its own file
Huisong Li [Sat, 6 Nov 2021 01:43:02 +0000 (09:43 +0800)]
net/hns3: extract common code to its own file

This patch extracts a common file to store the common code for PF and VF
driver.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: use unsigned integer for bitwise operations
Huisong Li [Sat, 6 Nov 2021 01:43:01 +0000 (09:43 +0800)]
net/hns3: use unsigned integer for bitwise operations

Bitwise operations should be used only with unsigned integer. This patch
modifies some code that does not meet this rule.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: modify an indent alignment
Huisong Li [Sat, 6 Nov 2021 01:43:00 +0000 (09:43 +0800)]
net/hns3: modify an indent alignment

This patch modifies some code alignment issues to make the code style
more consistent.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: remove redundant function declaration
Huisong Li [Sat, 6 Nov 2021 01:42:59 +0000 (09:42 +0800)]
net/hns3: remove redundant function declaration

This patch removes a redundant function declaration for
hns3_rx_check_vec_support().

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/hns3: simplify queue DMA address arithmetic
Huisong Li [Sat, 6 Nov 2021 01:42:58 +0000 (09:42 +0800)]
net/hns3: simplify queue DMA address arithmetic

The patch obtains the upper 32 bits of the Rx/Tx queue DMA address in one
step instead of two steps.

Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2 years agonet/mlx5: fix split buffer Rx
Dmitry Kozlyuk [Mon, 8 Nov 2021 11:17:15 +0000 (13:17 +0200)]
net/mlx5: fix split buffer Rx

Routine to lookup LKey on Rx was assuming that the mbuf address
always belongs to a single mempool: the one associated with an RxQ
or the MPRQ mempool. This assumption is false for split buffers case.
A wrong LKey was looked up, resulting in completion errors.
Modify lookup routines to lookup LKey in the mbuf->pool
for non-MPRQ cases both on Rx datapath and on queue initialization.

Fixes: fec28ca0e3a9 ("net/mlx5: support mempool registration")

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agocommon/mlx5: fix queue size in DevX queue pair creation
Raja Zidane [Mon, 8 Nov 2021 13:09:21 +0000 (13:09 +0000)]
common/mlx5: fix queue size in DevX queue pair creation

The number of WQEBBs was provided to QP create, and QP size was calculated
by multiplying the number of WQEBBs by 64, which is the send WQE size.
When creating RQ in the QP (i.e., vdpa driver), the queue size was bigger
because the receive WQE size is 16.
Provide queue size to QP create instead of the number of WQEBBs.

Fixes: f9213ab12cf9 ("common/mlx5: share DevX queue pair operations")

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocrypto/mlx5: fix queue size configuration
Raja Zidane [Mon, 8 Nov 2021 13:09:20 +0000 (13:09 +0000)]
crypto/mlx5: fix queue size configuration

The DevX interface for QP creation expects the number of WQEBBs.
Wrongly, the number of descriptors was provided to the QP creation.
In addition, the QP size must be a power of 2 what was not guaranteed.
Provide the number of WQEBBs to the QP creation API.
Round up the SQ size to a power of 2.
Rename (sq/rq)_size to num_of_(send/receive)_wqes.

Fixes: 6152534e211e ("crypto/mlx5: support queue pairs operations")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Tal Shnaiderman <talshn@nvidia.com>
2 years agocrypto/mlx5: fix freeing on probing failure
Raja Zidane [Mon, 8 Nov 2021 13:09:19 +0000 (13:09 +0000)]
crypto/mlx5: fix freeing on probing failure

When calling device close, unset dek is called which destroys a hash list.
In case of error during dev probe, close is called when dek hlist is not
initialized.
Ensure non null list destroy.

Fixes: 90646d6c6e22 ("crypto/mlx5: support basic operations")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: fix DevX queue size overflow
Raja Zidane [Mon, 8 Nov 2021 13:09:18 +0000 (13:09 +0000)]
common/mlx5: fix DevX queue size overflow

The HW QP/SQ/RQ/CQ queue sizes may be bigger than 64KB.
The width of the variable handled the queue size is 16 bits
which cannot contain the maximum queue size.
Replace the size type to be uint32_t.

Fixes: 9dab4d62b4dc ("common/mlx5: share DevX CQ creation")
Fixes: 38f537635c15 ("common/mlx5: share DevX SQ creation")
Fixes: f9213ab12cf9 ("common/mlx5: share DevX queue pair operations")
Cc: stable@dpdk.org
Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agointerrupt: fix request notifier interrupt processing
Maciej Szwed [Tue, 19 Oct 2021 10:06:57 +0000 (12:06 +0200)]
interrupt: fix request notifier interrupt processing

We should call read() on RTE_INTR_HANDLE_VFIO_REQ event
to confirm that event.

Fixes: 0eb8a1c4c786 ("vfio: add request notifier interrupt")
Cc: stable@dpdk.org
Signed-off-by: Maciej Szwed <maciej.szwed@intel.com>
2 years agonet/mlx4: fix crash on allocation failure
Harman Kalra [Mon, 1 Nov 2021 17:53:37 +0000 (23:23 +0530)]
net/mlx4: fix crash on allocation failure

This patch fixes coverity issue by adding a NULL check.

Coverity issue: 373687
Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2 years agodrivers: check interrupt file descriptor validity
Harman Kalra [Mon, 1 Nov 2021 17:53:34 +0000 (23:23 +0530)]
drivers: check interrupt file descriptor validity

This patch fixes coverity issue by adding a check for negative value to
avoid bad bit shift operation and other invalid use of file descriptors.

Coverity issue: 373717, 373697, 373685
Coverity issue: 373723, 373720, 373719, 373718, 373715, 373714, 373713
Coverity issue: 373710, 373707, 373706, 373705, 373704, 373701, 373700
Coverity issue: 373698, 373695, 373692, 373690, 373689
Coverity issue: 373722, 373721, 373709, 373702, 373696
Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2 years agoeal/linux: check interrupt file descriptor validity
Harman Kalra [Mon, 1 Nov 2021 17:53:33 +0000 (23:23 +0530)]
eal/linux: check interrupt file descriptor validity

This patch fixes coverity issue by adding a check for negative event fd
value.

Coverity issue: 373711, 373694
Fixes: c2bd9367e18f ("lib: remove direct access to interrupt handle")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2 years agointerrupts: check file descriptor validity
Harman Kalra [Mon, 1 Nov 2021 17:53:32 +0000 (23:23 +0530)]
interrupts: check file descriptor validity

This patch fixes coverity issues by adding a check for negative event
fd value.

Coverity issue: 373716, 373699, 373693, 373688
Fixes: bbbac4cd6ed2 ("interrupts: remove direct access to interrupt handle")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2 years agodoc: add CUDA example in GPU guide
Elena Agostini [Mon, 8 Nov 2021 18:58:05 +0000 (18:58 +0000)]
doc: add CUDA example in GPU guide

Add a pseudo-code example to show how to use gpudev API
with a CUDA application.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agogpudev: add communication list
Elena Agostini [Mon, 8 Nov 2021 18:58:04 +0000 (18:58 +0000)]
gpudev: add communication list

In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
When mixing network activity with task processing there may be the need
to put in communication the CPU with the device in order to synchronize
operations.

An example could be a receive-and-process application
where CPU is responsible for receiving packets in multiple mbufs
and the GPU is responsible for processing the content of those packets.

The purpose of this list is to provide a buffer in CPU memory visible
from the GPU that can be treated as a circular buffer
to let the CPU provide fondamental info of received packets to the GPU.

A possible use-case is described below.

CPU:
- Trigger some task on the GPU
- in a loop:
    - receive a number of packets
    - provide packets info to the GPU

GPU:
- Do some pre-processing
- Wait to receive a new set of packet to be processed

Layout of a communication list would be:

     -------
    |   0    | => pkt_list
    | status |
    | #pkts  |
     -------
    |   1    | => pkt_list
    | status |
    | #pkts  |
     -------
    |   2    | => pkt_list
    | status |
    | #pkts  |
     -------
    |  ....  | => pkt_list
     -------

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agogpudev: add communication flag
Elena Agostini [Mon, 8 Nov 2021 18:58:03 +0000 (18:58 +0000)]
gpudev: add communication flag

In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
When mixing network activity with task processing there may be the need
to put in communication the CPU with the device in order to synchronize
operations.

The purpose of this flag is to allow the CPU and the GPU to
exchange ACKs. A possible use-case is described below.

CPU:
- Trigger some task on the GPU
- Prepare some data
- Signal to the GPU the data is ready updating the communication flag

GPU:
- Do some pre-processing
- Wait for more data from the CPU polling on the communication flag
- Consume the data prepared by the CPU

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agogpudev: add memory barrier
Elena Agostini [Mon, 8 Nov 2021 18:58:02 +0000 (18:58 +0000)]
gpudev: add memory barrier

Add a function for the application to ensure the coherency
of the writes executed by another device into the GPU memory.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2 years agogpudev: add memory API
Elena Agostini [Mon, 8 Nov 2021 18:58:01 +0000 (18:58 +0000)]
gpudev: add memory API

In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
Such workload distribution can be achieved by sharing some memory.

As a first step, the features are focused on memory management.
A function allows to allocate memory inside the device,
or in the main (CPU) memory while making it visible for the device.
This memory may be used to save packets or for synchronization data.

The next step should focus on GPU processing task control.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agogpudev: support multi-process
Thomas Monjalon [Mon, 8 Nov 2021 18:58:00 +0000 (18:58 +0000)]
gpudev: support multi-process

The device data shared between processes are moved in a struct
allocated in a shared memory (a new memzone for all GPUs).
The main struct rte_gpu references the shared memory
via the pointer mpshared.

The API function rte_gpu_attach() is added to attach a device
from the secondary process.
The function rte_gpu_allocate() can be used only by primary process.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agogpudev: add child device representing a device context
Thomas Monjalon [Mon, 8 Nov 2021 18:57:59 +0000 (18:57 +0000)]
gpudev: add child device representing a device context

The computing device may operate in some isolated contexts.
Memory and processing are isolated in a silo represented by
a child device.
The context is provided as an opaque by the caller of
rte_gpu_add_child().

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agogpudev: add event notification
Thomas Monjalon [Mon, 8 Nov 2021 18:57:58 +0000 (18:57 +0000)]
gpudev: add event notification

Callback functions may be registered for a device event.
Callback management is per-process and not thread-safe.

The events RTE_GPU_EVENT_NEW and RTE_GPU_EVENT_DEL
are notified respectively after creation and before removal
of a device, as part of the library functions.
Some future events may be emitted from drivers.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agogpudev: introduce GPU device class library
Elena Agostini [Mon, 8 Nov 2021 18:57:57 +0000 (18:57 +0000)]
gpudev: introduce GPU device class library

In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.

The new library gpudev is for dealing with GPGPU computing devices
from a DPDK application running on the CPU.

The infrastructure is prepared to welcome drivers in drivers/gpu/.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2 years agovfio: set errno on unsupported OS
Anatoly Burakov [Thu, 28 Oct 2021 14:15:19 +0000 (14:15 +0000)]
vfio: set errno on unsupported OS

Currently, when code is running on FreeBSD or Windows, there is no way
to distinguish between a geniune error and a "VFIO is unsupported"
error. Fix the dummy implementations to also set the rte_errno flag.

Fixes: 279b581c897d ("vfio: expose functions")
Fixes: c564a2a20093 ("vfio: expose clear group function for internal usages")
Fixes: 964b2f3bfb07 ("vfio: export some internal functions")
Fixes: ea2dc1066870 ("vfio: add multi container support")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2 years agovfio: fix FreeBSD documentation
Anatoly Burakov [Thu, 28 Oct 2021 14:15:18 +0000 (14:15 +0000)]
vfio: fix FreeBSD documentation

On FreeBSD, `rte_vfio_is_enabled()` and `rte_vfio_noiommu_is_enabled()`
API calls will not return error, and will instead return 0. This is
intentional, because the caller of this API does not care whether VFIO
is supported at all, and will instead be interested in whether VFIO is
enabled or not. However, the doxygen comments for these functions state
that they will return an error on FreeBSD, which is incorrect.

Fix the doxygen comment to call out the fact that these
functions are only relevant on Linux, but remove the reference to
returning errors.

Fixes: 279b581c897d ("vfio: expose functions")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovfio: fix FreeBSD clear group stub
Anatoly Burakov [Thu, 28 Oct 2021 14:15:17 +0000 (14:15 +0000)]
vfio: fix FreeBSD clear group stub

On FreeBSD, `rte_vfio_clear_group()` was returning 0 even though this
function is not valid for FreeBSD, and is called out to return error in
doxygen comments.
Fix the return value to match documentation.

Fixes: c564a2a20093 ("vfio: expose clear group function for internal usages")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
2 years agovfio: drop fallback Linux implementation
Anatoly Burakov [Thu, 28 Oct 2021 14:15:16 +0000 (14:15 +0000)]
vfio: drop fallback Linux implementation

Currently, VFIO support for Linux is compiled unconditionally, and
supported kernel versions start with 4.4, so VFIO is assumed to always
be enabled. There is no way of disabling VFIO support at compile time
anyway, so just drop the "VFIO not available" fallback code altogether.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agokni: check error code of allmulticast mode switch
Chengwen Feng [Fri, 23 Apr 2021 08:12:42 +0000 (16:12 +0800)]
kni: check error code of allmulticast mode switch

Some drivers may return errcode when switch allmulticast mode,
so it's necessary to check the return code.

Fixes: b34801d1aa2e ("kni: support allmulticast mode set")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2 years agokni: update kernel API to set random MAC address
Ferruh Yigit [Wed, 3 Nov 2021 12:59:50 +0000 (12:59 +0000)]
kni: update kernel API to set random MAC address

Previously used 'random_ether_addr()' API is removed in upstream kernel
with commit
Commit ba530fea8ca1 ("ethernet: remove random_ether_addr()")

Replacement API 'eth_random_addr()' is around since v3.6 [1], so
simply switching to this API without any version checks.

[1]
0a4dd594982a ("etherdevice: Rename random_ether_addr to eth_random_addr")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2 years agoapp/flow-perf: add random priority option
Satheesh Paul [Tue, 2 Nov 2021 10:50:41 +0000 (16:20 +0530)]
app/flow-perf: add random priority option

Added support to create flows with priority attribute set
randomly between 0 and a user supplied maximum value. This
is useful to measure performance on NICs which may have to
rearrange flows to honor flow priority.

Removed the lower limit of 100000 flows per batch.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Wisam Jaddo <wisamm@nvidia.com>
2 years agocommon/mlx5: fix MMO configuration in DevX queue pair
Raja Zidane [Thu, 28 Oct 2021 13:58:50 +0000 (13:58 +0000)]
common/mlx5: fix MMO configuration in DevX queue pair

The QP extension valid bit was not set in the QP creation for MMO
configuration.
That caused the QP not to be connected to the GGA MMO engines,
and any MMO WQE job got CQE with an error.
Set the QP ext bit when MMO is configured.

Fixes: ddda0006188a ("common/mlx5: add MMO configuration for DevX queue pair")

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: fix HCA capabilities PRM alignment
Raja Zidane [Thu, 28 Oct 2021 13:58:49 +0000 (13:58 +0000)]
common/mlx5: fix HCA capabilities PRM alignment

0x20 reserved bytes were missed in the HCA cap PRM structure before the
newly added fields for MMO QP capabilities.
That caused reading MMO QP caps incorrectly.
Add the reserved fields in the HCA cap structure.

Fixes: cbc4c13a255e ("common/mlx5: update MMO HCA capabilities")

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agoconfig/arm: split aarch32 options
Juraj Linkeš [Fri, 5 Nov 2021 11:56:30 +0000 (12:56 +0100)]
config/arm: split aarch32 options

Aarch32 config got overlooked when splitting march in a previous patch.

Fixes: 95e0f23022a3 ("config/arm: split -march into arch and features")

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agodma/cnxk: add statistics
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:50 +0000 (11:01 -0700)]
dma/cnxk: add statistics

Add the stats function to get the DMA statistics.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2 years agodma/cnxk: add scatter-gather copy
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:49 +0000 (11:01 -0700)]
dma/cnxk: add scatter-gather copy

Add the copy_sg function that will do the multiple DMA transfers of
different sizes and different source/destination as well.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2 years agodma/cnxk: add channel operations
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:48 +0000 (11:01 -0700)]
dma/cnxk: add channel operations

Add functions for the dmadev vchan setup and DMA operations.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2 years agodma/cnxk: create and initialize device on PCI probing
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:47 +0000 (11:01 -0700)]
dma/cnxk: create and initialize device on PCI probing

This patch creates and initializes a dmadev device on pci probe.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2 years agocommon/cnxk: add DPI DMA support
Radha Mohan Chintakuntla [Wed, 3 Nov 2021 18:01:46 +0000 (11:01 -0700)]
common/cnxk: add DPI DMA support

Add base support as ROC(Rest of Chip) API which will be used by PMD
dmadev driver.

This patch adds routines to init, fini, configure the DPI DMA device
found in Marvell's CN9k or CN10k SoC families.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2 years agousertools/devbind: add Kunpeng DMA
Chengwen Feng [Tue, 2 Nov 2021 12:37:43 +0000 (20:37 +0800)]
usertools/devbind: add Kunpeng DMA

Add Kunpeng DMA device ID to dmadev category.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agodma/hisilicon: support multi-process
Chengwen Feng [Tue, 2 Nov 2021 12:37:42 +0000 (20:37 +0800)]
dma/hisilicon: support multi-process

This patch add multi-process support for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agodma/hisilicon: add data path
Chengwen Feng [Tue, 2 Nov 2021 12:37:41 +0000 (20:37 +0800)]
dma/hisilicon: add data path

This patch add data path functions for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agodma/hisilicon: add control path
Chengwen Feng [Tue, 2 Nov 2021 12:37:40 +0000 (20:37 +0800)]
dma/hisilicon: add control path

This patch add control path functions for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agodma/hisilicon: add probing
Chengwen Feng [Tue, 2 Nov 2021 12:37:39 +0000 (20:37 +0800)]
dma/hisilicon: add probing

This patch add dmadev instances create during the PCI probe, and
destroy them during the PCI remove. Internal structures and HW
definitions was also included.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agodma/hisilicon: introduce driver skeleton
Chengwen Feng [Tue, 2 Nov 2021 12:37:38 +0000 (20:37 +0800)]
dma/hisilicon: introduce driver skeleton

Add the basic device probe and remove functions and initial
documentation for new hisilicon DMA drivers.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agosched: fix debug build
Ali Alnubani [Sun, 7 Nov 2021 16:30:54 +0000 (18:30 +0200)]
sched: fix debug build

Compare pkt_len to 0 instead of NULL to avoid the following build
failure with debug mode enabled:
../lib/sched/rte_pie.h: In function 'rte_pie_enqueue_empty':
../lib/sched/rte_pie.h:125:21: error: comparison between pointer
    and integer [-Werror]
  RTE_ASSERT(pkt_len != NULL);

Bugzilla ID: 878
Fixes: 44c730b0e379 ("sched: add PIE based congestion management")

Signed-off-by: Ali Alnubani <alialnu@nvidia.com>
2 years agoapp: fix external dependency linking
David Marchand [Fri, 5 Nov 2021 13:29:51 +0000 (14:29 +0100)]
app: fix external dependency linking

ext_deps was not used in app/meson.build
so testpmd dependency on jansson was ignored.
testpmd currently can be linked because metrics library is pulling
the dependency on libjansson.

Fixes: 59f3a8acbcdb ("app/testpmd: add flex item commands")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Gregory Etelson <getelson@nvidia.com>
2 years agocommon/mlx5: fix post doorbell barrier
Michael Baum [Wed, 3 Nov 2021 18:35:13 +0000 (20:35 +0200)]
common/mlx5: fix post doorbell barrier

The rdma-core library can map doorbell register in two ways, depending
on the environment variable "MLX5_SHUT_UP_BF":

  - as regular cached memory, the variable is either missing or set to
    zero. This type of mapping may cause the significant doorbell
    register writing latency and requires an explicit memory write
    barrier to mitigate this issue and prevent write combining.

  - as non-cached memory, the variable is present and set to not "0"
    value. This type of mapping may cause performance impact under
    heavy loading conditions but the explicit write memory barrier is
    not required and it may improve core performance.

The UAR creation function maps a doorbell in one of the above ways
according to the system. In run time, it always adds an explicit memory
barrier after writing to.
In cases where the doorbell was mapped as non-cached memory, the
explicit memory barrier is unnecessary and may impair performance.

The commit [1] solved this problem for a Tx queue. In run time, it
checks the mapping type and provides the memory barrier after writing to
a Tx doorbell register if it is needed. The mapping type is extracted
directly from the uar_mmap_offset field in the queue properties.

This patch shares this code between the drivers and extends the above
solution for each of them.

[1] commit 8409a28573d3
    ("net/mlx5: control transmit doorbell register mapping")

Fixes: f8c97babc9f4 ("compress/mlx5: add data-path functions")
Fixes: 8e196c08ab53 ("crypto/mlx5: support enqueue/dequeue operations")
Fixes: 4d4e245ad637 ("regex/mlx5: support enqueue")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agonet/mlx5: remove duplicated reference of Tx doorbell
Michael Baum [Wed, 3 Nov 2021 18:35:12 +0000 (20:35 +0200)]
net/mlx5: remove duplicated reference of Tx doorbell

The Tx doorbell has different virtual addresses per process.
The secondary process takes the UAR physical page ID of the primary and
mmap it to its own virtual address.
The primary doorbell references were saved in two shared memory
locations: the TxQ structure and a dedicated doorbell array.

Remove the doorbell reference from the TxQ structure and move the
primary processes to take the UAR information from the primary doorbell
array.

Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: fix doorbell mapping configuration
Michael Baum [Wed, 3 Nov 2021 18:35:11 +0000 (20:35 +0200)]
common/mlx5: fix doorbell mapping configuration

UAR mapping type can be affected by the devarg tx_db_nc, which can cause
setting the environment variable MLX5_SHUT_UP_BF.
So, the MLX5_SHUT_UP_BF value and the UAR mapping parameter affect the
UAR cache mode.

Wrongly, the devarg was considered for the MLX5_SHUT_UP_BF but not for
the UAR mapping parameter in all the drivers except the net.

Take the tx_db_nc devarg into account for all the drivers.

Fixes: ca1418ce3910 ("common/mlx5: share device context object")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: fix UAR allocation diagnostics messages
Michael Baum [Wed, 3 Nov 2021 18:35:10 +0000 (20:35 +0200)]
common/mlx5: fix UAR allocation diagnostics messages

Depending on kernel capabilities and rdma-core version the mapping of
UAR (User Access Region) of desired memory caching type (non-cached or
write combining) might fail. The PMD implements the flexible strategy
of UAR mapping, alternating the type of caching to succeed.

During this process the failure diagnostics messages are emitted.
These messages are merely diagnostics ones and the logging level should
be adjusted to DEBUG.

Fixes: 9cc0e99c81ab0 ("common/mlx5: share UAR allocation routine")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: remove unreachable branch in UAR allocation
Michael Baum [Wed, 3 Nov 2021 18:35:09 +0000 (20:35 +0200)]
common/mlx5: remove unreachable branch in UAR allocation

The User Access Region (UAR) provides access to the hardware resources
like Doorbell Register from userspace.
It means the resources should be mapped by the kernel to some virtual
address range. There two types of memory mapping are supported by mlx5
kernel driver:

 MLX5DV_UAR_ALLOC_TYPE_NC - non-cached, all writes promoted directly to
    hardware.
 MLX5DV_UAR_ALLOC_TYPE_BF - "BlueFlame", all writes might be cached by
    CPU, and will be flushed to hardware
    explicitly with memory barriers.

The supported mapping types depend on the platform (x86/ARM/etc), kernel
version, driver version, virtualization environment (hypervisor), etc.

In UAR allocation, if the system supports the allocation with non-cached
mapping, the first attempt is performed with MLX5DV_UAR_ALLOC_TYPE_NC.
Then, if this fails, the next attempt is done with
MLX5DV_UAR_ALLOC_TYPE_BF.

However, the function adds a condition for the case where the first
attempt was performed with MLX5DV_UAR_ALLOC_TYPE_BF, a condition that is
unattainable since the first attempt was always performed with
MLX5DV_UAR_ALLOC_TYPE_NC.

Remove the unreachable code.

Fixes: 9cc0e99c81ab0 ("common/mlx5: share UAR allocation routine")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocrypto/mlx5: fix login release in probing and removal
Michael Baum [Wed, 3 Nov 2021 18:35:08 +0000 (20:35 +0200)]
crypto/mlx5: fix login release in probing and removal

The probe function creates DevX object named login and saves pointer to
it in priv structure.

The remove function releases first the priv structure and then releases
the login object.
However, the pointer to login object is field of priv structure, which
is invalid.

Release the login object and then release the priv structure.

Fixes: debb27ea3442 ("crypto/mlx5: create login object using DevX")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: make multi-process MR management port-agnostic
Michael Baum [Wed, 3 Nov 2021 10:17:07 +0000 (12:17 +0200)]
common/mlx5: make multi-process MR management port-agnostic

In the multi-process mechanism, there are things that the secondary
process does not perform itself but asks the primary process to perform
for it.
There is a special API for communication between the processes that
receives parameters necessary for the specific action required as well
as a special structure called mp_id that contains the port number of the
processes through which the initial process finds the relevant ETH
device for the processes.

One of the operations performed through this mechanism is the creation
of a memory region, where the secondary process sends the virtual
address as a parameter and the mp_id structure with the port number
inside it.
However, once the memory area management is shared between the drivers
and either port number or ETH device is no longer relevant to them, it
seems unnecessary to continue communicating between the processes
through the mp_id variable.

In this patch we will remove the use of the above structure for all MR
management, and add to the specific parameter of operations a pointer to
the common device that contains everything needed to create/register MR.

Fixes: 9f1d636f3ef08 ("common/mlx5: share MR management")

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: remove redundant parameter in MR search
Michael Baum [Wed, 3 Nov 2021 10:17:06 +0000 (12:17 +0200)]
common/mlx5: remove redundant parameter in MR search

Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue, usually
yields a result and one should not continue searching in the next level
caches.

The function that searches in the local cache gets the pointer to a
device as a parameter, that is not necessary for its operation
but for subsequent searches (which, as mentioned, usually do not
happen).
Transferring the device to a function and maintaining it, takes some
time and causes some impact on performance.

Add the pointer to the device as a field of the mr_ctrl structure. The
field will be updated during control path and will be used only when
needed in the search.

Fixes: fc59a1ec556b ("common/mlx5: share MR mempool registration")

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agocommon/mlx5: fix MR search inlining
Michael Baum [Wed, 3 Nov 2021 10:17:05 +0000 (12:17 +0200)]
common/mlx5: fix MR search inlining

Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue,
usually yields a result and one should not continue searching
in the next layer caches.

Prior to cache sharing the local linear cache lookup function
was defined with "static inline" attributes,
those were missed in routine commoditizing step
and this caused performance degradation.

Set the common function as static inline.

Fixes: fc59a1ec556b ("common/mlx5: share MR mempool registration")

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2 years agoapp/testpmd: remove double dependency on bitrate lib
David Marchand [Fri, 5 Nov 2021 13:30:18 +0000 (14:30 +0100)]
app/testpmd: remove double dependency on bitrate lib

No need for double dependency, once is enough.
While at it, sort alphabetically.

Fixes: fac83b3ef8ac ("app: fix missing dependencies")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2 years agoapp/testpmd: remove unneeded dependency on meter lib
David Marchand [Fri, 5 Nov 2021 13:30:17 +0000 (14:30 +0100)]
app/testpmd: remove unneeded dependency on meter lib

testpmd depends on ethdev, which itself depends on meter.
No need for an explicit dependency, since no testpmd code directly calls
in the meter library.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2 years agoapp/testpmd: fix flex item flush
Gregory Etelson [Tue, 26 Oct 2021 15:20:00 +0000 (18:20 +0300)]
app/testpmd: fix flex item flush

Testpmd provides 2 sets of flex item create and destroy functions
One for hosts with JSON library. These functions parse
flex item configuration stored in JSON file and create or destroy
flex item object. The second functions set is for hosts without JSON
library for compilation compatibility.

On hosts without JSON library, current implementation issues
"no JSON library" notification on port close.
The notification was triggered by port destructors that include
flex items flush routine.

The patch introduces single implementation for testpmd
flex item destroy.

Fixes: 59f3a8acbcdb ("app/testpmd: add flex item commands")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agocommon/sfc_efx: fix debug compilation control
Andrew Rybchenko [Fri, 5 Nov 2021 08:33:30 +0000 (11:33 +0300)]
common/sfc_efx: fix debug compilation control

efsys.h belongs to common/sfc_efx and common driver debug
toggle should be used instead of net/sfc toggle.

Fixes: 5e111ed87999 ("net/sfc: introduce common driver library")
Cc: stable@dpdk.org
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2 years agonet/mlx5: check delay drop settings in kernel driver
Bing Zhao [Fri, 5 Nov 2021 15:30:39 +0000 (17:30 +0200)]
net/mlx5: check delay drop settings in kernel driver

The delay drop is the common feature managed on per device basis
and the kernel driver is responsible one for the initialization and
rearming.

By default, the timeout value is set to activate the delay drop when
the driver is loaded.

A private flag "dropless_rq" is used to control the rearming. Only
when it is on, the rearming will be handled once received a timeout
event. Or else, the delay drop will be deactivated after the first
timeout occurs and all the Rx queues won't have this feature.

The PMD is trying to query this flag and warn the application when
some queues are created with delay drop but the flag is off.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agonet/mlx5: support Rx queue delay drop
Bing Zhao [Fri, 5 Nov 2021 15:30:38 +0000 (17:30 +0200)]
net/mlx5: support Rx queue delay drop

For the Ethernet RQs, if there all receiving descriptors are
exhausted, the packets being received will be dropped. This behavior
prevents slow or malicious software entities at the host from
affecting the network. While for hairpin cases, even if there is no
software involved during the packet forwarding from Rx to Tx side,
some hiccup in the hardware or back pressure from Tx side may still
cause the descriptors to be exhausted. In certain scenarios it may be
preferred to configure the device to avoid such packet drops,
assuming the posting of descriptors will resume shortly.

To support this, a new devarg "delay_drop" is introduced. By default,
the delay drop is enabled for hairpin Rx queues and disabled for
standard Rx queues. This value is used as a bit mask:
  - bit 0: enablement of standard Rx queue
  - bit 1: enablement of hairpin Rx queue
And this attribute will be applied to all Rx queues of a device.

The "rq_delay_drop" capability in the HCA_CAP is checked before
creating any queue. If the hardware capabilities do not support
this delay drop, all the Rx queues will still be created without
this attribute, and the devarg setting will be ignored even if it
is specified explicitly. A warning log is used to notify the
application when this occurs.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2 years agoethdev: fix crash on owner delete
Ferruh Yigit [Thu, 4 Nov 2021 11:04:21 +0000 (11:04 +0000)]
ethdev: fix crash on owner delete

'eth_dev->data' can be null before ethdev allocated. The API walks
through all eth devices, at least for some data can be null.

Adding 'eth_dev->data' null check before accessing it.

Fixes: 33c73aae32e4 ("ethdev: allow ownership operations on unused port")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2 years agonet/txgbe: fix link process in KR mode
Jiawen Wu [Fri, 5 Nov 2021 02:01:17 +0000 (10:01 +0800)]
net/txgbe: fix link process in KR mode

Set the 'present' parameter to 0 by default. It is configured by hardware,
users can set it to 1 for manual configuration.

Fixes: f611dada1af8 ("net/txgbe: update link setup process of backplane NICs")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2 years agonet/i40e: fix forward outer IPv6 VXLAN
Jie Wang [Fri, 5 Nov 2021 03:37:05 +0000 (11:37 +0800)]
net/i40e: fix forward outer IPv6 VXLAN

Testpmd forwards packets in checksum mode that it need to calculate
the checksum of each layer's protocol. Then it will fill flags and
header length into mbuf.

In process_outer_cksums, HW calculates the outer checksum if
tx_offloads contains outer UDP checksum otherwise SW calculates
the outer checksum.

When tx_offloads contains outer UDP checksum or outer IPv4 checksum,
mbuf will be filled with correct header length.

This patch added outer UDP checksum in tx_offload_capa and
I40E_TX_OFFLOAD_MASK, when we set csum hw outer-udp on that the
engine can forward outer IPv6 VXLAN packets.

Fixes: 7497d3e2f777 ("net/i40e: convert to new Tx offloads API")
Cc: stable@dpdk.org
Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>