app/test-crypto-perf/cperf_test_pmd_cyclecount.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Intel Corporation
   3  */
   4
   5 #include <stdbool.h>
   6
   7 #include <rte_crypto.h>
   8 #include <rte_cryptodev.h>
   9 #include <rte_cycles.h>
  10 #include <rte_malloc.h>
  11
  12 #include "cperf_ops.h"
  13 #include "cperf_test_pmd_cyclecount.h"
  14 #include "cperf_test_common.h"
  15
  16 #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n"
  17 #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n"
  18 #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n"
  19 #define CSV_LINE_FMT "%10u;%10u;%u;%u;%u;%u;%u;%.f3;%.f3;%.f3\n"
  20
  21 struct cperf_pmd_cyclecount_ctx {
  22         uint8_t dev_id;
  23         uint16_t qp_id;
  24         uint8_t lcore_id;
  25
  26         struct rte_mempool *pool;
  27         struct rte_crypto_op **ops;
  28         struct rte_crypto_op **ops_processed;
  29
  30         struct rte_cryptodev_sym_session *sess;
  31
  32         cperf_populate_ops_t populate_ops;
  33
  34         uint32_t src_buf_offset;
  35         uint32_t dst_buf_offset;
  36
  37         const struct cperf_options *options;
  38         const struct cperf_test_vector *test_vector;
  39 };
  40
  41 struct pmd_cyclecount_state {
  42         struct cperf_pmd_cyclecount_ctx *ctx;
  43         const struct cperf_options *opts;
  44         uint32_t lcore;
  45         uint64_t delay;
  46         int linearize;
  47         uint32_t ops_enqd;
  48         uint32_t ops_deqd;
  49         uint32_t ops_enq_retries;
  50         uint32_t ops_deq_retries;
  51         double cycles_per_build;
  52         double cycles_per_enq;
  53         double cycles_per_deq;
  54 };
  55
  56 static const uint16_t iv_offset =
  57                 sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op);
  58
  59 static void
  60 cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx)
  61 {
  62         if (ctx) {
  63                 if (ctx->sess) {
  64                         rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
  65                         rte_cryptodev_sym_session_free(ctx->sess);
  66                 }
  67
  68                 if (ctx->pool)
  69                         rte_mempool_free(ctx->pool);
  70
  71                 if (ctx->ops)
  72                         rte_free(ctx->ops);
  73
  74                 if (ctx->ops_processed)
  75                         rte_free(ctx->ops_processed);
  76
  77                 rte_free(ctx);
  78         }
  79 }
  80
  81 void *
  82 cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp,
  83                 uint8_t dev_id, uint16_t qp_id,
  84                 const struct cperf_options *options,
  85                 const struct cperf_test_vector *test_vector,
  86                 const struct cperf_op_fns *op_fns)
  87 {
  88         struct cperf_pmd_cyclecount_ctx *ctx = NULL;
  89
  90         /* preallocate buffers for crypto ops as they can get quite big */
  91         size_t alloc_sz = sizeof(struct rte_crypto_op *) *
  92                         options->nb_descriptors;
  93
  94         ctx = rte_malloc(NULL, sizeof(struct cperf_pmd_cyclecount_ctx), 0);
  95         if (ctx == NULL)
  96                 goto err;
  97
  98         ctx->dev_id = dev_id;
  99         ctx->qp_id = qp_id;
 100
 101         ctx->populate_ops = op_fns->populate_ops;
 102         ctx->options = options;
 103         ctx->test_vector = test_vector;
 104
 105         /* IV goes at the end of the crypto operation */
 106         uint16_t iv_offset = sizeof(struct rte_crypto_op) +
 107                         sizeof(struct rte_crypto_sym_op);
 108
 109         ctx->sess = op_fns->sess_create(
 110                         sess_mp, dev_id, options, test_vector, iv_offset);
 111         if (ctx->sess == NULL)
 112                 goto err;
 113
 114         if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0,
 115                         &ctx->src_buf_offset, &ctx->dst_buf_offset,
 116                         &ctx->pool) < 0)
 117                 goto err;
 118
 119         ctx->ops = rte_malloc("ops", alloc_sz, 0);
 120         if (!ctx->ops)
 121                 goto err;
 122
 123         ctx->ops_processed = rte_malloc("ops_processed", alloc_sz, 0);
 124         if (!ctx->ops_processed)
 125                 goto err;
 126
 127         return ctx;
 128
 129 err:
 130         cperf_pmd_cyclecount_test_free(ctx);
 131
 132         return NULL;
 133 }
 134
 135 /* benchmark alloc-build-free of ops */
 136 static inline int
 137 pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op,
 138                 uint16_t test_burst_size)
 139 {
 140         uint32_t iter_ops_left = state->opts->total_ops - cur_op;
 141         uint32_t iter_ops_needed =
 142                         RTE_MIN(state->opts->nb_descriptors, iter_ops_left);
 143         uint32_t cur_iter_op;
 144
 145         for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
 146                         cur_iter_op += test_burst_size) {
 147                 uint32_t burst_size = RTE_MIN(state->opts->total_ops - cur_op,
 148                                 test_burst_size);
 149                 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
 150
 151                 /* Allocate objects containing crypto operations and mbufs */
 152                 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
 153                                         burst_size) != 0) {
 154                         RTE_LOG(ERR, USER1,
 155                                         "Failed to allocate more crypto operations "
 156                                         "from the the crypto operation pool.\n"
 157                                         "Consider increasing the pool size "
 158                                         "with --pool-sz\n");
 159                                 return -1;
 160                 }
 161
 162                 /* Setup crypto op, attach mbuf etc */
 163                 (state->ctx->populate_ops)(ops,
 164                                 state->ctx->src_buf_offset,
 165                                 state->ctx->dst_buf_offset,
 166                                 burst_size,
 167                                 state->ctx->sess, state->opts,
 168                                 state->ctx->test_vector, iv_offset);
 169
 170 #ifdef CPERF_LINEARIZATION_ENABLE
 171                 /* Check if source mbufs require coalescing */
 172                 if (state->linearize) {
 173                         uint8_t i;
 174                         for (i = 0; i < burst_size; i++) {
 175                                 struct rte_mbuf *src = ops[i]->sym->m_src;
 176                                 rte_pktmbuf_linearize(src);
 177                         }
 178                 }
 179 #endif /* CPERF_LINEARIZATION_ENABLE */
 180                 rte_mempool_put_bulk(state->ctx->pool, (void **)ops,
 181                                 burst_size);
 182         }
 183
 184         return 0;
 185 }
 186
 187 /* allocate and build ops (no free) */
 188 static int
 189 pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state,
 190                 uint32_t iter_ops_needed, uint16_t test_burst_size)
 191 {
 192         uint32_t cur_iter_op;
 193
 194         for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
 195                         cur_iter_op += test_burst_size) {
 196                 uint32_t burst_size = RTE_MIN(
 197                                 iter_ops_needed - cur_iter_op, test_burst_size);
 198                 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
 199
 200                 /* Allocate objects containing crypto operations and mbufs */
 201                 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
 202                                         burst_size) != 0) {
 203                         RTE_LOG(ERR, USER1,
 204                                         "Failed to allocate more crypto operations "
 205                                         "from the the crypto operation pool.\n"
 206                                         "Consider increasing the pool size "
 207                                         "with --pool-sz\n");
 208                                 return -1;
 209                 }
 210
 211                 /* Setup crypto op, attach mbuf etc */
 212                 (state->ctx->populate_ops)(ops,
 213                                 state->ctx->src_buf_offset,
 214                                 state->ctx->dst_buf_offset,
 215                                 burst_size,
 216                                 state->ctx->sess, state->opts,
 217                                 state->ctx->test_vector, iv_offset);
 218         }
 219         return 0;
 220 }
 221
 222 /* benchmark enqueue, returns number of ops enqueued */
 223 static uint32_t
 224 pmd_cyclecount_bench_enq(struct pmd_cyclecount_state *state,
 225                 uint32_t iter_ops_needed, uint16_t test_burst_size)
 226 {
 227         /* Enqueue full descriptor ring of ops on crypto device */
 228         uint32_t cur_iter_op = 0;
 229         while (cur_iter_op < iter_ops_needed) {
 230                 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
 231                                 test_burst_size);
 232                 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
 233                 uint32_t burst_enqd;
 234
 235                 burst_enqd = rte_cryptodev_enqueue_burst(state->ctx->dev_id,
 236                                 state->ctx->qp_id, ops, burst_size);
 237
 238                 /* if we couldn't enqueue anything, the queue is full */
 239                 if (!burst_enqd) {
 240                         /* don't try to dequeue anything we didn't enqueue */
 241                         return cur_iter_op;
 242                 }
 243
 244                 if (burst_enqd < burst_size)
 245                         state->ops_enq_retries++;
 246                 state->ops_enqd += burst_enqd;
 247                 cur_iter_op += burst_enqd;
 248         }
 249         return iter_ops_needed;
 250 }
 251
 252 /* benchmark dequeue */
 253 static void
 254 pmd_cyclecount_bench_deq(struct pmd_cyclecount_state *state,
 255                 uint32_t iter_ops_needed, uint16_t test_burst_size)
 256 {
 257         /* Dequeue full descriptor ring of ops on crypto device */
 258         uint32_t cur_iter_op = 0;
 259         while (cur_iter_op < iter_ops_needed) {
 260                 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
 261                                 test_burst_size);
 262                 struct rte_crypto_op **ops_processed =
 263                                 &state->ctx->ops[cur_iter_op];
 264                 uint32_t burst_deqd;
 265
 266                 burst_deqd = rte_cryptodev_dequeue_burst(state->ctx->dev_id,
 267                                 state->ctx->qp_id, ops_processed, burst_size);
 268
 269                 if (burst_deqd < burst_size)
 270                         state->ops_deq_retries++;
 271                 state->ops_deqd += burst_deqd;
 272                 cur_iter_op += burst_deqd;
 273         }
 274 }
 275
 276 /* run benchmark per burst size */
 277 static inline int
 278 pmd_cyclecount_bench_burst_sz(
 279                 struct pmd_cyclecount_state *state, uint16_t test_burst_size)
 280 {
 281         uint64_t tsc_start;
 282         uint64_t tsc_end;
 283         uint64_t tsc_op;
 284         uint64_t tsc_enq;
 285         uint64_t tsc_deq;
 286         uint32_t cur_op;
 287
 288         /* reset all counters */
 289         tsc_enq = 0;
 290         tsc_deq = 0;
 291         state->ops_enqd = 0;
 292         state->ops_enq_retries = 0;
 293         state->ops_deqd = 0;
 294         state->ops_deq_retries = 0;
 295
 296         /*
 297          * Benchmark crypto op alloc-build-free separately.
 298          */
 299         tsc_start = rte_rdtsc_precise();
 300
 301         for (cur_op = 0; cur_op < state->opts->total_ops;
 302                         cur_op += state->opts->nb_descriptors) {
 303                 if (unlikely(pmd_cyclecount_bench_ops(
 304                                 state, cur_op, test_burst_size)))
 305                         return -1;
 306         }
 307
 308         tsc_end = rte_rdtsc_precise();
 309         tsc_op = tsc_end - tsc_start;
 310
 311
 312         /*
 313          * Hardware acceleration cyclecount benchmarking loop.
 314          *
 315          * We're benchmarking raw enq/deq performance by filling up the device
 316          * queue, so we never get any failed enqs unless the driver won't accept
 317          * the exact number of descriptors we requested, or the driver won't
 318          * wrap around the end of the TX ring. However, since we're only
 319          * dequeueing once we've filled up the queue, we have to benchmark it
 320          * piecemeal and then average out the results.
 321          */
 322         cur_op = 0;
 323         while (cur_op < state->opts->total_ops) {
 324                 uint32_t iter_ops_left = state->opts->total_ops - cur_op;
 325                 uint32_t iter_ops_needed = RTE_MIN(
 326                                 state->opts->nb_descriptors, iter_ops_left);
 327                 uint32_t iter_ops_allocd = iter_ops_needed;
 328
 329                 /* allocate and build ops */
 330                 if (unlikely(pmd_cyclecount_build_ops(state, iter_ops_needed,
 331                                 test_burst_size)))
 332                         return -1;
 333
 334                 tsc_start = rte_rdtsc_precise();
 335
 336                 /* fill up TX ring */
 337                 iter_ops_needed = pmd_cyclecount_bench_enq(state,
 338                                 iter_ops_needed, test_burst_size);
 339
 340                 tsc_end = rte_rdtsc_precise();
 341
 342                 tsc_enq += tsc_end - tsc_start;
 343
 344                 /* allow for HW to catch up */
 345                 if (state->delay)
 346                         rte_delay_us_block(state->delay);
 347
 348                 tsc_start = rte_rdtsc_precise();
 349
 350                 /* drain RX ring */
 351                 pmd_cyclecount_bench_deq(state, iter_ops_needed,
 352                                 test_burst_size);
 353
 354                 tsc_end = rte_rdtsc_precise();
 355
 356                 tsc_deq += tsc_end - tsc_start;
 357
 358                 cur_op += iter_ops_needed;
 359
 360                 /*
 361                  * we may not have processed all ops that we allocated, so
 362                  * free everything we've allocated.
 363                  */
 364                 rte_mempool_put_bulk(state->ctx->pool,
 365                                 (void **)state->ctx->ops, iter_ops_allocd);
 366         }
 367
 368         state->cycles_per_build = (double)tsc_op / state->opts->total_ops;
 369         state->cycles_per_enq = (double)tsc_enq / state->ops_enqd;
 370         state->cycles_per_deq = (double)tsc_deq / state->ops_deqd;
 371
 372         return 0;
 373 }
 374
 375 int
 376 cperf_pmd_cyclecount_test_runner(void *test_ctx)
 377 {
 378         struct pmd_cyclecount_state state = {0};
 379         const struct cperf_options *opts;
 380         uint16_t test_burst_size;
 381         uint8_t burst_size_idx = 0;
 382
 383         state.ctx = test_ctx;
 384         opts = state.ctx->options;
 385         state.opts = opts;
 386         state.lcore = rte_lcore_id();
 387         state.linearize = 0;
 388
 389         static int only_once;
 390         static bool warmup = true;
 391
 392         /*
 393          * We need a small delay to allow for hardware to process all the crypto
 394          * operations. We can't automatically figure out what the delay should
 395          * be, so we leave it up to the user (by default it's 0).
 396          */
 397         state.delay = 1000 * opts->pmdcc_delay;
 398
 399 #ifdef CPERF_LINEARIZATION_ENABLE
 400         struct rte_cryptodev_info dev_info;
 401
 402         /* Check if source mbufs require coalescing */
 403         if (opts->segments_sz < ctx->options->max_buffer_size) {
 404                 rte_cryptodev_info_get(state.ctx->dev_id, &dev_info);
 405                 if ((dev_info.feature_flags &
 406                                     RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) ==
 407                                 0) {
 408                         state.linearize = 1;
 409                 }
 410         }
 411 #endif /* CPERF_LINEARIZATION_ENABLE */
 412
 413         state.ctx->lcore_id = state.lcore;
 414
 415         /* Get first size from range or list */
 416         if (opts->inc_burst_size != 0)
 417                 test_burst_size = opts->min_burst_size;
 418         else
 419                 test_burst_size = opts->burst_size_list[0];
 420
 421         while (test_burst_size <= opts->max_burst_size) {
 422                 /* do a benchmark run */
 423                 if (pmd_cyclecount_bench_burst_sz(&state, test_burst_size))
 424                         return -1;
 425
 426                 /*
 427                  * First run is always a warm up run.
 428                  */
 429                 if (warmup) {
 430                         warmup = false;
 431                         continue;
 432                 }
 433
 434                 if (!opts->csv) {
 435                         if (!only_once)
 436                                 printf(PRETTY_HDR_FMT, "lcore id", "Buf Size",
 437                                                 "Burst Size", "Enqueued",
 438                                                 "Dequeued", "Enq Retries",
 439                                                 "Deq Retries", "Cycles/Op",
 440                                                 "Cycles/Enq", "Cycles/Deq");
 441                         only_once = 1;
 442
 443                         printf(PRETTY_LINE_FMT, state.ctx->lcore_id,
 444                                         opts->test_buffer_size, test_burst_size,
 445                                         state.ops_enqd, state.ops_deqd,
 446                                         state.ops_enq_retries,
 447                                         state.ops_deq_retries,
 448                                         state.cycles_per_build,
 449                                         state.cycles_per_enq,
 450                                         state.cycles_per_deq);
 451                 } else {
 452                         if (!only_once)
 453                                 printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
 454                                                 "Burst Size", "Enqueued",
 455                                                 "Dequeued", "Enq Retries",
 456                                                 "Deq Retries", "Cycles/Op",
 457                                                 "Cycles/Enq", "Cycles/Deq");
 458                         only_once = 1;
 459
 460                         printf(CSV_LINE_FMT, state.ctx->lcore_id,
 461                                         opts->test_buffer_size, test_burst_size,
 462                                         state.ops_enqd, state.ops_deqd,
 463                                         state.ops_enq_retries,
 464                                         state.ops_deq_retries,
 465                                         state.cycles_per_build,
 466                                         state.cycles_per_enq,
 467                                         state.cycles_per_deq);
 468                 }
 469
 470                 /* Get next size from range or list */
 471                 if (opts->inc_burst_size != 0)
 472                         test_burst_size += opts->inc_burst_size;
 473                 else {
 474                         if (++burst_size_idx == opts->burst_size_count)
 475                                 break;
 476                         test_burst_size = opts->burst_size_list[burst_size_idx];
 477                 }
 478         }
 479
 480         return 0;
 481 }
 482
 483 void
 484 cperf_pmd_cyclecount_test_destructor(void *arg)
 485 {
 486         struct cperf_pmd_cyclecount_ctx *ctx = arg;
 487
 488         if (ctx == NULL)
 489                 return;
 490
 491         cperf_pmd_cyclecount_test_free(ctx);
 492 }