1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright(c) 2015-2019 Intel Corporation.
4 Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
5 ==================================================
7 QAT documentation consists of three parts:
9 * Details of the symmetric crypto service below.
10 * Details of the `compression service <http://doc.dpdk.org/guides/compressdevs/qat_comp.html>`_
11 in the compressdev drivers section.
12 * Details of building the common QAT infrastructure and the PMDs to support the
13 above services. See :ref:`building_qat` below.
16 Symmetric Crypto Service on QAT
17 -------------------------------
19 The QAT crypto PMD provides poll mode crypto driver support for the following
20 hardware accelerator devices:
22 * ``Intel QuickAssist Technology DH895xCC``
23 * ``Intel QuickAssist Technology C62x``
24 * ``Intel QuickAssist Technology C3xxx``
25 * ``Intel QuickAssist Technology D15xx``
26 * ``Intel QuickAssist Technology C4xxx``
32 The QAT PMD has support for:
36 * ``RTE_CRYPTO_CIPHER_3DES_CBC``
37 * ``RTE_CRYPTO_CIPHER_3DES_CTR``
38 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
39 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
40 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
41 * ``RTE_CRYPTO_CIPHER_AES128_CTR``
42 * ``RTE_CRYPTO_CIPHER_AES192_CTR``
43 * ``RTE_CRYPTO_CIPHER_AES256_CTR``
44 * ``RTE_CRYPTO_CIPHER_AES_XTS``
45 * ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
46 * ``RTE_CRYPTO_CIPHER_NULL``
47 * ``RTE_CRYPTO_CIPHER_KASUMI_F8``
48 * ``RTE_CRYPTO_CIPHER_DES_CBC``
49 * ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
50 * ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
51 * ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
55 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
56 * ``RTE_CRYPTO_AUTH_SHA224_HMAC``
57 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
58 * ``RTE_CRYPTO_AUTH_SHA384_HMAC``
59 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
60 * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
61 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
62 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
63 * ``RTE_CRYPTO_AUTH_NULL``
64 * ``RTE_CRYPTO_AUTH_KASUMI_F9``
65 * ``RTE_CRYPTO_AUTH_AES_GMAC``
66 * ``RTE_CRYPTO_AUTH_ZUC_EIA3``
67 * ``RTE_CRYPTO_AUTH_AES_CMAC``
69 Supported AEAD algorithms:
71 * ``RTE_CRYPTO_AEAD_AES_GCM``
72 * ``RTE_CRYPTO_AEAD_AES_CCM``
78 * Only supports the session-oriented API implementation (session-less APIs are not supported).
79 * SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
80 * SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
81 * No BSD support as BSD QAT kernel driver not available.
82 * ZUC EEA3/EIA3 is not supported by dh895xcc devices
83 * Maximum additional authenticated data (AAD) for GCM is 240 bytes long and must be passed to the device in a buffer rounded up to the nearest block-size multiple (x16) and padded with zeros.
84 * Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
86 Extra notes on KASUMI F9
87 ~~~~~~~~~~~~~~~~~~~~~~~~
89 When using KASUMI F9 authentication algorithm, the input buffer must be
90 constructed according to the
91 `3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_
92 (section 4.4, page 13). The input buffer has to have COUNT (4 bytes),
93 FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION
94 bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that
95 the total length of the buffer is multiple of 8 bits. Note that the actual
96 message can be any length, specified in bits.
98 Once this buffer is passed this way, when creating the crypto operation,
99 length of data to authenticate "op.sym.auth.data.length" must be the length
100 of all the items described above, including the padding at the end.
101 Also, offset of data to authenticate "op.sym.auth.data.offset"
102 must be such that points at the start of the COUNT bytes.
104 Asymmetric Crypto Service on QAT
105 --------------------------------
107 The QAT Asym PMD has support for:
117 A QAT device can host multiple acceleration services:
119 * symmetric cryptography
121 * asymmetric cryptography
123 These services are provided to DPDK applications via PMDs which register to
124 implement the corresponding cryptodev and compressdev APIs. The PMDs use
125 common QAT driver code which manages the QAT PCI device. They also depend on a
126 QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below.
129 Configuring and Building the DPDK QAT PMDs
130 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
133 Further information on configuring, building and installing DPDK is described
134 `here <http://doc.dpdk.org/guides/linux_gsg/build_dpdk.html>`_.
137 Quick instructions for QAT cryptodev PMD are as follows:
139 .. code-block:: console
141 cd to the top-level DPDK directory
143 sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
146 Quick instructions for QAT compressdev PMD are as follows:
148 .. code-block:: console
150 cd to the top-level DPDK directory
155 .. _building_qat_config:
160 These are the build configuration options affecting QAT, and their default values:
162 .. code-block:: console
164 CONFIG_RTE_LIBRTE_PMD_QAT=y
165 CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
166 CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
167 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
168 CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
170 CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built.
172 The QAT cryptodev PMD has an external dependency on libcrypto, so is not
173 built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM should be enabled to build it.
175 The QAT compressdev PMD has no external dependencies, so needs no configuration
176 options and is built by default.
178 The number of VFs per PF varies - see table below. If multiple QAT packages are
179 installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be
180 adjusted to the number of VFs which the QAT common code will need to handle.
181 Note, there are separate config items for max cryptodevs CONFIG_RTE_CRYPTO_MAX_DEVS
182 and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS, if necessary these should be
183 adjusted to handle the total of QAT and other devices which the process will use.
185 QAT allocates internal structures to handle SGLs. For the compression service
186 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS can be changed if more segments are needed.
187 An extra (max_inflight_ops x 16) bytes per queue_pair will be used for every increment.
189 QAT compression PMD needs intermediate buffers to support Deflate compression
190 with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE
191 specifies the size of a single buffer, the PMD will allocate a multiple of these,
192 plus some extra space for associated meta-data. For GEN2 devices, 20 buffers are
193 allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes overhead.
197 If the compressed output of a Deflate operation using Dynamic Huffman
198 Encoding is too big to fit in an intermediate buffer, then the
199 operation will fall back to fixed compression rather than failing the operation.
200 To avoid this less performant case, applications should configure
201 the intermediate buffer size to be larger than the expected input data size
202 (compressed output size is usually unknown, so the only option is to make
203 larger than the input size).
206 Device and driver naming
207 ~~~~~~~~~~~~~~~~~~~~~~~~
209 * The qat cryptodev driver name is "crypto_qat".
210 The "rte_cryptodev_devices_get()" returns the devices exposed by this driver.
212 * Each qat crypto device has a unique name, in format
213 "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym".
214 This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id.
218 The qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter.
220 The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
222 * The qat compressdev driver name is "compress_qat".
223 The rte_compressdev_devices_get() returns the devices exposed by this driver.
225 * Each qat compression device has a unique name, in format
226 <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
227 This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
231 Dependency on the QAT kernel driver
232 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
234 To use QAT an SRIOV-enabled QAT kernel driver is required. The VF
235 devices created and initialised by this driver will be used by the QAT PMDs.
237 Instructions for installation are below, but first an explanation of the
238 relationships between the PF/VF devices and the PMDs visible to
241 Each QuickAssist PF device exposes a number of VF devices. Each VF device can
242 enable one cryptodev PMD and/or one compressdev PMD.
243 These QAT PMDs share the same underlying device and pci-mgmt code, but are
244 enumerated independently on their respective APIs and appear as independent
245 devices to applications.
249 Each VF can only be used by one DPDK process. It is not possible to share
250 the same VF across multiple processes, even if these processes are using
251 different acceleration services.
253 Conversely one DPDK process can use one or more QAT VFs and can expose both
254 cryptodev and compressdev instances on each of those VFs.
257 Available kernel drivers
258 ~~~~~~~~~~~~~~~~~~~~~~~~
260 Kernel drivers for each device for each service are listed in the following table. (Scroll right
261 to see the full table)
264 .. _table_qat_pmds_drivers:
266 .. table:: QAT device generations, devices and drivers
268 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
269 | S | A | C | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF |
270 +=====+=====+=====+=====+==========+===============+===============+============+========+======+========+========+
271 | Yes | No | No | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 |
272 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
273 | Yes | No | No | " | " | 01.org/4.2.0+ | " | " | " | " | " | " |
274 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
275 | Yes | No | Yes | " | " | 01.org/4.3.0+ | " | " | " | " | " | " |
276 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
277 | Yes | No | No | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 |
278 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
279 | Yes | No | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " |
280 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
281 | Yes | No | No | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 |
282 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
283 | Yes | No | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " |
284 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
285 | Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |
286 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
287 | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 |
288 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
290 The first 3 columns indicate the service:
292 * S = Symmetric crypto service (via cryptodev API)
293 * A = Asymmetric crypto service (via cryptodev API)
294 * C = Compression service (via compressdev API)
296 The ``Driver`` column indicates either the Linux kernel version in which
297 support for this device was introduced or a driver available on Intel's 01.org
298 website. There are both linux in-tree and 01.org kernel drivers available for some
299 devices. p = release pending.
301 If you are running on a kernel which includes a driver for your device, see
302 `Installation using kernel.org driver`_ below. Otherwise see
303 `Installation using 01.org QAT driver`_.
306 Installation using kernel.org driver
307 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
309 The examples below are based on the C62x device, if you have a different device
310 use the corresponding values in the above table.
312 In BIOS ensure that SRIOV is enabled and either:
315 * Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
317 Check that the QAT driver is loaded on your system, by executing::
321 You should see the kernel module for your device listed, e.g.::
324 intel_qat 82336 1 qat_c62x
326 Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
328 First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
333 You should see output similar to::
335 1a:00.0 Co-processor: Intel Corporation Device 37c8
336 3d:00.0 Co-processor: Intel Corporation Device 37c8
337 3f:00.0 Co-processor: Intel Corporation Device 37c8
339 Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
341 echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
342 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
343 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
345 Check that the VFs are available for use. For example ``lspci -d:37c9`` should
346 list 48 VF devices available for a ``C62x`` device.
348 To complete the installation follow the instructions in
349 `Binding the available VFs to the DPDK UIO driver`_.
353 If the QAT kernel modules are not loaded and you see an error like ``Failed
354 to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
355 result of not using a distribution, but just updating the kernel directly.
357 Download firmware from the `kernel firmware repo
358 <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
360 Copy qat binaries to ``/lib/firmware``::
362 cp qat_895xcc.bin /lib/firmware
363 cp qat_895xcc_mmp.bin /lib/firmware
365 Change to your linux source root directory and start the qat kernel modules::
367 insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
368 insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
373 If you see the following warning in ``/var/log/messages`` it can be ignored:
374 ``IOMMU should be enabled for SR-IOV to work correctly``.
377 Installation using 01.org QAT driver
378 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
380 Download the latest QuickAssist Technology Driver from `01.org
381 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
382 Consult the *Getting Started Guide* at the same URL for further information.
384 The steps below assume you are:
386 * Building on a platform with one ``C62x`` device.
387 * Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
388 * On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
390 In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
392 Uninstall any existing QAT driver, for example by running:
394 * ``./installer.sh uninstall`` in the directory where originally installed.
397 Build and install the SRIOV-enabled QAT driver::
402 # Copy the package to this location and unpack
403 tar zxof qat1.7.l.4.2.0-000xx.tar.gz
405 ./configure --enable-icp-sriov=host
408 You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
409 You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
411 Confirm the driver is correctly installed and is using firmware version 4.2.0::
413 cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
416 Confirm the presence of 48 VF devices - 16 per PF::
421 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
425 If using a later kernel and the build fails with an error relating to
426 ``strict_stroul`` not being available apply the following patch:
430 /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
431 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
432 + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
434 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
435 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
437 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
438 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
440 #define STR_TO_64(str, base, num, endPtr) \
444 *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
446 *(num) = simple_strtoull((str), &(endPtr), (base)); \
456 If the build fails due to missing header files you may need to do following::
458 sudo yum install zlib-devel
459 sudo yum install openssl-devel
460 sudo yum install libudev-devel
464 If the build or install fails due to mismatching kernel sources you may need to do the following::
466 sudo yum install kernel-headers-`uname -r`
467 sudo yum install kernel-src-`uname -r`
468 sudo yum install kernel-devel-`uname -r`
471 Binding the available VFs to the DPDK UIO driver
472 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
474 Unbind the VFs from the stock driver so they can be bound to the uio driver.
476 For an Intel(R) QuickAssist Technology DH895xCC device
477 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
479 The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
480 VFs are different adjust the unbind command below::
482 for device in $(seq 1 4); do \
483 for fn in $(seq 0 7); do \
484 echo -n 0000:03:0${device}.${fn} > \
485 /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
489 For an Intel(R) QuickAssist Technology C62x device
490 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
492 The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
493 ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
494 adjust the unbind command below::
496 for device in $(seq 1 2); do \
497 for fn in $(seq 0 7); do \
498 echo -n 0000:1a:0${device}.${fn} > \
499 /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
501 echo -n 0000:3d:0${device}.${fn} > \
502 /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
504 echo -n 0000:3f:0${device}.${fn} > \
505 /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
509 For Intel(R) QuickAssist Technology C3xxx or D15xx device
510 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
512 The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
513 VFs are different adjust the unbind command below::
515 for device in $(seq 1 2); do \
516 for fn in $(seq 0 7); do \
517 echo -n 0000:01:0${device}.${fn} > \
518 /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
522 Bind to the DPDK uio driver
523 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
525 Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
526 to confirm the VF devices are now in use by igb_uio kernel driver,
527 e.g. for the C62x device::
529 cd to the top-level DPDK directory
531 insmod ./build/kmod/igb_uio.ko
532 echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
536 Another way to bind the VFs to the DPDK UIO driver is by using the
537 ``dpdk-devbind.py`` script::
539 cd to the top-level DPDK directory
540 ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
545 QAT crypto PMD can be tested by running the test application::
550 ./test -l1 -n1 -w <your qat bdf>
551 RTE>>cryptodev_qat_autotest
553 QAT compression PMD can be tested by running the test application::
556 sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config
559 ./test -l1 -n1 -w <your qat bdf>
560 RTE>>compressdev_autotest
566 There are 2 sets of trace available via the dynamic logging feature:
568 * pmd.qat_dp exposes trace on the data-path.
569 * pmd.qat_general exposes all other trace.
571 pmd.qat exposes both sets of traces.
572 They can be enabled using the log-level option (where 8=maximum log level) on
573 the process cmdline, e.g. using any of the following::
575 --log-level="pmd.qat_general,8"
576 --log-level="pmd.qat_dp,8"
577 --log-level="pmd.qat,8"
581 The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
582 RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
583 for meson build and config/common_base for gnu make.
584 Also the dynamic global log level overrides both sets of trace, so e.g. no
585 QAT trace would display in this case::
587 --log-level="7" --log-level="pmd.qat_general,8"