2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
36 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
37 virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
106 - Inner RSS for VXLAN frames is not supported yet.
107 - Port statistics through software counters only. Flow statistics are
108 supported by hardware counters.
109 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
110 - Forked secondary process not supported.
111 - Flow pattern without any specific vlan will match for vlan packets as well:
113 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
114 Meaning, the flow rule::
116 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
118 Will only match vlan packets with vid=3. and the flow rules::
120 flow create 0 ingress pattern eth / ipv4 / end ...
124 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
126 Will match any ipv4 packet (VLAN included).
128 - A multi segment packet must have less than 6 segments in case the Tx burst function
129 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
130 less than 50 segments.
131 - Count action for RTE flow is only supported in Mellanox OFED 4.2.
132 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
133 to 0 are not supported.
141 These options can be modified in the ``.config`` file.
143 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
145 Toggle compilation of librte_pmd_mlx5 itself.
147 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
149 Toggle debugging code and stricter compilation flags. Enabling this option
150 adds additional run-time checks and debugging messages at the cost of
153 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
155 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
156 which buffers are to be transmitted must be associated to memory regions
157 (MRs). This is a slow operation that must be cached.
159 This value is always 1 for RX queues since they use a single MP.
161 Environment variables
162 ~~~~~~~~~~~~~~~~~~~~~
164 - ``MLX5_PMD_ENABLE_PADDING``
166 Enables HW packet padding in PCI bus transactions.
168 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
169 bytes are written to the PCI bus. Enabling padding makes such packets
172 In cases where PCI bandwidth is the bottleneck, padding can improve
175 This is disabled by default since this can also decrease performance for
176 unaligned packet sizes.
178 - ``MLX5_SHUT_UP_BF``
180 Configures HW Tx doorbell register as IO-mapped.
182 By default, the HW Tx doorbell is configured as a write-combining register.
183 The register would be flushed to HW usually when the write-combining buffer
184 becomes full, but it depends on CPU design.
186 Except for vectorized Tx burst routines, a write memory barrier is enforced
187 after updating the register so that the update can be immediately visible to
190 When vectorized Tx burst is called, the barrier is set only if the burst size
191 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
192 variable will bring better latency even though the maximum throughput can
195 Run-time configuration
196 ~~~~~~~~~~~~~~~~~~~~~~
198 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
199 because it is affected by their state. Forcing them down prevents packets
202 - **ethtool** operations on related kernel interfaces also affect the PMD.
204 - ``rxq_cqe_comp_en`` parameter [int]
206 A nonzero value enables the compression of CQE on RX side. This feature
207 allows to save PCI bandwidth and improve performance. Enabled by default.
211 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
212 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
214 - ``txq_inline`` parameter [int]
216 Amount of data to be inlined during TX operations. Improves latency.
217 Can improve PPS performance when PCI back pressure is detected and may be
218 useful for scenarios involving heavy traffic on many queues.
220 Because additional software logic is necessary to handle this mode, this
221 option should be used with care, as it can lower performance when back
222 pressure is not expected.
224 - ``txqs_min_inline`` parameter [int]
226 Enable inline send only when the number of TX queues is greater or equal
229 This option should be used in combination with ``txq_inline`` above.
231 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
233 - Disabled by default.
234 - In case ``txq_inline`` is set recommendation is 4.
236 On ConnectX-5 with Enhanced MPW:
238 - Set to 8 by default.
240 - ``txq_mpw_en`` parameter [int]
242 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
243 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
244 TX burst function to pack up multiple packets in a single descriptor
245 session in order to save PCI bandwidth and improve performance at the
246 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
247 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
248 on to TX descriptor instead of including pointer of packet only if there
249 is enough room remained in the descriptor. ``txq_inline`` sets
250 per-descriptor space for either pointers or inlined packets. In addition,
251 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
252 in the same descriptor.
254 This option cannot be used in conjunction with ``tso`` below. When ``tso``
255 is set, ``txq_mpw_en`` is disabled.
257 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
258 families of adapters. Enabled by default.
260 - ``txq_mpw_hdr_dseg_en`` parameter [int]
262 A nonzero value enables including two pointers in the first block of TX
263 descriptor. This can be used to lessen CPU load for memory copy.
265 Effective only when Enhanced MPS is supported. Disabled by default.
267 - ``txq_max_inline_len`` parameter [int]
269 Maximum size of packet to be inlined. This limits the size of packet to
270 be inlined. If the size of a packet is larger than configured value, the
271 packet isn't inlined even though there's enough space remained in the
272 descriptor. Instead, the packet is included with pointer.
274 Effective only when Enhanced MPS is supported. The default value is 256.
276 - ``tso`` parameter [int]
278 A nonzero value enables hardware TSO.
279 When hardware TSO is enabled, packets marked with TCP segmentation
280 offload will be divided into segments by the hardware. Disabled by default.
282 - ``tx_vec_en`` parameter [int]
284 A nonzero value enables Tx vector on ConnectX-5 only NIC if the number of
285 global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
287 Enabled by default on ConnectX-5.
289 - ``rx_vec_en`` parameter [int]
291 A nonzero value enables Rx vector if the port is not configured in
292 multi-segment otherwise this parameter is ignored.
299 This driver relies on external libraries and kernel drivers for resources
300 allocations and initialization. The following dependencies are not part of
301 DPDK and must be installed separately:
305 User space Verbs framework used by librte_pmd_mlx5. This library provides
306 a generic interface between the kernel and low-level user space drivers
309 It allows slow and privileged operations (context initialization, hardware
310 resources allocations) to be managed by the kernel and fast operations to
311 never leave user space.
315 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
316 devices, it is automatically loaded by libibverbs.
318 This library basically implements send/receive calls to the hardware
323 They provide the kernel-side Verbs API and low level device drivers that
324 manage actual hardware initialization and resources sharing with user
327 Unlike most other PMDs, these modules must remain loaded and bound to
330 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
331 devices and related Ethernet kernel network devices.
332 - mlx5_ib: InifiniBand device driver.
333 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
335 - **Firmware update**
337 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
340 Because each release provides new features, these updates must be applied to
341 match the kernel modules and libraries they come with.
345 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
351 Either RDMA Core library with a recent enough Linux kernel release
352 (recommended) or Mellanox OFED, which provides compatibility with older
355 RMDA Core with Linux Kernel
356 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
358 - Minimal kernel version : 4.13-rc4 (see `Linux installation documentation`_)
359 - Minimal rdma-core version: v15 (see `RDMA Core installation documentation`_)
361 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
362 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
367 - Mellanox OFED version: **4.2**.
370 - ConnectX-4: **12.20.1010** and above.
371 - ConnectX-4 Lx: **14.20.1010** and above.
372 - ConnectX-5: **16.20.1010** and above.
373 - ConnectX-5 Ex: **16.20.1010** and above.
375 While these libraries and kernel modules are available on OpenFabrics
376 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
377 managers on most distributions, this PMD requires Ethernet extensions that
378 may not be supported at the moment (this is a work in progress).
381 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
382 includes the necessary support and should be used in the meantime. For DPDK,
383 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
384 required from that distribution.
388 Several versions of Mellanox OFED are available. Installing the version
389 this DPDK release was developed and tested against is strongly
390 recommended. Please check the `prerequisites`_.
395 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
396 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
397 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
398 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
399 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
400 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
401 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
402 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
403 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
404 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
405 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
406 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
407 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
408 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
409 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
410 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
411 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
412 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
413 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
415 Quick Start Guide on OFED
416 -------------------------
418 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
421 2. Install the required libraries and kernel modules either by installing
422 only the required set, or by installing the entire Mellanox OFED:
424 .. code-block:: console
428 3. Verify the firmware is the correct one:
430 .. code-block:: console
434 4. Verify all ports links are set to Ethernet:
436 .. code-block:: console
438 mlxconfig -d <mst device> query | grep LINK_TYPE
442 Link types may have to be configured to Ethernet:
444 .. code-block:: console
446 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
448 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
450 For hypervisors verify SR-IOV is enabled on the NIC:
452 .. code-block:: console
454 mlxconfig -d <mst device> query | grep SRIOV_EN
457 If needed, set enable the set the relevant fields:
459 .. code-block:: console
461 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
462 mlxfwreset -d <mst device> reset
464 5. Restart the driver:
466 .. code-block:: console
468 /etc/init.d/openibd restart
472 .. code-block:: console
474 service openibd restart
476 If link type was changed, firmware must be reset as well:
478 .. code-block:: console
480 mlxfwreset -d <mst device> reset
482 For hypervisors, after reset write the sysfs number of virtual functions
485 To dynamically instantiate a given number of virtual functions (VFs):
487 .. code-block:: console
489 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
491 6. Compile DPDK and you are ready to go. See instructions on
492 :ref:`Development Kit Build System <Development_Kit_Build_System>`
497 1. Configure aggressive CQE Zipping for maximum performance:
499 .. code-block:: console
501 mlxconfig -d <mst device> s CQE_COMPRESSION=1
503 To set it back to the default CQE Zipping mode use:
505 .. code-block:: console
507 mlxconfig -d <mst device> s CQE_COMPRESSION=0
509 2. In case of virtualization:
511 - Make sure that hypervisor kernel is 3.16 or newer.
512 - Configure boot with ``iommu=pt``.
514 - Make sure to allocate a VM on huge pages.
515 - Make sure to set CPU pinning.
517 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
518 for better performance. For VMs, verify that the right CPU
519 and NUMA node are pinned according to the above. Run:
521 .. code-block:: console
525 to identify the NUMA node to which the PCIe adapter is connected.
527 4. If more than one adapter is used, and root complex capabilities allow
528 to put both adapters on the same NUMA node without PCI bandwidth degradation,
529 it is recommended to locate both adapters on the same NUMA node.
530 This in order to forward packets from one to the other without
531 NUMA performance penalty.
533 5. Disable pause frames:
535 .. code-block:: console
537 ethtool -A <netdev> rx off tx off
539 6. Verify IO non-posted prefetch is disabled by default. This can be checked
540 via the BIOS configuration. Please contact you server provider for more
541 information about the settings.
545 On some machines, depends on the machine integrator, it is beneficial
546 to set the PCI max read request parameter to 1K. This can be
547 done in the following way:
549 To query the read request size use:
551 .. code-block:: console
553 setpci -s <NIC PCI address> 68.w
555 If the output is different than 3XXX, set it by:
557 .. code-block:: console
559 setpci -s <NIC PCI address> 68.w=3XXX
561 The XXX can be different on different systems. Make sure to configure
562 according to the setpci output.
567 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
568 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
570 Since ``testpmd`` defaults to IP RSS mode and there is currently no
571 command-line parameter to enable additional protocols (UDP and TCP as well
572 as IP), the following commands must be entered from its CLI to get the same
573 behavior as librte_pmd_mlx4:
575 .. code-block:: console
578 > port config all rss all
584 This section demonstrates how to launch **testpmd** with Mellanox
585 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
587 #. Load the kernel modules:
589 .. code-block:: console
591 modprobe -a ib_uverbs mlx5_core mlx5_ib
593 Alternatively if MLNX_OFED is fully installed, the following script can
596 .. code-block:: console
598 /etc/init.d/openibd restart
602 User space I/O kernel modules (uio and igb_uio) are not used and do
603 not have to be loaded.
605 #. Make sure Ethernet interfaces are in working order and linked to kernel
606 verbs. Related sysfs entries should be present:
608 .. code-block:: console
610 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
614 .. code-block:: console
621 #. Optionally, retrieve their PCI bus addresses for whitelisting:
623 .. code-block:: console
626 for intf in eth2 eth3 eth4 eth5;
628 (cd "/sys/class/net/${intf}/device/" && pwd -P);
631 sed -n 's,.*/\(.*\),-w \1,p'
635 .. code-block:: console
642 #. Request huge pages:
644 .. code-block:: console
646 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
648 #. Start testpmd with basic parameters:
650 .. code-block:: console
652 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
656 .. code-block:: console
659 EAL: PCI device 0000:05:00.0 on NUMA socket 0
660 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
661 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
662 PMD: librte_pmd_mlx5: 1 port(s) detected
663 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
664 EAL: PCI device 0000:05:00.1 on NUMA socket 0
665 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
666 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
667 PMD: librte_pmd_mlx5: 1 port(s) detected
668 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
669 EAL: PCI device 0000:06:00.0 on NUMA socket 0
670 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
671 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
672 PMD: librte_pmd_mlx5: 1 port(s) detected
673 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
674 EAL: PCI device 0000:06:00.1 on NUMA socket 0
675 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
676 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
677 PMD: librte_pmd_mlx5: 1 port(s) detected
678 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
679 Interactive-mode selected
680 Configuring Port 0 (socket 0)
681 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
682 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
683 Port 0: E4:1D:2D:E7:0C:FE
684 Configuring Port 1 (socket 0)
685 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
686 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
687 Port 1: E4:1D:2D:E7:0C:FF
688 Configuring Port 2 (socket 0)
689 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
690 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
691 Port 2: E4:1D:2D:E7:0C:FA
692 Configuring Port 3 (socket 0)
693 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
694 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
695 Port 3: E4:1D:2D:E7:0C:FB
696 Checking link statuses...
697 Port 0 Link Up - speed 40000 Mbps - full-duplex
698 Port 1 Link Up - speed 40000 Mbps - full-duplex
699 Port 2 Link Up - speed 10000 Mbps - full-duplex
700 Port 3 Link Up - speed 10000 Mbps - full-duplex