2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
36 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
37 virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
106 - Inner RSS for VXLAN frames is not supported yet.
107 - Port statistics through software counters only. Flow statistics are
108 supported by hardware counters.
109 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
110 - Forked secondary process not supported.
111 - Flow pattern without any specific vlan will match for vlan packets as well:
113 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
114 Meaning, the flow rule::
116 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
118 Will only match vlan packets with vid=3. and the flow rules::
120 flow create 0 ingress pattern eth / ipv4 / end ...
124 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
126 Will match any ipv4 packet (VLAN included).
128 - A multi segment packet must have less than 6 segments in case the Tx burst function
129 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
130 less than 50 segments.
131 - Count action for RTE flow is only supported in Mellanox OFED 4.2.
139 These options can be modified in the ``.config`` file.
141 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
143 Toggle compilation of librte_pmd_mlx5 itself.
145 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
147 Toggle debugging code and stricter compilation flags. Enabling this option
148 adds additional run-time checks and debugging messages at the cost of
151 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
153 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
154 which buffers are to be transmitted must be associated to memory regions
155 (MRs). This is a slow operation that must be cached.
157 This value is always 1 for RX queues since they use a single MP.
159 Environment variables
160 ~~~~~~~~~~~~~~~~~~~~~
162 - ``MLX5_PMD_ENABLE_PADDING``
164 Enables HW packet padding in PCI bus transactions.
166 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
167 bytes are written to the PCI bus. Enabling padding makes such packets
170 In cases where PCI bandwidth is the bottleneck, padding can improve
173 This is disabled by default since this can also decrease performance for
174 unaligned packet sizes.
176 - ``MLX5_SHUT_UP_BF``
178 Configures HW Tx doorbell register as IO-mapped.
180 By default, the HW Tx doorbell is configured as a write-combining register.
181 The register would be flushed to HW usually when the write-combining buffer
182 becomes full, but it depends on CPU design.
184 Except for vectorized Tx burst routines, a write memory barrier is enforced
185 after updating the register so that the update can be immediately visible to
188 When vectorized Tx burst is called, the barrier is set only if the burst size
189 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
190 variable will bring better latency even though the maximum throughput can
193 Run-time configuration
194 ~~~~~~~~~~~~~~~~~~~~~~
196 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
197 because it is affected by their state. Forcing them down prevents packets
200 - **ethtool** operations on related kernel interfaces also affect the PMD.
202 - ``rxq_cqe_comp_en`` parameter [int]
204 A nonzero value enables the compression of CQE on RX side. This feature
205 allows to save PCI bandwidth and improve performance. Enabled by default.
209 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
210 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
212 - ``txq_inline`` parameter [int]
214 Amount of data to be inlined during TX operations. Improves latency.
215 Can improve PPS performance when PCI back pressure is detected and may be
216 useful for scenarios involving heavy traffic on many queues.
218 Because additional software logic is necessary to handle this mode, this
219 option should be used with care, as it can lower performance when back
220 pressure is not expected.
222 - ``txqs_min_inline`` parameter [int]
224 Enable inline send only when the number of TX queues is greater or equal
227 This option should be used in combination with ``txq_inline`` above.
229 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
231 - Disabled by default.
232 - In case ``txq_inline`` is set recommendation is 4.
234 On ConnectX-5 with Enhanced MPW:
236 - Set to 8 by default.
238 - ``txq_mpw_en`` parameter [int]
240 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
241 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
242 TX burst function to pack up multiple packets in a single descriptor
243 session in order to save PCI bandwidth and improve performance at the
244 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
245 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
246 on to TX descriptor instead of including pointer of packet only if there
247 is enough room remained in the descriptor. ``txq_inline`` sets
248 per-descriptor space for either pointers or inlined packets. In addition,
249 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
250 in the same descriptor.
252 This option cannot be used in conjunction with ``tso`` below. When ``tso``
253 is set, ``txq_mpw_en`` is disabled.
255 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
256 families of adapters. Enabled by default.
258 - ``txq_mpw_hdr_dseg_en`` parameter [int]
260 A nonzero value enables including two pointers in the first block of TX
261 descriptor. This can be used to lessen CPU load for memory copy.
263 Effective only when Enhanced MPS is supported. Disabled by default.
265 - ``txq_max_inline_len`` parameter [int]
267 Maximum size of packet to be inlined. This limits the size of packet to
268 be inlined. If the size of a packet is larger than configured value, the
269 packet isn't inlined even though there's enough space remained in the
270 descriptor. Instead, the packet is included with pointer.
272 Effective only when Enhanced MPS is supported. The default value is 256.
274 - ``tso`` parameter [int]
276 A nonzero value enables hardware TSO.
277 When hardware TSO is enabled, packets marked with TCP segmentation
278 offload will be divided into segments by the hardware. Disabled by default.
280 - ``tx_vec_en`` parameter [int]
282 A nonzero value enables Tx vector on ConnectX-5 only NIC if the number of
283 global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
285 Enabled by default on ConnectX-5.
287 - ``rx_vec_en`` parameter [int]
289 A nonzero value enables Rx vector if the port is not configured in
290 multi-segment otherwise this parameter is ignored.
297 This driver relies on external libraries and kernel drivers for resources
298 allocations and initialization. The following dependencies are not part of
299 DPDK and must be installed separately:
303 User space Verbs framework used by librte_pmd_mlx5. This library provides
304 a generic interface between the kernel and low-level user space drivers
307 It allows slow and privileged operations (context initialization, hardware
308 resources allocations) to be managed by the kernel and fast operations to
309 never leave user space.
313 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
314 devices, it is automatically loaded by libibverbs.
316 This library basically implements send/receive calls to the hardware
321 They provide the kernel-side Verbs API and low level device drivers that
322 manage actual hardware initialization and resources sharing with user
325 Unlike most other PMDs, these modules must remain loaded and bound to
328 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
329 devices and related Ethernet kernel network devices.
330 - mlx5_ib: InifiniBand device driver.
331 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
333 - **Firmware update**
335 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
338 Because each release provides new features, these updates must be applied to
339 match the kernel modules and libraries they come with.
343 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
349 Either RDMA Core library with a recent enough Linux kernel release
350 (recommended) or Mellanox OFED, which provides compatibility with older
353 RMDA Core with Linux Kernel
354 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
356 - Minimal kernel version : 4.13-rc4 (see `Linux installation documentation`_)
357 - Minimal rdma-core version: v15 (see `RDMA Core installation documentation`_)
359 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
360 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
365 - Mellanox OFED version: **4.2**.
368 - ConnectX-4: **12.20.1010** and above.
369 - ConnectX-4 Lx: **14.20.1010** and above.
370 - ConnectX-5: **16.20.1010** and above.
371 - ConnectX-5 Ex: **16.20.1010** and above.
373 While these libraries and kernel modules are available on OpenFabrics
374 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
375 managers on most distributions, this PMD requires Ethernet extensions that
376 may not be supported at the moment (this is a work in progress).
379 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
380 includes the necessary support and should be used in the meantime. For DPDK,
381 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
382 required from that distribution.
386 Several versions of Mellanox OFED are available. Installing the version
387 this DPDK release was developed and tested against is strongly
388 recommended. Please check the `prerequisites`_.
393 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
394 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
395 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
396 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
397 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
398 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
399 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
400 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
401 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
402 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
403 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
404 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
405 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
406 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
407 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
408 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
409 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
410 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
411 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
413 Quick Start Guide on OFED
414 -------------------------
416 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
419 2. Install the required libraries and kernel modules either by installing
420 only the required set, or by installing the entire Mellanox OFED:
422 .. code-block:: console
426 3. Verify the firmware is the correct one:
428 .. code-block:: console
432 4. Verify all ports links are set to Ethernet:
434 .. code-block:: console
436 mlxconfig -d <mst device> query | grep LINK_TYPE
440 Link types may have to be configured to Ethernet:
442 .. code-block:: console
444 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
446 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
448 For hypervisors verify SR-IOV is enabled on the NIC:
450 .. code-block:: console
452 mlxconfig -d <mst device> query | grep SRIOV_EN
455 If needed, set enable the set the relevant fields:
457 .. code-block:: console
459 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
460 mlxfwreset -d <mst device> reset
462 5. Restart the driver:
464 .. code-block:: console
466 /etc/init.d/openibd restart
470 .. code-block:: console
472 service openibd restart
474 If link type was changed, firmware must be reset as well:
476 .. code-block:: console
478 mlxfwreset -d <mst device> reset
480 For hypervisors, after reset write the sysfs number of virtual functions
483 To dynamically instantiate a given number of virtual functions (VFs):
485 .. code-block:: console
487 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
489 6. Compile DPDK and you are ready to go. See instructions on
490 :ref:`Development Kit Build System <Development_Kit_Build_System>`
495 1. Configure aggressive CQE Zipping for maximum performance:
497 .. code-block:: console
499 mlxconfig -d <mst device> s CQE_COMPRESSION=1
501 To set it back to the default CQE Zipping mode use:
503 .. code-block:: console
505 mlxconfig -d <mst device> s CQE_COMPRESSION=0
507 2. In case of virtualization:
509 - Make sure that hypervisor kernel is 3.16 or newer.
510 - Configure boot with ``iommu=pt``.
512 - Make sure to allocate a VM on huge pages.
513 - Make sure to set CPU pinning.
515 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
516 for better performance. For VMs, verify that the right CPU
517 and NUMA node are pinned according to the above. Run:
519 .. code-block:: console
523 to identify the NUMA node to which the PCIe adapter is connected.
525 4. If more than one adapter is used, and root complex capabilities allow
526 to put both adapters on the same NUMA node without PCI bandwidth degradation,
527 it is recommended to locate both adapters on the same NUMA node.
528 This in order to forward packets from one to the other without
529 NUMA performance penalty.
531 5. Disable pause frames:
533 .. code-block:: console
535 ethtool -A <netdev> rx off tx off
537 6. Verify IO non-posted prefetch is disabled by default. This can be checked
538 via the BIOS configuration. Please contact you server provider for more
539 information about the settings.
543 On some machines, depends on the machine integrator, it is beneficial
544 to set the PCI max read request parameter to 1K. This can be
545 done in the following way:
547 To query the read request size use:
549 .. code-block:: console
551 setpci -s <NIC PCI address> 68.w
553 If the output is different than 3XXX, set it by:
555 .. code-block:: console
557 setpci -s <NIC PCI address> 68.w=3XXX
559 The XXX can be different on different systems. Make sure to configure
560 according to the setpci output.
565 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
566 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
568 Since ``testpmd`` defaults to IP RSS mode and there is currently no
569 command-line parameter to enable additional protocols (UDP and TCP as well
570 as IP), the following commands must be entered from its CLI to get the same
571 behavior as librte_pmd_mlx4:
573 .. code-block:: console
576 > port config all rss all
582 This section demonstrates how to launch **testpmd** with Mellanox
583 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
585 #. Load the kernel modules:
587 .. code-block:: console
589 modprobe -a ib_uverbs mlx5_core mlx5_ib
591 Alternatively if MLNX_OFED is fully installed, the following script can
594 .. code-block:: console
596 /etc/init.d/openibd restart
600 User space I/O kernel modules (uio and igb_uio) are not used and do
601 not have to be loaded.
603 #. Make sure Ethernet interfaces are in working order and linked to kernel
604 verbs. Related sysfs entries should be present:
606 .. code-block:: console
608 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
612 .. code-block:: console
619 #. Optionally, retrieve their PCI bus addresses for whitelisting:
621 .. code-block:: console
624 for intf in eth2 eth3 eth4 eth5;
626 (cd "/sys/class/net/${intf}/device/" && pwd -P);
629 sed -n 's,.*/\(.*\),-w \1,p'
633 .. code-block:: console
640 #. Request huge pages:
642 .. code-block:: console
644 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
646 #. Start testpmd with basic parameters:
648 .. code-block:: console
650 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
654 .. code-block:: console
657 EAL: PCI device 0000:05:00.0 on NUMA socket 0
658 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
659 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
660 PMD: librte_pmd_mlx5: 1 port(s) detected
661 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
662 EAL: PCI device 0000:05:00.1 on NUMA socket 0
663 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
664 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
665 PMD: librte_pmd_mlx5: 1 port(s) detected
666 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
667 EAL: PCI device 0000:06:00.0 on NUMA socket 0
668 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
669 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
670 PMD: librte_pmd_mlx5: 1 port(s) detected
671 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
672 EAL: PCI device 0000:06:00.1 on NUMA socket 0
673 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
674 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
675 PMD: librte_pmd_mlx5: 1 port(s) detected
676 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
677 Interactive-mode selected
678 Configuring Port 0 (socket 0)
679 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
680 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
681 Port 0: E4:1D:2D:E7:0C:FE
682 Configuring Port 1 (socket 0)
683 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
684 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
685 Port 1: E4:1D:2D:E7:0C:FF
686 Configuring Port 2 (socket 0)
687 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
688 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
689 Port 2: E4:1D:2D:E7:0C:FA
690 Configuring Port 3 (socket 0)
691 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
692 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
693 Port 3: E4:1D:2D:E7:0C:FB
694 Checking link statuses...
695 Port 0 Link Up - speed 40000 Mbps - full-duplex
696 Port 1 Link Up - speed 40000 Mbps - full-duplex
697 Port 2 Link Up - speed 10000 Mbps - full-duplex
698 Port 3 Link Up - speed 10000 Mbps - full-duplex