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3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
36 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
37 virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
95 - Secondary process TX is supported.
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
106 - Inner RSS for VXLAN frames is not supported yet.
107 - Port statistics through software counters only.
108 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
109 - Secondary process RX is not supported.
110 - Flow pattern without any specific vlan will match for vlan packets as well:
112 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
113 Meaning, the flow rule::
115 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
117 Will only match vlan packets with vid=3. and the flow rules::
119 flow create 0 ingress pattern eth / ipv4 / end ...
123 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
125 Will match any ipv4 packet (VLAN included).
133 These options can be modified in the ``.config`` file.
135 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
137 Toggle compilation of librte_pmd_mlx5 itself.
139 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
141 Toggle debugging code and stricter compilation flags. Enabling this option
142 adds additional run-time checks and debugging messages at the cost of
145 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
147 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
148 which buffers are to be transmitted must be associated to memory regions
149 (MRs). This is a slow operation that must be cached.
151 This value is always 1 for RX queues since they use a single MP.
153 Environment variables
154 ~~~~~~~~~~~~~~~~~~~~~
156 - ``MLX5_PMD_ENABLE_PADDING``
158 Enables HW packet padding in PCI bus transactions.
160 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
161 bytes are written to the PCI bus. Enabling padding makes such packets
164 In cases where PCI bandwidth is the bottleneck, padding can improve
167 This is disabled by default since this can also decrease performance for
168 unaligned packet sizes.
170 Run-time configuration
171 ~~~~~~~~~~~~~~~~~~~~~~
173 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
174 because it is affected by their state. Forcing them down prevents packets
177 - **ethtool** operations on related kernel interfaces also affect the PMD.
179 - ``rxq_cqe_comp_en`` parameter [int]
181 A nonzero value enables the compression of CQE on RX side. This feature
182 allows to save PCI bandwidth and improve performance. Enabled by default.
186 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
187 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
189 - ``txq_inline`` parameter [int]
191 Amount of data to be inlined during TX operations. Improves latency.
192 Can improve PPS performance when PCI back pressure is detected and may be
193 useful for scenarios involving heavy traffic on many queues.
195 Because additional software logic is necessary to handle this mode, this
196 option should be used with care, as it can lower performance when back
197 pressure is not expected.
199 - ``txqs_min_inline`` parameter [int]
201 Enable inline send only when the number of TX queues is greater or equal
204 This option should be used in combination with ``txq_inline`` above.
206 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
208 - Disabled by default.
209 - In case ``txq_inline`` is set recommendation is 4.
211 On ConnectX-5 with Enhanced MPW:
213 - Set to 8 by default.
215 - ``txq_mpw_en`` parameter [int]
217 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
218 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
219 TX burst function to pack up multiple packets in a single descriptor
220 session in order to save PCI bandwidth and improve performance at the
221 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
222 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
223 on to TX descriptor instead of including pointer of packet only if there
224 is enough room remained in the descriptor. ``txq_inline`` sets
225 per-descriptor space for either pointers or inlined packets. In addition,
226 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
227 in the same descriptor.
229 This option cannot be used in conjunction with ``tso`` below. When ``tso``
230 is set, ``txq_mpw_en`` is disabled.
232 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
233 families of adapters. Enabled by default.
235 - ``txq_mpw_hdr_dseg_en`` parameter [int]
237 A nonzero value enables including two pointers in the first block of TX
238 descriptor. This can be used to lessen CPU load for memory copy.
240 Effective only when Enhanced MPS is supported. Disabled by default.
242 - ``txq_max_inline_len`` parameter [int]
244 Maximum size of packet to be inlined. This limits the size of packet to
245 be inlined. If the size of a packet is larger than configured value, the
246 packet isn't inlined even though there's enough space remained in the
247 descriptor. Instead, the packet is included with pointer.
249 Effective only when Enhanced MPS is supported. The default value is 256.
251 - ``tso`` parameter [int]
253 A nonzero value enables hardware TSO.
254 When hardware TSO is enabled, packets marked with TCP segmentation
255 offload will be divided into segments by the hardware. Disabled by default.
260 This driver relies on external libraries and kernel drivers for resources
261 allocations and initialization. The following dependencies are not part of
262 DPDK and must be installed separately:
266 User space Verbs framework used by librte_pmd_mlx5. This library provides
267 a generic interface between the kernel and low-level user space drivers
270 It allows slow and privileged operations (context initialization, hardware
271 resources allocations) to be managed by the kernel and fast operations to
272 never leave user space.
276 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
277 devices, it is automatically loaded by libibverbs.
279 This library basically implements send/receive calls to the hardware
282 - **Kernel modules** (mlnx-ofed-kernel)
284 They provide the kernel-side Verbs API and low level device drivers that
285 manage actual hardware initialization and resources sharing with user
288 Unlike most other PMDs, these modules must remain loaded and bound to
291 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
292 devices and related Ethernet kernel network devices.
293 - mlx5_ib: InifiniBand device driver.
294 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
296 - **Firmware update**
298 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
301 Because each release provides new features, these updates must be applied to
302 match the kernel modules and libraries they come with.
306 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
309 Currently supported by DPDK:
311 - Mellanox OFED version: **4.1**.
314 - ConnectX-4: **12.20.1010** and above.
315 - ConnectX-4 Lx: **14.20.1010** and above.
316 - ConnectX-5: **16.20.1010** and above.
317 - ConnectX-5 Ex: **16.20.1010** and above.
319 Getting Mellanox OFED
320 ~~~~~~~~~~~~~~~~~~~~~
322 While these libraries and kernel modules are available on OpenFabrics
323 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
324 managers on most distributions, this PMD requires Ethernet extensions that
325 may not be supported at the moment (this is a work in progress).
328 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
329 includes the necessary support and should be used in the meantime. For DPDK,
330 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
331 required from that distribution.
335 Several versions of Mellanox OFED are available. Installing the version
336 this DPDK release was developed and tested against is strongly
337 recommended. Please check the `prerequisites`_.
342 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
343 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
344 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
345 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
346 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
347 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
348 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
349 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
350 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
351 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
352 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
353 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
354 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
355 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
356 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
357 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
358 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
359 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
360 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
365 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
368 2. Install the required libraries and kernel modules either by installing
369 only the required set, or by installing the entire Mellanox OFED:
371 .. code-block:: console
375 3. Verify the firmware is the correct one:
377 .. code-block:: console
381 4. Verify all ports links are set to Ethernet:
383 .. code-block:: console
385 mlxconfig -d <mst device> query | grep LINK_TYPE
389 Link types may have to be configured to Ethernet:
391 .. code-block:: console
393 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
395 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
397 For hypervisors verify SR-IOV is enabled on the NIC:
399 .. code-block:: console
401 mlxconfig -d <mst device> query | grep SRIOV_EN
404 If needed, set enable the set the relevant fields:
406 .. code-block:: console
408 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
409 mlxfwreset -d <mst device> reset
411 5. Restart the driver:
413 .. code-block:: console
415 /etc/init.d/openibd restart
419 .. code-block:: console
421 service openibd restart
423 If link type was changed, firmware must be reset as well:
425 .. code-block:: console
427 mlxfwreset -d <mst device> reset
429 For hypervisors, after reset write the sysfs number of virtual functions
432 To dynamically instantiate a given number of virtual functions (VFs):
434 .. code-block:: console
436 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
438 6. Compile DPDK and you are ready to go. See instructions on
439 :ref:`Development Kit Build System <Development_Kit_Build_System>`
444 1. Configure aggressive CQE Zipping for maximum performance:
446 .. code-block:: console
448 mlxconfig -d <mst device> s CQE_COMPRESSION=1
450 To set it back to the default CQE Zipping mode use:
452 .. code-block:: console
454 mlxconfig -d <mst device> s CQE_COMPRESSION=0
456 2. In case of virtualization:
458 - Make sure that hypervisor kernel is 3.16 or newer.
459 - Configure boot with ``iommu=pt``.
461 - Make sure to allocate a VM on huge pages.
462 - Make sure to set CPU pinning.
464 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
465 for better performance. For VMs, verify that the right CPU
466 and NUMA node are pinned according to the above. Run:
468 .. code-block:: console
472 to identify the NUMA node to which the PCIe adapter is connected.
474 4. If more than one adapter is used, and root complex capabilities allow
475 to put both adapters on the same NUMA node without PCI bandwidth degradation,
476 it is recommended to locate both adapters on the same NUMA node.
477 This in order to forward packets from one to the other without
478 NUMA performance penalty.
480 5. Disable pause frames:
482 .. code-block:: console
484 ethtool -A <netdev> rx off tx off
486 6. Verify IO non-posted prefetch is disabled by default. This can be checked
487 via the BIOS configuration. Please contact you server provider for more
488 information about the settings.
492 On some machines, depends on the machine integrator, it is beneficial
493 to set the PCI max read request parameter to 1K. This can be
494 done in the following way:
496 To query the read request size use:
498 .. code-block:: console
500 setpci -s <NIC PCI address> 68.w
502 If the output is different than 3XXX, set it by:
504 .. code-block:: console
506 setpci -s <NIC PCI address> 68.w=3XXX
508 The XXX can be different on different systems. Make sure to configure
509 according to the setpci output.
514 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
515 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
517 Since ``testpmd`` defaults to IP RSS mode and there is currently no
518 command-line parameter to enable additional protocols (UDP and TCP as well
519 as IP), the following commands must be entered from its CLI to get the same
520 behavior as librte_pmd_mlx4:
522 .. code-block:: console
525 > port config all rss all
531 This section demonstrates how to launch **testpmd** with Mellanox
532 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
534 #. Load the kernel modules:
536 .. code-block:: console
538 modprobe -a ib_uverbs mlx5_core mlx5_ib
540 Alternatively if MLNX_OFED is fully installed, the following script can
543 .. code-block:: console
545 /etc/init.d/openibd restart
549 User space I/O kernel modules (uio and igb_uio) are not used and do
550 not have to be loaded.
552 #. Make sure Ethernet interfaces are in working order and linked to kernel
553 verbs. Related sysfs entries should be present:
555 .. code-block:: console
557 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
561 .. code-block:: console
568 #. Optionally, retrieve their PCI bus addresses for whitelisting:
570 .. code-block:: console
573 for intf in eth2 eth3 eth4 eth5;
575 (cd "/sys/class/net/${intf}/device/" && pwd -P);
578 sed -n 's,.*/\(.*\),-w \1,p'
582 .. code-block:: console
589 #. Request huge pages:
591 .. code-block:: console
593 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
595 #. Start testpmd with basic parameters:
597 .. code-block:: console
599 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
603 .. code-block:: console
606 EAL: PCI device 0000:05:00.0 on NUMA socket 0
607 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
608 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
609 PMD: librte_pmd_mlx5: 1 port(s) detected
610 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
611 EAL: PCI device 0000:05:00.1 on NUMA socket 0
612 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
613 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
614 PMD: librte_pmd_mlx5: 1 port(s) detected
615 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
616 EAL: PCI device 0000:06:00.0 on NUMA socket 0
617 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
618 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
619 PMD: librte_pmd_mlx5: 1 port(s) detected
620 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
621 EAL: PCI device 0000:06:00.1 on NUMA socket 0
622 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
623 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
624 PMD: librte_pmd_mlx5: 1 port(s) detected
625 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
626 Interactive-mode selected
627 Configuring Port 0 (socket 0)
628 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
629 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
630 Port 0: E4:1D:2D:E7:0C:FE
631 Configuring Port 1 (socket 0)
632 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
633 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
634 Port 1: E4:1D:2D:E7:0C:FF
635 Configuring Port 2 (socket 0)
636 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
637 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
638 Port 2: E4:1D:2D:E7:0C:FA
639 Configuring Port 3 (socket 0)
640 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
641 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
642 Port 3: E4:1D:2D:E7:0C:FB
643 Checking link statuses...
644 Port 0 Link Up - speed 40000 Mbps - full-duplex
645 Port 1 Link Up - speed 40000 Mbps - full-duplex
646 Port 2 Link Up - speed 10000 Mbps - full-duplex
647 Port 3 Link Up - speed 10000 Mbps - full-duplex