1 /* SPDX-License-Identifier: BSD-3-Clause
6 #ifndef __RTE_DPAA_BUS_H__
7 #define __RTE_DPAA_BUS_H__
10 #include <rte_mempool.h>
11 #include <dpaax_iova_table.h>
19 #define DPAA_MEMPOOL_OPS_NAME "dpaa"
21 #define DEV_TO_DPAA_DEVICE(ptr) \
22 container_of(ptr, struct rte_dpaa_device, device)
24 /* DPAA SoC identifier; If this is not available, it can be concluded
25 * that board is non-DPAA. Single slot is currently supported.
27 #define DPAA_SOC_ID_FILE "/sys/devices/soc0/soc_id"
29 #define SVR_LS1043A_FAMILY 0x87920000
30 #define SVR_LS1046A_FAMILY 0x87070000
31 #define SVR_MASK 0xffff0000
33 extern unsigned int dpaa_svr_family;
35 extern RTE_DEFINE_PER_LCORE(bool, dpaa_io);
37 struct rte_dpaa_device;
38 struct rte_dpaa_driver;
40 /* DPAA Device and Driver lists for DPAA bus */
41 TAILQ_HEAD(rte_dpaa_device_list, rte_dpaa_device);
42 TAILQ_HEAD(rte_dpaa_driver_list, rte_dpaa_driver);
44 /* Configuration variables exported from DPAA bus */
45 extern struct netcfg_info *dpaa_netcfg;
54 struct rte_dpaa_device_list device_list;
55 struct rte_dpaa_driver_list driver_list;
60 struct dpaa_device_id {
61 uint8_t fman_id; /**< Fman interface ID, for ETH type device */
62 uint8_t mac_id; /**< Fman MAC interface ID, for ETH type device */
63 uint16_t dev_id; /**< Device Identifier from DPDK */
66 struct rte_dpaa_device {
67 TAILQ_ENTRY(rte_dpaa_device) next;
68 struct rte_device device;
70 struct rte_eth_dev *eth_dev;
71 struct rte_cryptodev *crypto_dev;
73 struct rte_dpaa_driver *driver;
74 struct dpaa_device_id id;
75 enum rte_dpaa_type device_type; /**< Ethernet or crypto type device */
76 char name[RTE_ETH_NAME_MAX_LEN];
79 typedef int (*rte_dpaa_probe_t)(struct rte_dpaa_driver *dpaa_drv,
80 struct rte_dpaa_device *dpaa_dev);
81 typedef int (*rte_dpaa_remove_t)(struct rte_dpaa_device *dpaa_dev);
83 struct rte_dpaa_driver {
84 TAILQ_ENTRY(rte_dpaa_driver) next;
85 struct rte_driver driver;
86 struct rte_dpaa_bus *dpaa_bus;
87 enum rte_dpaa_type drv_type;
88 rte_dpaa_probe_t probe;
89 rte_dpaa_remove_t remove;
93 uint32_t bman_idx; /**< BMAN Portal ID*/
94 uint32_t qman_idx; /**< QMAN Portal ID*/
95 uint64_t tid;/**< Parent Thread id for this portal */
98 /* Various structures representing contiguous memory maps */
100 TAILQ_ENTRY(dpaa_memseg) next;
106 TAILQ_HEAD(dpaa_memseg_list, dpaa_memseg);
107 extern struct dpaa_memseg_list rte_dpaa_memsegs;
109 /* Either iterate over the list of internal memseg references or fallback to
110 * EAL memseg based iova2virt.
112 static inline void *rte_dpaa_mem_ptov(phys_addr_t paddr)
114 struct dpaa_memseg *ms;
117 va = dpaax_iova_table_get_va(paddr);
118 if (likely(va != NULL))
121 /* Check if the address is already part of the memseg list internally
122 * maintained by the dpaa driver.
124 TAILQ_FOREACH(ms, &rte_dpaa_memsegs, next) {
125 if (paddr >= ms->iova && paddr <
127 return RTE_PTR_ADD(ms->vaddr, (uintptr_t)(paddr - ms->iova));
130 /* If not, Fallback to full memseg list searching */
131 return rte_mem_iova2virt(paddr);
135 * Register a DPAA driver.
138 * A pointer to a rte_dpaa_driver structure describing the driver
141 void rte_dpaa_driver_register(struct rte_dpaa_driver *driver);
144 * Unregister a DPAA driver.
147 * A pointer to a rte_dpaa_driver structure describing the driver
148 * to be unregistered.
150 void rte_dpaa_driver_unregister(struct rte_dpaa_driver *driver);
153 * Initialize a DPAA portal
159 * 0 in case of success, error otherwise
161 int rte_dpaa_portal_init(void *arg);
163 int rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq);
165 int rte_dpaa_portal_fq_close(struct qman_fq *fq);
168 * Cleanup a DPAA Portal
170 void dpaa_portal_finish(void *arg);
172 /** Helper for DPAA device registration from driver (eth, crypto) instance */
173 #define RTE_PMD_REGISTER_DPAA(nm, dpaa_drv) \
174 RTE_INIT(dpaainitfn_ ##nm) \
176 (dpaa_drv).driver.name = RTE_STR(nm);\
177 rte_dpaa_driver_register(&dpaa_drv); \
179 RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
181 /* Create storage for dqrr entries per lcore */
182 #define DPAA_PORTAL_DEQUEUE_DEPTH 16
183 struct dpaa_portal_dqrr {
184 void *mbuf[DPAA_PORTAL_DEQUEUE_DEPTH];
189 RTE_DECLARE_PER_LCORE(struct dpaa_portal_dqrr, held_bufs);
191 #define DPAA_PER_LCORE_DQRR_SIZE RTE_PER_LCORE(held_bufs).dqrr_size
192 #define DPAA_PER_LCORE_DQRR_HELD RTE_PER_LCORE(held_bufs).dqrr_held
193 #define DPAA_PER_LCORE_DQRR_MBUF(i) RTE_PER_LCORE(held_bufs).mbuf[i]
199 #endif /* __RTE_DPAA_BUS_H__ */