net/iavf/base: move to drivers common directory
[dpdk.git] / drivers / common / iavf / iavf_adminq_cmd.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2001-2019
3  */
4
5 #ifndef _IAVF_ADMINQ_CMD_H_
6 #define _IAVF_ADMINQ_CMD_H_
7
8 /* This header file defines the iavf Admin Queue commands and is shared between
9  * iavf Firmware and Software.
10  *
11  * This file needs to comply with the Linux Kernel coding style.
12  */
13
14 #define IAVF_FW_API_VERSION_MAJOR       0x0001
15 #define IAVF_FW_API_VERSION_MINOR_X722  0x0006
16 #define IAVF_FW_API_VERSION_MINOR_X710  0x0007
17
18 #define IAVF_FW_MINOR_VERSION(_h) ((_h)->mac.type == IAVF_MAC_XL710 ? \
19                                         IAVF_FW_API_VERSION_MINOR_X710 : \
20                                         IAVF_FW_API_VERSION_MINOR_X722)
21
22 /* API version 1.7 implements additional link and PHY-specific APIs  */
23 #define IAVF_MINOR_VER_GET_LINK_INFO_XL710 0x0007
24 /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */
25 #define IAVF_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006
26
27 struct iavf_aq_desc {
28         __le16 flags;
29         __le16 opcode;
30         __le16 datalen;
31         __le16 retval;
32         __le32 cookie_high;
33         __le32 cookie_low;
34         union {
35                 struct {
36                         __le32 param0;
37                         __le32 param1;
38                         __le32 param2;
39                         __le32 param3;
40                 } internal;
41                 struct {
42                         __le32 param0;
43                         __le32 param1;
44                         __le32 addr_high;
45                         __le32 addr_low;
46                 } external;
47                 u8 raw[16];
48         } params;
49 };
50
51 /* Flags sub-structure
52  * |0  |1  |2  |3  |4  |5  |6  |7  |8  |9  |10 |11 |12 |13 |14 |15 |
53  * |DD |CMP|ERR|VFE| * *  RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE |
54  */
55
56 /* command flags and offsets*/
57 #define IAVF_AQ_FLAG_DD_SHIFT   0
58 #define IAVF_AQ_FLAG_CMP_SHIFT  1
59 #define IAVF_AQ_FLAG_ERR_SHIFT  2
60 #define IAVF_AQ_FLAG_VFE_SHIFT  3
61 #define IAVF_AQ_FLAG_LB_SHIFT   9
62 #define IAVF_AQ_FLAG_RD_SHIFT   10
63 #define IAVF_AQ_FLAG_VFC_SHIFT  11
64 #define IAVF_AQ_FLAG_BUF_SHIFT  12
65 #define IAVF_AQ_FLAG_SI_SHIFT   13
66 #define IAVF_AQ_FLAG_EI_SHIFT   14
67 #define IAVF_AQ_FLAG_FE_SHIFT   15
68
69 #define IAVF_AQ_FLAG_DD         (1 << IAVF_AQ_FLAG_DD_SHIFT)  /* 0x1    */
70 #define IAVF_AQ_FLAG_CMP        (1 << IAVF_AQ_FLAG_CMP_SHIFT) /* 0x2    */
71 #define IAVF_AQ_FLAG_ERR        (1 << IAVF_AQ_FLAG_ERR_SHIFT) /* 0x4    */
72 #define IAVF_AQ_FLAG_VFE        (1 << IAVF_AQ_FLAG_VFE_SHIFT) /* 0x8    */
73 #define IAVF_AQ_FLAG_LB         (1 << IAVF_AQ_FLAG_LB_SHIFT)  /* 0x200  */
74 #define IAVF_AQ_FLAG_RD         (1 << IAVF_AQ_FLAG_RD_SHIFT)  /* 0x400  */
75 #define IAVF_AQ_FLAG_VFC        (1 << IAVF_AQ_FLAG_VFC_SHIFT) /* 0x800  */
76 #define IAVF_AQ_FLAG_BUF        (1 << IAVF_AQ_FLAG_BUF_SHIFT) /* 0x1000 */
77 #define IAVF_AQ_FLAG_SI         (1 << IAVF_AQ_FLAG_SI_SHIFT)  /* 0x2000 */
78 #define IAVF_AQ_FLAG_EI         (1 << IAVF_AQ_FLAG_EI_SHIFT)  /* 0x4000 */
79 #define IAVF_AQ_FLAG_FE         (1 << IAVF_AQ_FLAG_FE_SHIFT)  /* 0x8000 */
80
81 /* error codes */
82 enum iavf_admin_queue_err {
83         IAVF_AQ_RC_OK           = 0,  /* success */
84         IAVF_AQ_RC_EPERM        = 1,  /* Operation not permitted */
85         IAVF_AQ_RC_ENOENT       = 2,  /* No such element */
86         IAVF_AQ_RC_ESRCH        = 3,  /* Bad opcode */
87         IAVF_AQ_RC_EINTR        = 4,  /* operation interrupted */
88         IAVF_AQ_RC_EIO          = 5,  /* I/O error */
89         IAVF_AQ_RC_ENXIO        = 6,  /* No such resource */
90         IAVF_AQ_RC_E2BIG        = 7,  /* Arg too long */
91         IAVF_AQ_RC_EAGAIN       = 8,  /* Try again */
92         IAVF_AQ_RC_ENOMEM       = 9,  /* Out of memory */
93         IAVF_AQ_RC_EACCES       = 10, /* Permission denied */
94         IAVF_AQ_RC_EFAULT       = 11, /* Bad address */
95         IAVF_AQ_RC_EBUSY        = 12, /* Device or resource busy */
96         IAVF_AQ_RC_EEXIST       = 13, /* object already exists */
97         IAVF_AQ_RC_EINVAL       = 14, /* Invalid argument */
98         IAVF_AQ_RC_ENOTTY       = 15, /* Not a typewriter */
99         IAVF_AQ_RC_ENOSPC       = 16, /* No space left or alloc failure */
100         IAVF_AQ_RC_ENOSYS       = 17, /* Function not implemented */
101         IAVF_AQ_RC_ERANGE       = 18, /* Parameter out of range */
102         IAVF_AQ_RC_EFLUSHED     = 19, /* Cmd flushed due to prev cmd error */
103         IAVF_AQ_RC_BAD_ADDR     = 20, /* Descriptor contains a bad pointer */
104         IAVF_AQ_RC_EMODE        = 21, /* Op not allowed in current dev mode */
105         IAVF_AQ_RC_EFBIG        = 22, /* File too large */
106 };
107
108 /* Admin Queue command opcodes */
109 enum iavf_admin_queue_opc {
110         /* aq commands */
111         iavf_aqc_opc_get_version        = 0x0001,
112         iavf_aqc_opc_driver_version     = 0x0002,
113         iavf_aqc_opc_queue_shutdown     = 0x0003,
114         iavf_aqc_opc_set_pf_context     = 0x0004,
115
116         /* resource ownership */
117         iavf_aqc_opc_request_resource   = 0x0008,
118         iavf_aqc_opc_release_resource   = 0x0009,
119
120         iavf_aqc_opc_list_func_capabilities     = 0x000A,
121         iavf_aqc_opc_list_dev_capabilities      = 0x000B,
122
123         /* Proxy commands */
124         iavf_aqc_opc_set_proxy_config           = 0x0104,
125         iavf_aqc_opc_set_ns_proxy_table_entry   = 0x0105,
126
127         /* LAA */
128         iavf_aqc_opc_mac_address_read   = 0x0107,
129         iavf_aqc_opc_mac_address_write  = 0x0108,
130
131         /* PXE */
132         iavf_aqc_opc_clear_pxe_mode     = 0x0110,
133
134         /* WoL commands */
135         iavf_aqc_opc_set_wol_filter     = 0x0120,
136         iavf_aqc_opc_get_wake_reason    = 0x0121,
137         iavf_aqc_opc_clear_all_wol_filters = 0x025E,
138
139         /* internal switch commands */
140         iavf_aqc_opc_get_switch_config          = 0x0200,
141         iavf_aqc_opc_add_statistics             = 0x0201,
142         iavf_aqc_opc_remove_statistics          = 0x0202,
143         iavf_aqc_opc_set_port_parameters        = 0x0203,
144         iavf_aqc_opc_get_switch_resource_alloc  = 0x0204,
145         iavf_aqc_opc_set_switch_config          = 0x0205,
146         iavf_aqc_opc_rx_ctl_reg_read            = 0x0206,
147         iavf_aqc_opc_rx_ctl_reg_write           = 0x0207,
148
149         iavf_aqc_opc_add_vsi                    = 0x0210,
150         iavf_aqc_opc_update_vsi_parameters      = 0x0211,
151         iavf_aqc_opc_get_vsi_parameters         = 0x0212,
152
153         iavf_aqc_opc_add_pv                     = 0x0220,
154         iavf_aqc_opc_update_pv_parameters       = 0x0221,
155         iavf_aqc_opc_get_pv_parameters          = 0x0222,
156
157         iavf_aqc_opc_add_veb                    = 0x0230,
158         iavf_aqc_opc_update_veb_parameters      = 0x0231,
159         iavf_aqc_opc_get_veb_parameters         = 0x0232,
160
161         iavf_aqc_opc_delete_element             = 0x0243,
162
163         iavf_aqc_opc_add_macvlan                = 0x0250,
164         iavf_aqc_opc_remove_macvlan             = 0x0251,
165         iavf_aqc_opc_add_vlan                   = 0x0252,
166         iavf_aqc_opc_remove_vlan                = 0x0253,
167         iavf_aqc_opc_set_vsi_promiscuous_modes  = 0x0254,
168         iavf_aqc_opc_add_tag                    = 0x0255,
169         iavf_aqc_opc_remove_tag                 = 0x0256,
170         iavf_aqc_opc_add_multicast_etag         = 0x0257,
171         iavf_aqc_opc_remove_multicast_etag      = 0x0258,
172         iavf_aqc_opc_update_tag                 = 0x0259,
173         iavf_aqc_opc_add_control_packet_filter  = 0x025A,
174         iavf_aqc_opc_remove_control_packet_filter       = 0x025B,
175         iavf_aqc_opc_add_cloud_filters          = 0x025C,
176         iavf_aqc_opc_remove_cloud_filters       = 0x025D,
177         iavf_aqc_opc_clear_wol_switch_filters   = 0x025E,
178         iavf_aqc_opc_replace_cloud_filters      = 0x025F,
179
180         iavf_aqc_opc_add_mirror_rule    = 0x0260,
181         iavf_aqc_opc_delete_mirror_rule = 0x0261,
182
183         /* Dynamic Device Personalization */
184         iavf_aqc_opc_write_personalization_profile      = 0x0270,
185         iavf_aqc_opc_get_personalization_profile_list   = 0x0271,
186
187         /* DCB commands */
188         iavf_aqc_opc_dcb_ignore_pfc     = 0x0301,
189         iavf_aqc_opc_dcb_updated        = 0x0302,
190         iavf_aqc_opc_set_dcb_parameters = 0x0303,
191
192         /* TX scheduler */
193         iavf_aqc_opc_configure_vsi_bw_limit             = 0x0400,
194         iavf_aqc_opc_configure_vsi_ets_sla_bw_limit     = 0x0406,
195         iavf_aqc_opc_configure_vsi_tc_bw                = 0x0407,
196         iavf_aqc_opc_query_vsi_bw_config                = 0x0408,
197         iavf_aqc_opc_query_vsi_ets_sla_config           = 0x040A,
198         iavf_aqc_opc_configure_switching_comp_bw_limit  = 0x0410,
199
200         iavf_aqc_opc_enable_switching_comp_ets                  = 0x0413,
201         iavf_aqc_opc_modify_switching_comp_ets                  = 0x0414,
202         iavf_aqc_opc_disable_switching_comp_ets                 = 0x0415,
203         iavf_aqc_opc_configure_switching_comp_ets_bw_limit      = 0x0416,
204         iavf_aqc_opc_configure_switching_comp_bw_config         = 0x0417,
205         iavf_aqc_opc_query_switching_comp_ets_config            = 0x0418,
206         iavf_aqc_opc_query_port_ets_config                      = 0x0419,
207         iavf_aqc_opc_query_switching_comp_bw_config             = 0x041A,
208         iavf_aqc_opc_suspend_port_tx                            = 0x041B,
209         iavf_aqc_opc_resume_port_tx                             = 0x041C,
210         iavf_aqc_opc_configure_partition_bw                     = 0x041D,
211         /* hmc */
212         iavf_aqc_opc_query_hmc_resource_profile = 0x0500,
213         iavf_aqc_opc_set_hmc_resource_profile   = 0x0501,
214
215         /* phy commands*/
216
217         /* phy commands*/
218         iavf_aqc_opc_get_phy_abilities          = 0x0600,
219         iavf_aqc_opc_set_phy_config             = 0x0601,
220         iavf_aqc_opc_set_mac_config             = 0x0603,
221         iavf_aqc_opc_set_link_restart_an        = 0x0605,
222         iavf_aqc_opc_get_link_status            = 0x0607,
223         iavf_aqc_opc_set_phy_int_mask           = 0x0613,
224         iavf_aqc_opc_get_local_advt_reg         = 0x0614,
225         iavf_aqc_opc_set_local_advt_reg         = 0x0615,
226         iavf_aqc_opc_get_partner_advt           = 0x0616,
227         iavf_aqc_opc_set_lb_modes               = 0x0618,
228         iavf_aqc_opc_get_phy_wol_caps           = 0x0621,
229         iavf_aqc_opc_set_phy_debug              = 0x0622,
230         iavf_aqc_opc_upload_ext_phy_fm          = 0x0625,
231         iavf_aqc_opc_run_phy_activity           = 0x0626,
232         iavf_aqc_opc_set_phy_register           = 0x0628,
233         iavf_aqc_opc_get_phy_register           = 0x0629,
234
235         /* NVM commands */
236         iavf_aqc_opc_nvm_read                   = 0x0701,
237         iavf_aqc_opc_nvm_erase                  = 0x0702,
238         iavf_aqc_opc_nvm_update                 = 0x0703,
239         iavf_aqc_opc_nvm_config_read            = 0x0704,
240         iavf_aqc_opc_nvm_config_write           = 0x0705,
241         iavf_aqc_opc_nvm_progress               = 0x0706,
242         iavf_aqc_opc_oem_post_update            = 0x0720,
243         iavf_aqc_opc_thermal_sensor             = 0x0721,
244
245         /* virtualization commands */
246         iavf_aqc_opc_send_msg_to_pf             = 0x0801,
247         iavf_aqc_opc_send_msg_to_vf             = 0x0802,
248         iavf_aqc_opc_send_msg_to_peer           = 0x0803,
249
250         /* alternate structure */
251         iavf_aqc_opc_alternate_write            = 0x0900,
252         iavf_aqc_opc_alternate_write_indirect   = 0x0901,
253         iavf_aqc_opc_alternate_read             = 0x0902,
254         iavf_aqc_opc_alternate_read_indirect    = 0x0903,
255         iavf_aqc_opc_alternate_write_done       = 0x0904,
256         iavf_aqc_opc_alternate_set_mode         = 0x0905,
257         iavf_aqc_opc_alternate_clear_port       = 0x0906,
258
259         /* LLDP commands */
260         iavf_aqc_opc_lldp_get_mib       = 0x0A00,
261         iavf_aqc_opc_lldp_update_mib    = 0x0A01,
262         iavf_aqc_opc_lldp_add_tlv       = 0x0A02,
263         iavf_aqc_opc_lldp_update_tlv    = 0x0A03,
264         iavf_aqc_opc_lldp_delete_tlv    = 0x0A04,
265         iavf_aqc_opc_lldp_stop          = 0x0A05,
266         iavf_aqc_opc_lldp_start         = 0x0A06,
267         iavf_aqc_opc_get_cee_dcb_cfg    = 0x0A07,
268         iavf_aqc_opc_lldp_set_local_mib = 0x0A08,
269         iavf_aqc_opc_lldp_stop_start_spec_agent = 0x0A09,
270
271         /* Tunnel commands */
272         iavf_aqc_opc_add_udp_tunnel     = 0x0B00,
273         iavf_aqc_opc_del_udp_tunnel     = 0x0B01,
274         iavf_aqc_opc_set_rss_key        = 0x0B02,
275         iavf_aqc_opc_set_rss_lut        = 0x0B03,
276         iavf_aqc_opc_get_rss_key        = 0x0B04,
277         iavf_aqc_opc_get_rss_lut        = 0x0B05,
278
279         /* Async Events */
280         iavf_aqc_opc_event_lan_overflow         = 0x1001,
281
282         /* OEM commands */
283         iavf_aqc_opc_oem_parameter_change       = 0xFE00,
284         iavf_aqc_opc_oem_device_status_change   = 0xFE01,
285         iavf_aqc_opc_oem_ocsd_initialize        = 0xFE02,
286         iavf_aqc_opc_oem_ocbb_initialize        = 0xFE03,
287
288         /* debug commands */
289         iavf_aqc_opc_debug_read_reg             = 0xFF03,
290         iavf_aqc_opc_debug_write_reg            = 0xFF04,
291         iavf_aqc_opc_debug_modify_reg           = 0xFF07,
292         iavf_aqc_opc_debug_dump_internals       = 0xFF08,
293 };
294
295 /* command structures and indirect data structures */
296
297 /* Structure naming conventions:
298  * - no suffix for direct command descriptor structures
299  * - _data for indirect sent data
300  * - _resp for indirect return data (data which is both will use _data)
301  * - _completion for direct return data
302  * - _element_ for repeated elements (may also be _data or _resp)
303  *
304  * Command structures are expected to overlay the params.raw member of the basic
305  * descriptor, and as such cannot exceed 16 bytes in length.
306  */
307
308 /* This macro is used to generate a compilation error if a structure
309  * is not exactly the correct length. It gives a divide by zero error if the
310  * structure is not of the correct size, otherwise it creates an enum that is
311  * never used.
312  */
313 #define IAVF_CHECK_STRUCT_LEN(n, X) enum iavf_static_assert_enum_##X \
314         { iavf_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) }
315
316 /* This macro is used extensively to ensure that command structures are 16
317  * bytes in length as they have to map to the raw array of that size.
318  */
319 #define IAVF_CHECK_CMD_LENGTH(X)        IAVF_CHECK_STRUCT_LEN(16, X)
320
321 /* Queue Shutdown (direct 0x0003) */
322 struct iavf_aqc_queue_shutdown {
323         __le32  driver_unloading;
324 #define IAVF_AQ_DRIVER_UNLOADING        0x1
325         u8      reserved[12];
326 };
327
328 IAVF_CHECK_CMD_LENGTH(iavf_aqc_queue_shutdown);
329
330 #define IAVF_AQC_WOL_PRESERVE_STATUS    0x200
331 #define IAVF_AQC_MC_MAG_EN              0x0100
332 #define IAVF_AQC_WOL_PRESERVE_ON_PFR    0x0200
333
334 struct iavf_aqc_vsi_properties_data {
335         /* first 96 byte are written by SW */
336         __le16  valid_sections;
337 #define IAVF_AQ_VSI_PROP_SWITCH_VALID           0x0001
338 #define IAVF_AQ_VSI_PROP_SECURITY_VALID         0x0002
339 #define IAVF_AQ_VSI_PROP_VLAN_VALID             0x0004
340 #define IAVF_AQ_VSI_PROP_CAS_PV_VALID           0x0008
341 #define IAVF_AQ_VSI_PROP_INGRESS_UP_VALID       0x0010
342 #define IAVF_AQ_VSI_PROP_EGRESS_UP_VALID        0x0020
343 #define IAVF_AQ_VSI_PROP_QUEUE_MAP_VALID        0x0040
344 #define IAVF_AQ_VSI_PROP_QUEUE_OPT_VALID        0x0080
345 #define IAVF_AQ_VSI_PROP_OUTER_UP_VALID         0x0100
346 #define IAVF_AQ_VSI_PROP_SCHED_VALID            0x0200
347         /* switch section */
348         __le16  switch_id; /* 12bit id combined with flags below */
349 #define IAVF_AQ_VSI_SW_ID_SHIFT         0x0000
350 #define IAVF_AQ_VSI_SW_ID_MASK          (0xFFF << IAVF_AQ_VSI_SW_ID_SHIFT)
351 #define IAVF_AQ_VSI_SW_ID_FLAG_NOT_STAG 0x1000
352 #define IAVF_AQ_VSI_SW_ID_FLAG_ALLOW_LB 0x2000
353 #define IAVF_AQ_VSI_SW_ID_FLAG_LOCAL_LB 0x4000
354         u8      sw_reserved[2];
355         /* security section */
356         u8      sec_flags;
357 #define IAVF_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD    0x01
358 #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK    0x02
359 #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK     0x04
360         u8      sec_reserved;
361         /* VLAN section */
362         __le16  pvid; /* VLANS include priority bits */
363         __le16  fcoe_pvid;
364         u8      port_vlan_flags;
365 #define IAVF_AQ_VSI_PVLAN_MODE_SHIFT    0x00
366 #define IAVF_AQ_VSI_PVLAN_MODE_MASK     (0x03 << \
367                                          IAVF_AQ_VSI_PVLAN_MODE_SHIFT)
368 #define IAVF_AQ_VSI_PVLAN_MODE_TAGGED   0x01
369 #define IAVF_AQ_VSI_PVLAN_MODE_UNTAGGED 0x02
370 #define IAVF_AQ_VSI_PVLAN_MODE_ALL      0x03
371 #define IAVF_AQ_VSI_PVLAN_INSERT_PVID   0x04
372 #define IAVF_AQ_VSI_PVLAN_EMOD_SHIFT    0x03
373 #define IAVF_AQ_VSI_PVLAN_EMOD_MASK     (0x3 << \
374                                          IAVF_AQ_VSI_PVLAN_EMOD_SHIFT)
375 #define IAVF_AQ_VSI_PVLAN_EMOD_STR_BOTH 0x0
376 #define IAVF_AQ_VSI_PVLAN_EMOD_STR_UP   0x08
377 #define IAVF_AQ_VSI_PVLAN_EMOD_STR      0x10
378 #define IAVF_AQ_VSI_PVLAN_EMOD_NOTHING  0x18
379         u8      pvlan_reserved[3];
380         /* ingress egress up sections */
381         __le32  ingress_table; /* bitmap, 3 bits per up */
382 #define IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT  0
383 #define IAVF_AQ_VSI_UP_TABLE_UP0_MASK   (0x7 << \
384                                          IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT)
385 #define IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT  3
386 #define IAVF_AQ_VSI_UP_TABLE_UP1_MASK   (0x7 << \
387                                          IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT)
388 #define IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT  6
389 #define IAVF_AQ_VSI_UP_TABLE_UP2_MASK   (0x7 << \
390                                          IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT)
391 #define IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT  9
392 #define IAVF_AQ_VSI_UP_TABLE_UP3_MASK   (0x7 << \
393                                          IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT)
394 #define IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT  12
395 #define IAVF_AQ_VSI_UP_TABLE_UP4_MASK   (0x7 << \
396                                          IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT)
397 #define IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT  15
398 #define IAVF_AQ_VSI_UP_TABLE_UP5_MASK   (0x7 << \
399                                          IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT)
400 #define IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT  18
401 #define IAVF_AQ_VSI_UP_TABLE_UP6_MASK   (0x7 << \
402                                          IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT)
403 #define IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT  21
404 #define IAVF_AQ_VSI_UP_TABLE_UP7_MASK   (0x7 << \
405                                          IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT)
406         __le32  egress_table;   /* same defines as for ingress table */
407         /* cascaded PV section */
408         __le16  cas_pv_tag;
409         u8      cas_pv_flags;
410 #define IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT           0x00
411 #define IAVF_AQ_VSI_CAS_PV_TAGX_MASK            (0x03 << \
412                                                  IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT)
413 #define IAVF_AQ_VSI_CAS_PV_TAGX_LEAVE           0x00
414 #define IAVF_AQ_VSI_CAS_PV_TAGX_REMOVE          0x01
415 #define IAVF_AQ_VSI_CAS_PV_TAGX_COPY            0x02
416 #define IAVF_AQ_VSI_CAS_PV_INSERT_TAG           0x10
417 #define IAVF_AQ_VSI_CAS_PV_ETAG_PRUNE           0x20
418 #define IAVF_AQ_VSI_CAS_PV_ACCEPT_HOST_TAG      0x40
419         u8      cas_pv_reserved;
420         /* queue mapping section */
421         __le16  mapping_flags;
422 #define IAVF_AQ_VSI_QUE_MAP_CONTIG      0x0
423 #define IAVF_AQ_VSI_QUE_MAP_NONCONTIG   0x1
424         __le16  queue_mapping[16];
425 #define IAVF_AQ_VSI_QUEUE_SHIFT         0x0
426 #define IAVF_AQ_VSI_QUEUE_MASK          (0x7FF << IAVF_AQ_VSI_QUEUE_SHIFT)
427         __le16  tc_mapping[8];
428 #define IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT 0
429 #define IAVF_AQ_VSI_TC_QUE_OFFSET_MASK  (0x1FF << \
430                                          IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT)
431 #define IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT 9
432 #define IAVF_AQ_VSI_TC_QUE_NUMBER_MASK  (0x7 << \
433                                          IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT)
434         /* queueing option section */
435         u8      queueing_opt_flags;
436 #define IAVF_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA   0x04
437 #define IAVF_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA     0x08
438 #define IAVF_AQ_VSI_QUE_OPT_TCP_ENA     0x10
439 #define IAVF_AQ_VSI_QUE_OPT_FCOE_ENA    0x20
440 #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_PF  0x00
441 #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40
442         u8      queueing_opt_reserved[3];
443         /* scheduler section */
444         u8      up_enable_bits;
445         u8      sched_reserved;
446         /* outer up section */
447         __le32  outer_up_table; /* same structure and defines as ingress tbl */
448         u8      cmd_reserved[8];
449         /* last 32 bytes are written by FW */
450         __le16  qs_handle[8];
451 #define IAVF_AQ_VSI_QS_HANDLE_INVALID   0xFFFF
452         __le16  stat_counter_idx;
453         __le16  sched_id;
454         u8      resp_reserved[12];
455 };
456
457 IAVF_CHECK_STRUCT_LEN(128, iavf_aqc_vsi_properties_data);
458
459 /* Get VEB Parameters (direct 0x0232)
460  * uses iavf_aqc_switch_seid for the descriptor
461  */
462 struct iavf_aqc_get_veb_parameters_completion {
463         __le16  seid;
464         __le16  switch_id;
465         __le16  veb_flags; /* only the first/last flags from 0x0230 is valid */
466         __le16  statistic_index;
467         __le16  vebs_used;
468         __le16  vebs_free;
469         u8      reserved[4];
470 };
471
472 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_veb_parameters_completion);
473
474 #define IAVF_LINK_SPEED_2_5GB_SHIFT     0x0
475 #define IAVF_LINK_SPEED_100MB_SHIFT     0x1
476 #define IAVF_LINK_SPEED_1000MB_SHIFT    0x2
477 #define IAVF_LINK_SPEED_10GB_SHIFT      0x3
478 #define IAVF_LINK_SPEED_40GB_SHIFT      0x4
479 #define IAVF_LINK_SPEED_20GB_SHIFT      0x5
480 #define IAVF_LINK_SPEED_25GB_SHIFT      0x6
481 #define IAVF_LINK_SPEED_5GB_SHIFT       0x7
482
483 enum iavf_aq_link_speed {
484         IAVF_LINK_SPEED_UNKNOWN = 0,
485         IAVF_LINK_SPEED_100MB   = (1 << IAVF_LINK_SPEED_100MB_SHIFT),
486         IAVF_LINK_SPEED_1GB     = (1 << IAVF_LINK_SPEED_1000MB_SHIFT),
487         IAVF_LINK_SPEED_2_5GB   = (1 << IAVF_LINK_SPEED_2_5GB_SHIFT),
488         IAVF_LINK_SPEED_5GB     = (1 << IAVF_LINK_SPEED_5GB_SHIFT),
489         IAVF_LINK_SPEED_10GB    = (1 << IAVF_LINK_SPEED_10GB_SHIFT),
490         IAVF_LINK_SPEED_40GB    = (1 << IAVF_LINK_SPEED_40GB_SHIFT),
491         IAVF_LINK_SPEED_20GB    = (1 << IAVF_LINK_SPEED_20GB_SHIFT),
492         IAVF_LINK_SPEED_25GB    = (1 << IAVF_LINK_SPEED_25GB_SHIFT),
493 };
494
495 #define IAVF_AQ_LINK_UP_FUNCTION        0x01
496
497 /* Send to PF command (indirect 0x0801) id is only used by PF
498  * Send to VF command (indirect 0x0802) id is only used by PF
499  * Send to Peer PF command (indirect 0x0803)
500  */
501 struct iavf_aqc_pf_vf_message {
502         __le32  id;
503         u8      reserved[4];
504         __le32  addr_high;
505         __le32  addr_low;
506 };
507
508 IAVF_CHECK_CMD_LENGTH(iavf_aqc_pf_vf_message);
509
510 /* Get CEE DCBX Oper Config (0x0A07)
511  * uses the generic descriptor struct
512  * returns below as indirect response
513  */
514
515 #define IAVF_AQC_CEE_APP_FCOE_SHIFT     0x0
516 #define IAVF_AQC_CEE_APP_FCOE_MASK      (0x7 << IAVF_AQC_CEE_APP_FCOE_SHIFT)
517 #define IAVF_AQC_CEE_APP_ISCSI_SHIFT    0x3
518 #define IAVF_AQC_CEE_APP_ISCSI_MASK     (0x7 << IAVF_AQC_CEE_APP_ISCSI_SHIFT)
519 #define IAVF_AQC_CEE_APP_FIP_SHIFT      0x8
520 #define IAVF_AQC_CEE_APP_FIP_MASK       (0x7 << IAVF_AQC_CEE_APP_FIP_SHIFT)
521
522 #define IAVF_AQC_CEE_PG_STATUS_SHIFT    0x0
523 #define IAVF_AQC_CEE_PG_STATUS_MASK     (0x7 << IAVF_AQC_CEE_PG_STATUS_SHIFT)
524 #define IAVF_AQC_CEE_PFC_STATUS_SHIFT   0x3
525 #define IAVF_AQC_CEE_PFC_STATUS_MASK    (0x7 << IAVF_AQC_CEE_PFC_STATUS_SHIFT)
526 #define IAVF_AQC_CEE_APP_STATUS_SHIFT   0x8
527 #define IAVF_AQC_CEE_APP_STATUS_MASK    (0x7 << IAVF_AQC_CEE_APP_STATUS_SHIFT)
528 #define IAVF_AQC_CEE_FCOE_STATUS_SHIFT  0x8
529 #define IAVF_AQC_CEE_FCOE_STATUS_MASK   (0x7 << IAVF_AQC_CEE_FCOE_STATUS_SHIFT)
530 #define IAVF_AQC_CEE_ISCSI_STATUS_SHIFT 0xB
531 #define IAVF_AQC_CEE_ISCSI_STATUS_MASK  (0x7 << IAVF_AQC_CEE_ISCSI_STATUS_SHIFT)
532 #define IAVF_AQC_CEE_FIP_STATUS_SHIFT   0x10
533 #define IAVF_AQC_CEE_FIP_STATUS_MASK    (0x7 << IAVF_AQC_CEE_FIP_STATUS_SHIFT)
534
535 /* struct iavf_aqc_get_cee_dcb_cfg_v1_resp was originally defined with
536  * word boundary layout issues, which the Linux compilers silently deal
537  * with by adding padding, making the actual struct larger than designed.
538  * However, the FW compiler for the NIC is less lenient and complains
539  * about the struct.  Hence, the struct defined here has an extra byte in
540  * fields reserved3 and reserved4 to directly acknowledge that padding,
541  * and the new length is used in the length check macro.
542  */
543 struct iavf_aqc_get_cee_dcb_cfg_v1_resp {
544         u8      reserved1;
545         u8      oper_num_tc;
546         u8      oper_prio_tc[4];
547         u8      reserved2;
548         u8      oper_tc_bw[8];
549         u8      oper_pfc_en;
550         u8      reserved3[2];
551         __le16  oper_app_prio;
552         u8      reserved4[2];
553         __le16  tlv_status;
554 };
555
556 IAVF_CHECK_STRUCT_LEN(0x18, iavf_aqc_get_cee_dcb_cfg_v1_resp);
557
558 struct iavf_aqc_get_cee_dcb_cfg_resp {
559         u8      oper_num_tc;
560         u8      oper_prio_tc[4];
561         u8      oper_tc_bw[8];
562         u8      oper_pfc_en;
563         __le16  oper_app_prio;
564         __le32  tlv_status;
565         u8      reserved[12];
566 };
567
568 IAVF_CHECK_STRUCT_LEN(0x20, iavf_aqc_get_cee_dcb_cfg_resp);
569
570 /*      Set Local LLDP MIB (indirect 0x0A08)
571  *      Used to replace the local MIB of a given LLDP agent. e.g. DCBx
572  */
573 struct iavf_aqc_lldp_set_local_mib {
574 #define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT        0
575 #define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << \
576                                         SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT)
577 #define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB 0x0
578 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT    (1)
579 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK     (1 << \
580                                 SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT)
581 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS          0x1
582         u8      type;
583         u8      reserved0;
584         __le16  length;
585         u8      reserved1[4];
586         __le32  address_high;
587         __le32  address_low;
588 };
589
590 IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_set_local_mib);
591
592 struct iavf_aqc_lldp_set_local_mib_resp {
593 #define SET_LOCAL_MIB_RESP_EVENT_TRIGGERED_MASK      0x01
594         u8  status;
595         u8  reserved[15];
596 };
597
598 IAVF_CHECK_STRUCT_LEN(0x10, iavf_aqc_lldp_set_local_mib_resp);
599
600 /*      Stop/Start LLDP Agent (direct 0x0A09)
601  *      Used for stopping/starting specific LLDP agent. e.g. DCBx
602  */
603 struct iavf_aqc_lldp_stop_start_specific_agent {
604 #define IAVF_AQC_START_SPECIFIC_AGENT_SHIFT     0
605 #define IAVF_AQC_START_SPECIFIC_AGENT_MASK \
606                                 (1 << IAVF_AQC_START_SPECIFIC_AGENT_SHIFT)
607         u8      command;
608         u8      reserved[15];
609 };
610
611 IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_stop_start_specific_agent);
612
613 struct iavf_aqc_get_set_rss_key {
614 #define IAVF_AQC_SET_RSS_KEY_VSI_VALID          (0x1 << 15)
615 #define IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT       0
616 #define IAVF_AQC_SET_RSS_KEY_VSI_ID_MASK        (0x3FF << \
617                                         IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT)
618         __le16  vsi_id;
619         u8      reserved[6];
620         __le32  addr_high;
621         __le32  addr_low;
622 };
623
624 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_key);
625
626 struct iavf_aqc_get_set_rss_key_data {
627         u8 standard_rss_key[0x28];
628         u8 extended_hash_key[0xc];
629 };
630
631 IAVF_CHECK_STRUCT_LEN(0x34, iavf_aqc_get_set_rss_key_data);
632
633 struct  iavf_aqc_get_set_rss_lut {
634 #define IAVF_AQC_SET_RSS_LUT_VSI_VALID          (0x1 << 15)
635 #define IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT       0
636 #define IAVF_AQC_SET_RSS_LUT_VSI_ID_MASK        (0x3FF << \
637                                         IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT)
638         __le16  vsi_id;
639 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT   0
640 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_MASK    (0x1 << \
641                                         IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT)
642
643 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_VSI     0
644 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_PF      1
645         __le16  flags;
646         u8      reserved[4];
647         __le32  addr_high;
648         __le32  addr_low;
649 };
650
651 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_lut);
652 #endif /* _IAVF_ADMINQ_CMD_H_ */