common/mlx5: introduce layer for multiple class drivers
[dpdk.git] / drivers / common / mlx5 / rte_common_mlx5_version.map
1 INTERNAL {
2         global:
3
4         mlx5_class_get;
5
6         mlx5_common_init;
7         mlx5_common_verbs_reg_mr;
8         mlx5_common_verbs_dereg_mr;
9
10         mlx5_create_mr_ext;
11
12         mlx5_dev_to_pci_addr;
13
14         mlx5_devx_cmd_create_cq;
15         mlx5_devx_cmd_create_flex_parser;
16         mlx5_devx_cmd_create_qp;
17         mlx5_devx_cmd_create_rq;
18         mlx5_devx_cmd_create_rqt;
19         mlx5_devx_cmd_create_sq;
20         mlx5_devx_cmd_create_tir;
21         mlx5_devx_cmd_create_td;
22         mlx5_devx_cmd_create_tis;
23         mlx5_devx_cmd_create_virtio_q_counters;
24         mlx5_devx_cmd_create_virtq;
25         mlx5_devx_cmd_destroy;
26         mlx5_devx_cmd_flow_counter_alloc;
27         mlx5_devx_cmd_flow_counter_query;
28         mlx5_devx_cmd_flow_dump;
29         mlx5_devx_cmd_mkey_create;
30         mlx5_devx_cmd_modify_qp_state;
31         mlx5_devx_cmd_modify_rq;
32         mlx5_devx_cmd_modify_rqt;
33         mlx5_devx_cmd_modify_sq;
34         mlx5_devx_cmd_modify_virtq;
35         mlx5_devx_cmd_qp_query_tis_td;
36         mlx5_devx_cmd_query_hca_attr;
37         mlx5_devx_cmd_query_parse_samples;
38         mlx5_devx_cmd_query_virtio_q_counters;
39         mlx5_devx_cmd_query_virtq;
40         mlx5_devx_cmd_register_read;
41         mlx5_devx_get_out_command_status;
42
43         mlx5_get_ifname_sysfs;
44         mlx5_get_dbr;
45
46         mlx5_mp_init_primary;
47         mlx5_mp_uninit_primary;
48         mlx5_mp_init_secondary;
49         mlx5_mp_uninit_secondary;
50         mlx5_mp_req_mr_create;
51         mlx5_mp_req_queue_state_modify;
52         mlx5_mp_req_verbs_cmd_fd;
53
54         mlx5_mr_btree_init;
55         mlx5_mr_btree_free;
56         mlx5_mr_btree_dump;
57         mlx5_mr_addr2mr_bh;
58         mlx5_mr_release_cache;
59         mlx5_mr_dump_cache;
60         mlx5_mr_rebuild_cache;
61         mlx5_mr_insert_cache;
62         mlx5_mr_lookup_cache;
63         mlx5_mr_lookup_list;
64         mlx5_mr_create_primary;
65         mlx5_mr_flush_local_cache;
66
67         mlx5_nl_allmulti;
68         mlx5_nl_devlink_family_id_get;
69         mlx5_nl_driver_reload;
70         mlx5_nl_enable_roce_get;
71         mlx5_nl_enable_roce_set;
72         mlx5_nl_ifindex;
73         mlx5_nl_init;
74         mlx5_nl_mac_addr_add;
75         mlx5_nl_mac_addr_flush;
76         mlx5_nl_mac_addr_remove;
77         mlx5_nl_mac_addr_sync;
78         mlx5_nl_portnum;
79         mlx5_nl_promisc;
80         mlx5_nl_switch_info;
81         mlx5_nl_vf_mac_addr_modify;
82         mlx5_nl_vlan_vmwa_create;
83         mlx5_nl_vlan_vmwa_delete;
84
85         mlx5_release_dbr;
86
87         mlx5_translate_port_name;
88
89         mlx5_malloc_mem_select;
90         mlx5_memory_stat_dump;
91         mlx5_malloc;
92         mlx5_realloc;
93         mlx5_free;
94
95         mlx5_pci_driver_register;
96 };
97