1d18217d398856ef0481978e04bb1f6c155a8164
[dpdk.git] / drivers / crypto / aesni_gcm / aesni_gcm_pmd.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
5  *
6  *   Redistribution and use in source and binary forms, with or without
7  *   modification, are permitted provided that the following conditions
8  *   are met:
9  *
10  *     * Redistributions of source code must retain the above copyright
11  *       notice, this list of conditions and the following disclaimer.
12  *     * Redistributions in binary form must reproduce the above copyright
13  *       notice, this list of conditions and the following disclaimer in
14  *       the documentation and/or other materials provided with the
15  *       distribution.
16  *     * Neither the name of Intel Corporation nor the names of its
17  *       contributors may be used to endorse or promote products derived
18  *       from this software without specific prior written permission.
19  *
20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_hexdump.h>
36 #include <rte_cryptodev.h>
37 #include <rte_cryptodev_pmd.h>
38 #include <rte_vdev.h>
39 #include <rte_malloc.h>
40 #include <rte_cpuflags.h>
41 #include <rte_byteorder.h>
42
43 #include "aesni_gcm_pmd_private.h"
44
45 static uint8_t cryptodev_driver_id;
46
47 /** Parse crypto xform chain and set private session parameters */
48 int
49 aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
50                 struct aesni_gcm_session *sess,
51                 const struct rte_crypto_sym_xform *xform)
52 {
53         const struct rte_crypto_sym_xform *auth_xform;
54         const struct rte_crypto_sym_xform *aead_xform;
55         uint16_t digest_length;
56         uint8_t key_length;
57         uint8_t *key;
58
59         /* AES-GMAC */
60         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
61                 auth_xform = xform;
62                 if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GMAC) {
63                         GCM_LOG_ERR("Only AES GMAC is supported as an "
64                                         "authentication only algorithm");
65                         return -ENOTSUP;
66                 }
67                 /* Set IV parameters */
68                 sess->iv.offset = auth_xform->auth.iv.offset;
69                 sess->iv.length = auth_xform->auth.iv.length;
70
71                 /* Select Crypto operation */
72                 if (auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
73                         sess->op = AESNI_GMAC_OP_GENERATE;
74                 else
75                         sess->op = AESNI_GMAC_OP_VERIFY;
76
77                 key_length = auth_xform->auth.key.length;
78                 key = auth_xform->auth.key.data;
79                 digest_length = auth_xform->auth.digest_length;
80
81         /* AES-GCM */
82         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
83                 aead_xform = xform;
84
85                 if (aead_xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM) {
86                         GCM_LOG_ERR("The only combined operation "
87                                                 "supported is AES GCM");
88                         return -ENOTSUP;
89                 }
90
91                 /* Set IV parameters */
92                 sess->iv.offset = aead_xform->aead.iv.offset;
93                 sess->iv.length = aead_xform->aead.iv.length;
94
95                 /* Select Crypto operation */
96                 if (aead_xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT)
97                         sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
98                 else
99                         sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
100
101                 key_length = aead_xform->aead.key.length;
102                 key = aead_xform->aead.key.data;
103
104                 sess->aad_length = aead_xform->aead.aad_length;
105                 digest_length = aead_xform->aead.digest_length;
106         } else {
107                 GCM_LOG_ERR("Wrong xform type, has to be AEAD or authentication");
108                 return -ENOTSUP;
109         }
110
111
112         /* IV check */
113         if (sess->iv.length != 16 && sess->iv.length != 12 &&
114                         sess->iv.length != 0) {
115                 GCM_LOG_ERR("Wrong IV length");
116                 return -EINVAL;
117         }
118
119         /* Check key length and calculate GCM pre-compute. */
120         switch (key_length) {
121         case 16:
122                 sess->key = AESNI_GCM_KEY_128;
123                 break;
124         case 24:
125                 sess->key = AESNI_GCM_KEY_192;
126                 break;
127         case 32:
128                 sess->key = AESNI_GCM_KEY_256;
129                 break;
130         default:
131                 GCM_LOG_ERR("Invalid key length");
132                 return -EINVAL;
133         }
134
135         gcm_ops[sess->key].precomp(key, &sess->gdata_key);
136
137         /* Digest check */
138         if (digest_length != 16 &&
139                         digest_length != 12 &&
140                         digest_length != 8) {
141                 GCM_LOG_ERR("digest");
142                 return -EINVAL;
143         }
144         sess->digest_length = digest_length;
145
146         return 0;
147 }
148
149 /** Get gcm session */
150 static struct aesni_gcm_session *
151 aesni_gcm_get_session(struct aesni_gcm_qp *qp, struct rte_crypto_op *op)
152 {
153         struct aesni_gcm_session *sess = NULL;
154         struct rte_crypto_sym_op *sym_op = op->sym;
155
156         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
157                 if (likely(sym_op->session != NULL))
158                         sess = (struct aesni_gcm_session *)
159                                         get_session_private_data(
160                                         sym_op->session,
161                                         cryptodev_driver_id);
162         } else  {
163                 void *_sess;
164                 void *_sess_private_data = NULL;
165
166                 if (rte_mempool_get(qp->sess_mp, (void **)&_sess))
167                         return NULL;
168
169                 if (rte_mempool_get(qp->sess_mp, (void **)&_sess_private_data))
170                         return NULL;
171
172                 sess = (struct aesni_gcm_session *)_sess_private_data;
173
174                 if (unlikely(aesni_gcm_set_session_parameters(qp->ops,
175                                 sess, sym_op->xform) != 0)) {
176                         rte_mempool_put(qp->sess_mp, _sess);
177                         rte_mempool_put(qp->sess_mp, _sess_private_data);
178                         sess = NULL;
179                 }
180                 sym_op->session = (struct rte_cryptodev_sym_session *)_sess;
181                 set_session_private_data(sym_op->session, cryptodev_driver_id,
182                         _sess_private_data);
183         }
184
185         if (unlikely(sess == NULL))
186                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
187
188         return sess;
189 }
190
191 /**
192  * Process a crypto operation, calling
193  * the GCM API from the multi buffer library.
194  *
195  * @param       qp              queue pair
196  * @param       op              symmetric crypto operation
197  * @param       session         GCM session
198  *
199  * @return
200  *
201  */
202 static int
203 process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
204                 struct aesni_gcm_session *session)
205 {
206         uint8_t *src, *dst;
207         uint8_t *iv_ptr;
208         struct rte_crypto_sym_op *sym_op = op->sym;
209         struct rte_mbuf *m_src = sym_op->m_src;
210         uint32_t offset, data_offset, data_length;
211         uint32_t part_len, total_len, data_len;
212
213         if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION ||
214                         session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
215                 offset = sym_op->aead.data.offset;
216                 data_offset = offset;
217                 data_length = sym_op->aead.data.length;
218         } else {
219                 offset = sym_op->auth.data.offset;
220                 data_offset = offset;
221                 data_length = sym_op->auth.data.length;
222         }
223
224         RTE_ASSERT(m_src != NULL);
225
226         while (offset >= m_src->data_len && data_length != 0) {
227                 offset -= m_src->data_len;
228                 m_src = m_src->next;
229
230                 RTE_ASSERT(m_src != NULL);
231         }
232
233         data_len = m_src->data_len - offset;
234         part_len = (data_len < data_length) ? data_len :
235                         data_length;
236
237         /* Destination buffer is required when segmented source buffer */
238         RTE_ASSERT((part_len == data_length) ||
239                         ((part_len != data_length) &&
240                                         (sym_op->m_dst != NULL)));
241         /* Segmented destination buffer is not supported */
242         RTE_ASSERT((sym_op->m_dst == NULL) ||
243                         ((sym_op->m_dst != NULL) &&
244                                         rte_pktmbuf_is_contiguous(sym_op->m_dst)));
245
246
247         dst = sym_op->m_dst ?
248                         rte_pktmbuf_mtod_offset(sym_op->m_dst, uint8_t *,
249                                         data_offset) :
250                         rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,
251                                         data_offset);
252
253         src = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);
254
255         iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
256                                 session->iv.offset);
257         /*
258          * GCM working in 12B IV mode => 16B pre-counter block we need
259          * to set BE LSB to 1, driver expects that 16B is allocated
260          */
261         if (session->iv.length == 12) {
262                 uint32_t *iv_padd = (uint32_t *)&(iv_ptr[12]);
263                 *iv_padd = rte_bswap32(1);
264         }
265
266         if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
267
268                 qp->ops[session->key].init(&session->gdata_key,
269                                 &qp->gdata_ctx,
270                                 iv_ptr,
271                                 sym_op->aead.aad.data,
272                                 (uint64_t)session->aad_length);
273
274                 qp->ops[session->key].update_enc(&session->gdata_key,
275                                 &qp->gdata_ctx, dst, src,
276                                 (uint64_t)part_len);
277                 total_len = data_length - part_len;
278
279                 while (total_len) {
280                         dst += part_len;
281                         m_src = m_src->next;
282
283                         RTE_ASSERT(m_src != NULL);
284
285                         src = rte_pktmbuf_mtod(m_src, uint8_t *);
286                         part_len = (m_src->data_len < total_len) ?
287                                         m_src->data_len : total_len;
288
289                         qp->ops[session->key].update_enc(&session->gdata_key,
290                                         &qp->gdata_ctx, dst, src,
291                                         (uint64_t)part_len);
292                         total_len -= part_len;
293                 }
294
295                 qp->ops[session->key].finalize(&session->gdata_key,
296                                 &qp->gdata_ctx,
297                                 sym_op->aead.digest.data,
298                                 (uint64_t)session->digest_length);
299         } else if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
300                 uint8_t *auth_tag = qp->temp_digest;
301
302                 qp->ops[session->key].init(&session->gdata_key,
303                                 &qp->gdata_ctx,
304                                 iv_ptr,
305                                 sym_op->aead.aad.data,
306                                 (uint64_t)session->aad_length);
307
308                 qp->ops[session->key].update_dec(&session->gdata_key,
309                                 &qp->gdata_ctx, dst, src,
310                                 (uint64_t)part_len);
311                 total_len = data_length - part_len;
312
313                 while (total_len) {
314                         dst += part_len;
315                         m_src = m_src->next;
316
317                         RTE_ASSERT(m_src != NULL);
318
319                         src = rte_pktmbuf_mtod(m_src, uint8_t *);
320                         part_len = (m_src->data_len < total_len) ?
321                                         m_src->data_len : total_len;
322
323                         qp->ops[session->key].update_dec(&session->gdata_key,
324                                         &qp->gdata_ctx,
325                                         dst, src,
326                                         (uint64_t)part_len);
327                         total_len -= part_len;
328                 }
329
330                 qp->ops[session->key].finalize(&session->gdata_key,
331                                 &qp->gdata_ctx,
332                                 auth_tag,
333                                 (uint64_t)session->digest_length);
334         } else if (session->op == AESNI_GMAC_OP_GENERATE) {
335                 qp->ops[session->key].init(&session->gdata_key,
336                                 &qp->gdata_ctx,
337                                 iv_ptr,
338                                 src,
339                                 (uint64_t)data_length);
340                 qp->ops[session->key].finalize(&session->gdata_key,
341                                 &qp->gdata_ctx,
342                                 sym_op->auth.digest.data,
343                                 (uint64_t)session->digest_length);
344         } else { /* AESNI_GMAC_OP_VERIFY */
345                 uint8_t *auth_tag = qp->temp_digest;
346
347                 qp->ops[session->key].init(&session->gdata_key,
348                                 &qp->gdata_ctx,
349                                 iv_ptr,
350                                 src,
351                                 (uint64_t)data_length);
352
353                 qp->ops[session->key].finalize(&session->gdata_key,
354                                 &qp->gdata_ctx,
355                                 auth_tag,
356                                 (uint64_t)session->digest_length);
357         }
358
359         return 0;
360 }
361
362 /**
363  * Process a completed job and return rte_mbuf which job processed
364  *
365  * @param job   JOB_AES_HMAC job to process
366  *
367  * @return
368  * - Returns processed mbuf which is trimmed of output digest used in
369  * verification of supplied digest in the case of a HASH_CIPHER operation
370  * - Returns NULL on invalid job
371  */
372 static void
373 post_process_gcm_crypto_op(struct aesni_gcm_qp *qp,
374                 struct rte_crypto_op *op,
375                 struct aesni_gcm_session *session)
376 {
377         op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
378
379         /* Verify digest if required */
380         if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION ||
381                         session->op == AESNI_GMAC_OP_VERIFY) {
382                 uint8_t *digest;
383
384                 uint8_t *tag = (uint8_t *)&qp->temp_digest;
385
386                 if (session->op == AESNI_GMAC_OP_VERIFY)
387                         digest = op->sym->auth.digest.data;
388                 else
389                         digest = op->sym->aead.digest.data;
390
391 #ifdef RTE_LIBRTE_PMD_AESNI_GCM_DEBUG
392                 rte_hexdump(stdout, "auth tag (orig):",
393                                 digest, session->digest_length);
394                 rte_hexdump(stdout, "auth tag (calc):",
395                                 tag, session->digest_length);
396 #endif
397
398                 if (memcmp(tag, digest, session->digest_length) != 0)
399                         op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
400         }
401 }
402
403 /**
404  * Process a completed GCM request
405  *
406  * @param qp            Queue Pair to process
407  * @param op            Crypto operation
408  * @param job           JOB_AES_HMAC job
409  *
410  * @return
411  * - Number of processed jobs
412  */
413 static void
414 handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
415                 struct rte_crypto_op *op,
416                 struct aesni_gcm_session *sess)
417 {
418         post_process_gcm_crypto_op(qp, op, sess);
419
420         /* Free session if a session-less crypto op */
421         if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
422                 memset(sess, 0, sizeof(struct aesni_gcm_session));
423                 memset(op->sym->session, 0,
424                                 rte_cryptodev_get_header_session_size());
425                 rte_mempool_put(qp->sess_mp, sess);
426                 rte_mempool_put(qp->sess_mp, op->sym->session);
427                 op->sym->session = NULL;
428         }
429 }
430
431 static uint16_t
432 aesni_gcm_pmd_dequeue_burst(void *queue_pair,
433                 struct rte_crypto_op **ops, uint16_t nb_ops)
434 {
435         struct aesni_gcm_session *sess;
436         struct aesni_gcm_qp *qp = queue_pair;
437
438         int retval = 0;
439         unsigned int i, nb_dequeued;
440
441         nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts,
442                         (void **)ops, nb_ops, NULL);
443
444         for (i = 0; i < nb_dequeued; i++) {
445
446                 sess = aesni_gcm_get_session(qp, ops[i]);
447                 if (unlikely(sess == NULL)) {
448                         ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
449                         qp->qp_stats.dequeue_err_count++;
450                         break;
451                 }
452
453                 retval = process_gcm_crypto_op(qp, ops[i], sess);
454                 if (retval < 0) {
455                         ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
456                         qp->qp_stats.dequeue_err_count++;
457                         break;
458                 }
459
460                 handle_completed_gcm_crypto_op(qp, ops[i], sess);
461         }
462
463         qp->qp_stats.dequeued_count += i;
464
465         return i;
466 }
467
468 static uint16_t
469 aesni_gcm_pmd_enqueue_burst(void *queue_pair,
470                 struct rte_crypto_op **ops, uint16_t nb_ops)
471 {
472         struct aesni_gcm_qp *qp = queue_pair;
473
474         unsigned int nb_enqueued;
475
476         nb_enqueued = rte_ring_enqueue_burst(qp->processed_pkts,
477                         (void **)ops, nb_ops, NULL);
478         qp->qp_stats.enqueued_count += nb_enqueued;
479
480         return nb_enqueued;
481 }
482
483 static int aesni_gcm_remove(struct rte_vdev_device *vdev);
484
485 static int
486 aesni_gcm_create(const char *name,
487                 struct rte_vdev_device *vdev,
488                 struct rte_cryptodev_pmd_init_params *init_params)
489 {
490         struct rte_cryptodev *dev;
491         struct aesni_gcm_private *internals;
492         enum aesni_gcm_vector_mode vector_mode;
493
494         /* Check CPU for support for AES instruction set */
495         if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
496                 GCM_LOG_ERR("AES instructions not supported by CPU");
497                 return -EFAULT;
498         }
499
500         dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
501         if (dev == NULL) {
502                 GCM_LOG_ERR("driver %s: create failed", init_params->name);
503                 return -ENODEV;
504         }
505
506         /* Check CPU for supported vector instruction set */
507         if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
508                 vector_mode = RTE_AESNI_GCM_AVX2;
509         else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
510                 vector_mode = RTE_AESNI_GCM_AVX;
511         else
512                 vector_mode = RTE_AESNI_GCM_SSE;
513
514         dev->driver_id = cryptodev_driver_id;
515         dev->dev_ops = rte_aesni_gcm_pmd_ops;
516
517         /* register rx/tx burst functions for data path */
518         dev->dequeue_burst = aesni_gcm_pmd_dequeue_burst;
519         dev->enqueue_burst = aesni_gcm_pmd_enqueue_burst;
520
521         dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
522                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
523                         RTE_CRYPTODEV_FF_CPU_AESNI |
524                         RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;
525
526         switch (vector_mode) {
527         case RTE_AESNI_GCM_SSE:
528                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
529                 break;
530         case RTE_AESNI_GCM_AVX:
531                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
532                 break;
533         case RTE_AESNI_GCM_AVX2:
534                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
535                 break;
536         default:
537                 break;
538         }
539
540         internals = dev->data->dev_private;
541
542         internals->vector_mode = vector_mode;
543
544         internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
545         internals->max_nb_sessions = init_params->max_nb_sessions;
546
547         return 0;
548 }
549
550 static int
551 aesni_gcm_probe(struct rte_vdev_device *vdev)
552 {
553         struct rte_cryptodev_pmd_init_params init_params = {
554                 "",
555                 sizeof(struct aesni_gcm_private),
556                 rte_socket_id(),
557                 RTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_QUEUE_PAIRS,
558                 RTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_SESSIONS
559         };
560         const char *name;
561         const char *input_args;
562
563         name = rte_vdev_device_name(vdev);
564         if (name == NULL)
565                 return -EINVAL;
566         input_args = rte_vdev_device_args(vdev);
567         rte_cryptodev_pmd_parse_input_args(&init_params, input_args);
568
569         return aesni_gcm_create(name, vdev, &init_params);
570 }
571
572 static int
573 aesni_gcm_remove(struct rte_vdev_device *vdev)
574 {
575         struct rte_cryptodev *cryptodev;
576         const char *name;
577
578         name = rte_vdev_device_name(vdev);
579         if (name == NULL)
580                 return -EINVAL;
581
582         cryptodev = rte_cryptodev_pmd_get_named_dev(name);
583         if (cryptodev == NULL)
584                 return -ENODEV;
585
586         return rte_cryptodev_pmd_destroy(cryptodev);
587 }
588
589 static struct rte_vdev_driver aesni_gcm_pmd_drv = {
590         .probe = aesni_gcm_probe,
591         .remove = aesni_gcm_remove
592 };
593
594 static struct cryptodev_driver aesni_gcm_crypto_drv;
595
596 RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_AESNI_GCM_PMD, aesni_gcm_pmd_drv);
597 RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_AESNI_GCM_PMD, cryptodev_aesni_gcm_pmd);
598 RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_GCM_PMD,
599         "max_nb_queue_pairs=<int> "
600         "max_nb_sessions=<int> "
601         "socket_id=<int>");
602 RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_gcm_crypto_drv, aesni_gcm_pmd_drv,
603                 cryptodev_driver_id);