drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   5  *   Copyright (c) 2016 NXP. All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <time.h>
  35 #include <net/if.h>
  36
  37 #include <rte_mbuf.h>
  38 #include <rte_cryptodev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_memcpy.h>
  41 #include <rte_string_fns.h>
  42 #include <rte_cycles.h>
  43 #include <rte_kvargs.h>
  44 #include <rte_dev.h>
  45 #include <rte_cryptodev_pmd.h>
  46 #include <rte_common.h>
  47 #include <rte_fslmc.h>
  48 #include <fslmc_vfio.h>
  49 #include <dpaa2_hw_pvt.h>
  50 #include <dpaa2_hw_dpio.h>
  51 #include <dpaa2_hw_mempool.h>
  52 #include <fsl_dpseci.h>
  53 #include <fsl_mc_sys.h>
  54
  55 #include "dpaa2_sec_priv.h"
  56 #include "dpaa2_sec_logs.h"
  57
  58 /* RTA header files */
  59 #include <hw/desc/ipsec.h>
  60 #include <hw/desc/algo.h>
  61
  62 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
  63  * a pointer to the shared descriptor
  64  */
  65 #define MIN_JOB_DESC_SIZE       (CAAM_CMD_SZ + CAAM_PTR_SZ)
  66 #define FSL_VENDOR_ID           0x1957
  67 #define FSL_DEVICE_ID           0x410
  68 #define FSL_SUBSYSTEM_SEC       1
  69 #define FSL_MC_DPSECI_DEVID     3
  70
  71 #define NO_PREFETCH 0
  72 #define TDES_CBC_IV_LEN 8
  73 #define AES_CBC_IV_LEN 16
  74 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
  75
  76 static inline int
  77 build_authenc_fd(dpaa2_sec_session *sess,
  78                  struct rte_crypto_op *op,
  79                  struct qbman_fd *fd, uint16_t bpid)
  80 {
  81         struct rte_crypto_sym_op *sym_op = op->sym;
  82         struct ctxt_priv *priv = sess->ctxt;
  83         struct qbman_fle *fle, *sge;
  84         struct sec_flow_context *flc;
  85         uint32_t auth_only_len = sym_op->auth.data.length -
  86                                 sym_op->cipher.data.length;
  87         int icv_len = sess->digest_length;
  88         uint8_t *old_icv;
  89         uint32_t mem_len = (7 * sizeof(struct qbman_fle)) + icv_len;
  90         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
  91                         sess->iv.offset);
  92
  93         PMD_INIT_FUNC_TRACE();
  94
  95         /* we are using the first FLE entry to store Mbuf.
  96          * Currently we donot know which FLE has the mbuf stored.
  97          * So while retreiving we can go back 1 FLE from the FD -ADDR
  98          * to get the MBUF Addr from the previous FLE.
  99          * We can have a better approach to use the inline Mbuf
 100          */
 101         fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
 102         if (!fle) {
 103                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 104                 return -1;
 105         }
 106         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 107         fle = fle + 1;
 108         sge = fle + 2;
 109         if (likely(bpid < MAX_BPID)) {
 110                 DPAA2_SET_FD_BPID(fd, bpid);
 111                 DPAA2_SET_FLE_BPID(fle, bpid);
 112                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 113                 DPAA2_SET_FLE_BPID(sge, bpid);
 114                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 115                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 116                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 117         } else {
 118                 DPAA2_SET_FD_IVP(fd);
 119                 DPAA2_SET_FLE_IVP(fle);
 120                 DPAA2_SET_FLE_IVP((fle + 1));
 121                 DPAA2_SET_FLE_IVP(sge);
 122                 DPAA2_SET_FLE_IVP((sge + 1));
 123                 DPAA2_SET_FLE_IVP((sge + 2));
 124                 DPAA2_SET_FLE_IVP((sge + 3));
 125         }
 126
 127         /* Save the shared descriptor */
 128         flc = &priv->flc_desc[0].flc;
 129         /* Configure FD as a FRAME LIST */
 130         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 131         DPAA2_SET_FD_COMPOUND_FMT(fd);
 132         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 133
 134         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 135                    "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
 136                    sym_op->auth.data.offset,
 137                    sym_op->auth.data.length,
 138                    sess->digest_length,
 139                    sym_op->cipher.data.offset,
 140                    sym_op->cipher.data.length,
 141                    sess->iv.length,
 142                    sym_op->m_src->data_off);
 143
 144         /* Configure Output FLE with Scatter/Gather Entry */
 145         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 146         if (auth_only_len)
 147                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 148         fle->length = (sess->dir == DIR_ENC) ?
 149                         (sym_op->cipher.data.length + icv_len) :
 150                         sym_op->cipher.data.length;
 151
 152         DPAA2_SET_FLE_SG_EXT(fle);
 153
 154         /* Configure Output SGE for Encap/Decap */
 155         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 156         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 157                                 sym_op->m_src->data_off);
 158         sge->length = sym_op->cipher.data.length;
 159
 160         if (sess->dir == DIR_ENC) {
 161                 sge++;
 162                 DPAA2_SET_FLE_ADDR(sge,
 163                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 164                 sge->length = sess->digest_length;
 165                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 166                                         sess->iv.length));
 167         }
 168         DPAA2_SET_FLE_FIN(sge);
 169
 170         sge++;
 171         fle++;
 172
 173         /* Configure Input FLE with Scatter/Gather Entry */
 174         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 175         DPAA2_SET_FLE_SG_EXT(fle);
 176         DPAA2_SET_FLE_FIN(fle);
 177         fle->length = (sess->dir == DIR_ENC) ?
 178                         (sym_op->auth.data.length + sess->iv.length) :
 179                         (sym_op->auth.data.length + sess->iv.length +
 180                          sess->digest_length);
 181
 182         /* Configure Input SGE for Encap/Decap */
 183         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 184         sge->length = sess->iv.length;
 185         sge++;
 186
 187         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 188         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 189                                 sym_op->m_src->data_off);
 190         sge->length = sym_op->auth.data.length;
 191         if (sess->dir == DIR_DEC) {
 192                 sge++;
 193                 old_icv = (uint8_t *)(sge + 1);
 194                 memcpy(old_icv, sym_op->auth.digest.data,
 195                        sess->digest_length);
 196                 memset(sym_op->auth.digest.data, 0, sess->digest_length);
 197                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 198                 sge->length = sess->digest_length;
 199                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 200                                  sess->digest_length +
 201                                  sess->iv.length));
 202         }
 203         DPAA2_SET_FLE_FIN(sge);
 204         if (auth_only_len) {
 205                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 206                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 207         }
 208         return 0;
 209 }
 210
 211 static inline int
 212 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 213               struct qbman_fd *fd, uint16_t bpid)
 214 {
 215         struct rte_crypto_sym_op *sym_op = op->sym;
 216         struct qbman_fle *fle, *sge;
 217         uint32_t mem_len = (sess->dir == DIR_ENC) ?
 218                            (3 * sizeof(struct qbman_fle)) :
 219                            (5 * sizeof(struct qbman_fle) +
 220                             sess->digest_length);
 221         struct sec_flow_context *flc;
 222         struct ctxt_priv *priv = sess->ctxt;
 223         uint8_t *old_digest;
 224
 225         PMD_INIT_FUNC_TRACE();
 226
 227         fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
 228         if (!fle) {
 229                 RTE_LOG(ERR, PMD, "Memory alloc failed for FLE\n");
 230                 return -1;
 231         }
 232         /* TODO we are using the first FLE entry to store Mbuf.
 233          * Currently we donot know which FLE has the mbuf stored.
 234          * So while retreiving we can go back 1 FLE from the FD -ADDR
 235          * to get the MBUF Addr from the previous FLE.
 236          * We can have a better approach to use the inline Mbuf
 237          */
 238         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 239         fle = fle + 1;
 240
 241         if (likely(bpid < MAX_BPID)) {
 242                 DPAA2_SET_FD_BPID(fd, bpid);
 243                 DPAA2_SET_FLE_BPID(fle, bpid);
 244                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 245         } else {
 246                 DPAA2_SET_FD_IVP(fd);
 247                 DPAA2_SET_FLE_IVP(fle);
 248                 DPAA2_SET_FLE_IVP((fle + 1));
 249         }
 250         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 251         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 252
 253         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 254         fle->length = sess->digest_length;
 255
 256         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 257         DPAA2_SET_FD_COMPOUND_FMT(fd);
 258         fle++;
 259
 260         if (sess->dir == DIR_ENC) {
 261                 DPAA2_SET_FLE_ADDR(fle,
 262                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 263                 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
 264                                      sym_op->m_src->data_off);
 265                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
 266                 fle->length = sym_op->auth.data.length;
 267         } else {
 268                 sge = fle + 2;
 269                 DPAA2_SET_FLE_SG_EXT(fle);
 270                 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 271
 272                 if (likely(bpid < MAX_BPID)) {
 273                         DPAA2_SET_FLE_BPID(sge, bpid);
 274                         DPAA2_SET_FLE_BPID(sge + 1, bpid);
 275                 } else {
 276                         DPAA2_SET_FLE_IVP(sge);
 277                         DPAA2_SET_FLE_IVP((sge + 1));
 278                 }
 279                 DPAA2_SET_FLE_ADDR(sge,
 280                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 281                 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 282                                      sym_op->m_src->data_off);
 283
 284                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
 285                                  sess->digest_length);
 286                 sge->length = sym_op->auth.data.length;
 287                 sge++;
 288                 old_digest = (uint8_t *)(sge + 1);
 289                 rte_memcpy(old_digest, sym_op->auth.digest.data,
 290                            sess->digest_length);
 291                 memset(sym_op->auth.digest.data, 0, sess->digest_length);
 292                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
 293                 sge->length = sess->digest_length;
 294                 fle->length = sym_op->auth.data.length +
 295                                 sess->digest_length;
 296                 DPAA2_SET_FLE_FIN(sge);
 297         }
 298         DPAA2_SET_FLE_FIN(fle);
 299
 300         return 0;
 301 }
 302
 303 static int
 304 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 305                 struct qbman_fd *fd, uint16_t bpid)
 306 {
 307         struct rte_crypto_sym_op *sym_op = op->sym;
 308         struct qbman_fle *fle, *sge;
 309         uint32_t mem_len = (5 * sizeof(struct qbman_fle));
 310         struct sec_flow_context *flc;
 311         struct ctxt_priv *priv = sess->ctxt;
 312         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 313                         sess->iv.offset);
 314
 315         PMD_INIT_FUNC_TRACE();
 316
 317         /* todo - we can use some mempool to avoid malloc here */
 318         fle = rte_zmalloc(NULL, mem_len, RTE_CACHE_LINE_SIZE);
 319         if (!fle) {
 320                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 321                 return -1;
 322         }
 323         /* TODO we are using the first FLE entry to store Mbuf.
 324          * Currently we donot know which FLE has the mbuf stored.
 325          * So while retreiving we can go back 1 FLE from the FD -ADDR
 326          * to get the MBUF Addr from the previous FLE.
 327          * We can have a better approach to use the inline Mbuf
 328          */
 329         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 330         fle = fle + 1;
 331         sge = fle + 2;
 332
 333         if (likely(bpid < MAX_BPID)) {
 334                 DPAA2_SET_FD_BPID(fd, bpid);
 335                 DPAA2_SET_FLE_BPID(fle, bpid);
 336                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 337                 DPAA2_SET_FLE_BPID(sge, bpid);
 338                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 339         } else {
 340                 DPAA2_SET_FD_IVP(fd);
 341                 DPAA2_SET_FLE_IVP(fle);
 342                 DPAA2_SET_FLE_IVP((fle + 1));
 343                 DPAA2_SET_FLE_IVP(sge);
 344                 DPAA2_SET_FLE_IVP((sge + 1));
 345         }
 346
 347         flc = &priv->flc_desc[0].flc;
 348         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 349         DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
 350                          sess->iv.length);
 351         DPAA2_SET_FD_COMPOUND_FMT(fd);
 352         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 353
 354         PMD_TX_LOG(DEBUG, "cipher_off: 0x%x/length %d,ivlen=%d data_off: 0x%x",
 355                    sym_op->cipher.data.offset,
 356                    sym_op->cipher.data.length,
 357                    sess->iv.length,
 358                    sym_op->m_src->data_off);
 359
 360         DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 361         DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
 362                              sym_op->m_src->data_off);
 363
 364         fle->length = sym_op->cipher.data.length + sess->iv.length;
 365
 366         PMD_TX_LOG(DEBUG, "1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
 367                    flc, fle, fle->addr_hi, fle->addr_lo, fle->length);
 368
 369         fle++;
 370
 371         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 372         fle->length = sym_op->cipher.data.length + sess->iv.length;
 373
 374         DPAA2_SET_FLE_SG_EXT(fle);
 375
 376         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 377         sge->length = sess->iv.length;
 378
 379         sge++;
 380         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 381         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 382                              sym_op->m_src->data_off);
 383
 384         sge->length = sym_op->cipher.data.length;
 385         DPAA2_SET_FLE_FIN(sge);
 386         DPAA2_SET_FLE_FIN(fle);
 387
 388         PMD_TX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 389                    (void *)DPAA2_GET_FD_ADDR(fd),
 390                    DPAA2_GET_FD_BPID(fd),
 391                    rte_dpaa2_bpid_info[bpid].meta_data_size,
 392                    DPAA2_GET_FD_OFFSET(fd),
 393                    DPAA2_GET_FD_LEN(fd));
 394
 395         return 0;
 396 }
 397
 398 static inline int
 399 build_sec_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 400              struct qbman_fd *fd, uint16_t bpid)
 401 {
 402         int ret = -1;
 403
 404         PMD_INIT_FUNC_TRACE();
 405
 406         switch (sess->ctxt_type) {
 407         case DPAA2_SEC_CIPHER:
 408                 ret = build_cipher_fd(sess, op, fd, bpid);
 409                 break;
 410         case DPAA2_SEC_AUTH:
 411                 ret = build_auth_fd(sess, op, fd, bpid);
 412                 break;
 413         case DPAA2_SEC_CIPHER_HASH:
 414                 ret = build_authenc_fd(sess, op, fd, bpid);
 415                 break;
 416         case DPAA2_SEC_HASH_CIPHER:
 417         default:
 418                 RTE_LOG(ERR, PMD, "error: Unsupported session\n");
 419         }
 420         return ret;
 421 }
 422
 423 static uint16_t
 424 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 425                         uint16_t nb_ops)
 426 {
 427         /* Function to transmit the frames to given device and VQ*/
 428         uint32_t loop;
 429         int32_t ret;
 430         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
 431         uint32_t frames_to_send;
 432         struct qbman_eq_desc eqdesc;
 433         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 434         struct qbman_swp *swp;
 435         uint16_t num_tx = 0;
 436         /*todo - need to support multiple buffer pools */
 437         uint16_t bpid;
 438         struct rte_mempool *mb_pool;
 439         dpaa2_sec_session *sess;
 440
 441         if (unlikely(nb_ops == 0))
 442                 return 0;
 443
 444         if (ops[0]->sess_type != RTE_CRYPTO_OP_WITH_SESSION) {
 445                 RTE_LOG(ERR, PMD, "sessionless crypto op not supported\n");
 446                 return 0;
 447         }
 448         /*Prepare enqueue descriptor*/
 449         qbman_eq_desc_clear(&eqdesc);
 450         qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
 451         qbman_eq_desc_set_response(&eqdesc, 0, 0);
 452         qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
 453
 454         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 455                 ret = dpaa2_affine_qbman_swp_sec();
 456                 if (ret) {
 457                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 458                         return 0;
 459                 }
 460         }
 461         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 462
 463         while (nb_ops) {
 464                 frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops;
 465
 466                 for (loop = 0; loop < frames_to_send; loop++) {
 467                         /*Clear the unused FD fields before sending*/
 468                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 469                         sess = (dpaa2_sec_session *)
 470                                 (*ops)->sym->session->_private;
 471                         mb_pool = (*ops)->sym->m_src->pool;
 472                         bpid = mempool_to_bpid(mb_pool);
 473                         ret = build_sec_fd(sess, *ops, &fd_arr[loop], bpid);
 474                         if (ret) {
 475                                 PMD_DRV_LOG(ERR, "error: Improper packet"
 476                                             " contents for crypto operation\n");
 477                                 goto skip_tx;
 478                         }
 479                         ops++;
 480                 }
 481                 loop = 0;
 482                 while (loop < frames_to_send) {
 483                         loop += qbman_swp_send_multiple(swp, &eqdesc,
 484                                                         &fd_arr[loop],
 485                                                         frames_to_send - loop);
 486                 }
 487
 488                 num_tx += frames_to_send;
 489                 nb_ops -= frames_to_send;
 490         }
 491 skip_tx:
 492         dpaa2_qp->tx_vq.tx_pkts += num_tx;
 493         dpaa2_qp->tx_vq.err_pkts += nb_ops;
 494         return num_tx;
 495 }
 496
 497 static inline struct rte_crypto_op *
 498 sec_fd_to_mbuf(const struct qbman_fd *fd)
 499 {
 500         struct qbman_fle *fle;
 501         struct rte_crypto_op *op;
 502
 503         fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
 504
 505         PMD_RX_LOG(DEBUG, "FLE addr = %x - %x, offset = %x",
 506                    fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
 507
 508         /* we are using the first FLE entry to store Mbuf.
 509          * Currently we donot know which FLE has the mbuf stored.
 510          * So while retreiving we can go back 1 FLE from the FD -ADDR
 511          * to get the MBUF Addr from the previous FLE.
 512          * We can have a better approach to use the inline Mbuf
 513          */
 514
 515         if (unlikely(DPAA2_GET_FD_IVP(fd))) {
 516                 /* TODO complete it. */
 517                 RTE_LOG(ERR, PMD, "error: Non inline buffer - WHAT to DO?");
 518                 return NULL;
 519         }
 520         op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
 521                         DPAA2_GET_FLE_ADDR((fle - 1)));
 522
 523         /* Prefeth op */
 524         rte_prefetch0(op->sym->m_src);
 525
 526         PMD_RX_LOG(DEBUG, "mbuf %p BMAN buf addr %p",
 527                    (void *)op->sym->m_src, op->sym->m_src->buf_addr);
 528
 529         PMD_RX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 530                    (void *)DPAA2_GET_FD_ADDR(fd),
 531                    DPAA2_GET_FD_BPID(fd),
 532                    rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
 533                    DPAA2_GET_FD_OFFSET(fd),
 534                    DPAA2_GET_FD_LEN(fd));
 535
 536         /* free the fle memory */
 537         rte_free(fle - 1);
 538
 539         return op;
 540 }
 541
 542 static uint16_t
 543 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 544                         uint16_t nb_ops)
 545 {
 546         /* Function is responsible to receive frames for a given device and VQ*/
 547         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 548         struct qbman_result *dq_storage;
 549         uint32_t fqid = dpaa2_qp->rx_vq.fqid;
 550         int ret, num_rx = 0;
 551         uint8_t is_last = 0, status;
 552         struct qbman_swp *swp;
 553         const struct qbman_fd *fd;
 554         struct qbman_pull_desc pulldesc;
 555
 556         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 557                 ret = dpaa2_affine_qbman_swp_sec();
 558                 if (ret) {
 559                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 560                         return 0;
 561                 }
 562         }
 563         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 564         dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
 565
 566         qbman_pull_desc_clear(&pulldesc);
 567         qbman_pull_desc_set_numframes(&pulldesc,
 568                                       (nb_ops > DPAA2_DQRR_RING_SIZE) ?
 569                                       DPAA2_DQRR_RING_SIZE : nb_ops);
 570         qbman_pull_desc_set_fq(&pulldesc, fqid);
 571         qbman_pull_desc_set_storage(&pulldesc, dq_storage,
 572                                     (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
 573                                     1);
 574
 575         /*Issue a volatile dequeue command. */
 576         while (1) {
 577                 if (qbman_swp_pull(swp, &pulldesc)) {
 578                         RTE_LOG(WARNING, PMD, "SEC VDQ command is not issued."
 579                                 "QBMAN is busy\n");
 580                         /* Portal was busy, try again */
 581                         continue;
 582                 }
 583                 break;
 584         };
 585
 586         /* Receive the packets till Last Dequeue entry is found with
 587          * respect to the above issues PULL command.
 588          */
 589         while (!is_last) {
 590                 /* Check if the previous issued command is completed.
 591                  * Also seems like the SWP is shared between the Ethernet Driver
 592                  * and the SEC driver.
 593                  */
 594                 while (!qbman_check_command_complete(swp, dq_storage))
 595                         ;
 596
 597                 /* Loop until the dq_storage is updated with
 598                  * new token by QBMAN
 599                  */
 600                 while (!qbman_result_has_new_result(swp, dq_storage))
 601                         ;
 602                 /* Check whether Last Pull command is Expired and
 603                  * setting Condition for Loop termination
 604                  */
 605                 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
 606                         is_last = 1;
 607                         /* Check for valid frame. */
 608                         status = (uint8_t)qbman_result_DQ_flags(dq_storage);
 609                         if (unlikely(
 610                                 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
 611                                 PMD_RX_LOG(DEBUG, "No frame is delivered");
 612                                 continue;
 613                         }
 614                 }
 615
 616                 fd = qbman_result_DQ_fd(dq_storage);
 617                 ops[num_rx] = sec_fd_to_mbuf(fd);
 618
 619                 if (unlikely(fd->simple.frc)) {
 620                         /* TODO Parse SEC errors */
 621                         RTE_LOG(ERR, PMD, "SEC returned Error - %x\n",
 622                                 fd->simple.frc);
 623                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
 624                 } else {
 625                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 626                 }
 627
 628                 num_rx++;
 629                 dq_storage++;
 630         } /* End of Packet Rx loop */
 631
 632         dpaa2_qp->rx_vq.rx_pkts += num_rx;
 633
 634         PMD_RX_LOG(DEBUG, "SEC Received %d Packets", num_rx);
 635         /*Return the total number of packets received to DPAA2 app*/
 636         return num_rx;
 637 }
 638
 639 /** Release queue pair */
 640 static int
 641 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 642 {
 643         struct dpaa2_sec_qp *qp =
 644                 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
 645
 646         PMD_INIT_FUNC_TRACE();
 647
 648         if (qp->rx_vq.q_storage) {
 649                 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
 650                 rte_free(qp->rx_vq.q_storage);
 651         }
 652         rte_free(qp);
 653
 654         dev->data->queue_pairs[queue_pair_id] = NULL;
 655
 656         return 0;
 657 }
 658
 659 /** Setup a queue pair */
 660 static int
 661 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 662                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
 663                 __rte_unused int socket_id)
 664 {
 665         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
 666         struct dpaa2_sec_qp *qp;
 667         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
 668         struct dpseci_rx_queue_cfg cfg;
 669         int32_t retcode;
 670
 671         PMD_INIT_FUNC_TRACE();
 672
 673         /* If qp is already in use free ring memory and qp metadata. */
 674         if (dev->data->queue_pairs[qp_id] != NULL) {
 675                 PMD_DRV_LOG(INFO, "QP already setup");
 676                 return 0;
 677         }
 678
 679         PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, conf =%p",
 680                     dev, qp_id, qp_conf);
 681
 682         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
 683
 684         qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
 685                         RTE_CACHE_LINE_SIZE);
 686         if (!qp) {
 687                 RTE_LOG(ERR, PMD, "malloc failed for rx/tx queues\n");
 688                 return -1;
 689         }
 690
 691         qp->rx_vq.dev = dev;
 692         qp->tx_vq.dev = dev;
 693         qp->rx_vq.q_storage = rte_malloc("sec dq storage",
 694                 sizeof(struct queue_storage_info_t),
 695                 RTE_CACHE_LINE_SIZE);
 696         if (!qp->rx_vq.q_storage) {
 697                 RTE_LOG(ERR, PMD, "malloc failed for q_storage\n");
 698                 return -1;
 699         }
 700         memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
 701
 702         if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
 703                 RTE_LOG(ERR, PMD, "dpaa2_alloc_dq_storage failed\n");
 704                 return -1;
 705         }
 706
 707         dev->data->queue_pairs[qp_id] = qp;
 708
 709         cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
 710         cfg.user_ctx = (uint64_t)(&qp->rx_vq);
 711         retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
 712                                       qp_id, &cfg);
 713         return retcode;
 714 }
 715
 716 /** Start queue pair */
 717 static int
 718 dpaa2_sec_queue_pair_start(__rte_unused struct rte_cryptodev *dev,
 719                            __rte_unused uint16_t queue_pair_id)
 720 {
 721         PMD_INIT_FUNC_TRACE();
 722
 723         return 0;
 724 }
 725
 726 /** Stop queue pair */
 727 static int
 728 dpaa2_sec_queue_pair_stop(__rte_unused struct rte_cryptodev *dev,
 729                           __rte_unused uint16_t queue_pair_id)
 730 {
 731         PMD_INIT_FUNC_TRACE();
 732
 733         return 0;
 734 }
 735
 736 /** Return the number of allocated queue pairs */
 737 static uint32_t
 738 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
 739 {
 740         PMD_INIT_FUNC_TRACE();
 741
 742         return dev->data->nb_queue_pairs;
 743 }
 744
 745 /** Returns the size of the aesni gcm session structure */
 746 static unsigned int
 747 dpaa2_sec_session_get_size(struct rte_cryptodev *dev __rte_unused)
 748 {
 749         PMD_INIT_FUNC_TRACE();
 750
 751         return sizeof(dpaa2_sec_session);
 752 }
 753
 754 static void
 755 dpaa2_sec_session_initialize(struct rte_mempool *mp __rte_unused,
 756                              void *sess __rte_unused)
 757 {
 758         PMD_INIT_FUNC_TRACE();
 759 }
 760
 761 static int
 762 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 763                       struct rte_crypto_sym_xform *xform,
 764                       dpaa2_sec_session *session)
 765 {
 766         struct dpaa2_sec_cipher_ctxt *ctxt = &session->ext_params.cipher_ctxt;
 767         struct alginfo cipherdata;
 768         int bufsize, i;
 769         struct ctxt_priv *priv;
 770         struct sec_flow_context *flc;
 771
 772         PMD_INIT_FUNC_TRACE();
 773
 774         /* For SEC CIPHER only one descriptor is required. */
 775         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
 776                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
 777                         RTE_CACHE_LINE_SIZE);
 778         if (priv == NULL) {
 779                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
 780                 return -1;
 781         }
 782
 783         flc = &priv->flc_desc[0].flc;
 784
 785         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
 786                         RTE_CACHE_LINE_SIZE);
 787         if (session->cipher_key.data == NULL) {
 788                 RTE_LOG(ERR, PMD, "No Memory for cipher key");
 789                 rte_free(priv);
 790                 return -1;
 791         }
 792         session->cipher_key.length = xform->cipher.key.length;
 793
 794         memcpy(session->cipher_key.data, xform->cipher.key.data,
 795                xform->cipher.key.length);
 796         cipherdata.key = (uint64_t)session->cipher_key.data;
 797         cipherdata.keylen = session->cipher_key.length;
 798         cipherdata.key_enc_flags = 0;
 799         cipherdata.key_type = RTA_DATA_IMM;
 800
 801         /* Set IV parameters */
 802         session->iv.offset = xform->cipher.iv.offset;
 803         session->iv.length = xform->cipher.iv.length;
 804
 805         switch (xform->cipher.algo) {
 806         case RTE_CRYPTO_CIPHER_AES_CBC:
 807                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
 808                 cipherdata.algmode = OP_ALG_AAI_CBC;
 809                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
 810                 ctxt->iv.length = AES_CBC_IV_LEN;
 811                 break;
 812         case RTE_CRYPTO_CIPHER_3DES_CBC:
 813                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
 814                 cipherdata.algmode = OP_ALG_AAI_CBC;
 815                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
 816                 ctxt->iv.length = TDES_CBC_IV_LEN;
 817                 break;
 818         case RTE_CRYPTO_CIPHER_AES_CTR:
 819         case RTE_CRYPTO_CIPHER_3DES_CTR:
 820         case RTE_CRYPTO_CIPHER_AES_ECB:
 821         case RTE_CRYPTO_CIPHER_3DES_ECB:
 822         case RTE_CRYPTO_CIPHER_AES_XTS:
 823         case RTE_CRYPTO_CIPHER_AES_F8:
 824         case RTE_CRYPTO_CIPHER_ARC4:
 825         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 826         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 827         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 828         case RTE_CRYPTO_CIPHER_NULL:
 829                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u",
 830                         xform->cipher.algo);
 831                 goto error_out;
 832         default:
 833                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
 834                         xform->cipher.algo);
 835                 goto error_out;
 836         }
 837         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
 838                                 DIR_ENC : DIR_DEC;
 839
 840         bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
 841                                         &cipherdata, NULL, ctxt->iv.length,
 842                         session->dir);
 843         if (bufsize < 0) {
 844                 RTE_LOG(ERR, PMD, "Crypto: Descriptor build failed\n");
 845                 goto error_out;
 846         }
 847         flc->dhr = 0;
 848         flc->bpv0 = 0x1;
 849         flc->mode_bits = 0x8000;
 850
 851         flc->word1_sdl = (uint8_t)bufsize;
 852         flc->word2_rflc_31_0 = lower_32_bits(
 853                         (uint64_t)&(((struct dpaa2_sec_qp *)
 854                         dev->data->queue_pairs[0])->rx_vq));
 855         flc->word3_rflc_63_32 = upper_32_bits(
 856                         (uint64_t)&(((struct dpaa2_sec_qp *)
 857                         dev->data->queue_pairs[0])->rx_vq));
 858         session->ctxt = priv;
 859
 860         for (i = 0; i < bufsize; i++)
 861                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
 862                             i, priv->flc_desc[0].desc[i]);
 863
 864         return 0;
 865
 866 error_out:
 867         rte_free(session->cipher_key.data);
 868         rte_free(priv);
 869         return -1;
 870 }
 871
 872 static int
 873 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
 874                     struct rte_crypto_sym_xform *xform,
 875                     dpaa2_sec_session *session)
 876 {
 877         struct dpaa2_sec_auth_ctxt *ctxt = &session->ext_params.auth_ctxt;
 878         struct alginfo authdata;
 879         unsigned int bufsize;
 880         struct ctxt_priv *priv;
 881         struct sec_flow_context *flc;
 882
 883         PMD_INIT_FUNC_TRACE();
 884
 885         /* For SEC AUTH three descriptors are required for various stages */
 886         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
 887                         sizeof(struct ctxt_priv) + 3 *
 888                         sizeof(struct sec_flc_desc),
 889                         RTE_CACHE_LINE_SIZE);
 890         if (priv == NULL) {
 891                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
 892                 return -1;
 893         }
 894
 895         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 896
 897         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
 898                         RTE_CACHE_LINE_SIZE);
 899         if (session->auth_key.data == NULL) {
 900                 RTE_LOG(ERR, PMD, "No Memory for auth key");
 901                 rte_free(priv);
 902                 return -1;
 903         }
 904         session->auth_key.length = xform->auth.key.length;
 905
 906         memcpy(session->auth_key.data, xform->auth.key.data,
 907                xform->auth.key.length);
 908         authdata.key = (uint64_t)session->auth_key.data;
 909         authdata.keylen = session->auth_key.length;
 910         authdata.key_enc_flags = 0;
 911         authdata.key_type = RTA_DATA_IMM;
 912
 913         session->digest_length = xform->auth.digest_length;
 914
 915         switch (xform->auth.algo) {
 916         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 917                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
 918                 authdata.algmode = OP_ALG_AAI_HMAC;
 919                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
 920                 break;
 921         case RTE_CRYPTO_AUTH_MD5_HMAC:
 922                 authdata.algtype = OP_ALG_ALGSEL_MD5;
 923                 authdata.algmode = OP_ALG_AAI_HMAC;
 924                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
 925                 break;
 926         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 927                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
 928                 authdata.algmode = OP_ALG_AAI_HMAC;
 929                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
 930                 break;
 931         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 932                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
 933                 authdata.algmode = OP_ALG_AAI_HMAC;
 934                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
 935                 break;
 936         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 937                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
 938                 authdata.algmode = OP_ALG_AAI_HMAC;
 939                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
 940                 break;
 941         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 942                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
 943                 authdata.algmode = OP_ALG_AAI_HMAC;
 944                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
 945                 break;
 946         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 947         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 948         case RTE_CRYPTO_AUTH_NULL:
 949         case RTE_CRYPTO_AUTH_SHA1:
 950         case RTE_CRYPTO_AUTH_SHA256:
 951         case RTE_CRYPTO_AUTH_SHA512:
 952         case RTE_CRYPTO_AUTH_SHA224:
 953         case RTE_CRYPTO_AUTH_SHA384:
 954         case RTE_CRYPTO_AUTH_MD5:
 955         case RTE_CRYPTO_AUTH_AES_GMAC:
 956         case RTE_CRYPTO_AUTH_KASUMI_F9:
 957         case RTE_CRYPTO_AUTH_AES_CMAC:
 958         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 959         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 960                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u",
 961                         xform->auth.algo);
 962                 goto error_out;
 963         default:
 964                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
 965                         xform->auth.algo);
 966                 goto error_out;
 967         }
 968         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
 969                                 DIR_ENC : DIR_DEC;
 970
 971         bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
 972                                    1, 0, &authdata, !session->dir,
 973                                    ctxt->trunc_len);
 974
 975         flc->word1_sdl = (uint8_t)bufsize;
 976         flc->word2_rflc_31_0 = lower_32_bits(
 977                         (uint64_t)&(((struct dpaa2_sec_qp *)
 978                         dev->data->queue_pairs[0])->rx_vq));
 979         flc->word3_rflc_63_32 = upper_32_bits(
 980                         (uint64_t)&(((struct dpaa2_sec_qp *)
 981                         dev->data->queue_pairs[0])->rx_vq));
 982         session->ctxt = priv;
 983
 984         return 0;
 985
 986 error_out:
 987         rte_free(session->auth_key.data);
 988         rte_free(priv);
 989         return -1;
 990 }
 991
 992 static int
 993 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
 994                     struct rte_crypto_sym_xform *xform,
 995                     dpaa2_sec_session *session)
 996 {
 997         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
 998         struct alginfo authdata, cipherdata;
 999         unsigned int bufsize;
1000         struct ctxt_priv *priv;
1001         struct sec_flow_context *flc;
1002         struct rte_crypto_cipher_xform *cipher_xform;
1003         struct rte_crypto_auth_xform *auth_xform;
1004         int err;
1005
1006         PMD_INIT_FUNC_TRACE();
1007
1008         if (session->ext_params.aead_ctxt.auth_cipher_text) {
1009                 cipher_xform = &xform->cipher;
1010                 auth_xform = &xform->next->auth;
1011                 session->ctxt_type =
1012                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1013                         DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1014         } else {
1015                 cipher_xform = &xform->next->cipher;
1016                 auth_xform = &xform->auth;
1017                 session->ctxt_type =
1018                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1019                         DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1020         }
1021
1022         /* Set IV parameters */
1023         session->iv.offset = cipher_xform->iv.offset;
1024         session->iv.length = cipher_xform->iv.length;
1025
1026         /* For SEC AEAD only one descriptor is required */
1027         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1028                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1029                         RTE_CACHE_LINE_SIZE);
1030         if (priv == NULL) {
1031                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
1032                 return -1;
1033         }
1034
1035         flc = &priv->flc_desc[0].flc;
1036
1037         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1038                                                RTE_CACHE_LINE_SIZE);
1039         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1040                 RTE_LOG(ERR, PMD, "No Memory for cipher key");
1041                 rte_free(priv);
1042                 return -1;
1043         }
1044         session->cipher_key.length = cipher_xform->key.length;
1045         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
1046                                              RTE_CACHE_LINE_SIZE);
1047         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
1048                 RTE_LOG(ERR, PMD, "No Memory for auth key");
1049                 rte_free(session->cipher_key.data);
1050                 rte_free(priv);
1051                 return -1;
1052         }
1053         session->auth_key.length = auth_xform->key.length;
1054         memcpy(session->cipher_key.data, cipher_xform->key.data,
1055                cipher_xform->key.length);
1056         memcpy(session->auth_key.data, auth_xform->key.data,
1057                auth_xform->key.length);
1058
1059         ctxt->trunc_len = auth_xform->digest_length;
1060         authdata.key = (uint64_t)session->auth_key.data;
1061         authdata.keylen = session->auth_key.length;
1062         authdata.key_enc_flags = 0;
1063         authdata.key_type = RTA_DATA_IMM;
1064
1065         session->digest_length = auth_xform->digest_length;
1066
1067         switch (auth_xform->algo) {
1068         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1069                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1070                 authdata.algmode = OP_ALG_AAI_HMAC;
1071                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1072                 break;
1073         case RTE_CRYPTO_AUTH_MD5_HMAC:
1074                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1075                 authdata.algmode = OP_ALG_AAI_HMAC;
1076                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1077                 break;
1078         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1079                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1080                 authdata.algmode = OP_ALG_AAI_HMAC;
1081                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1082                 break;
1083         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1084                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1085                 authdata.algmode = OP_ALG_AAI_HMAC;
1086                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1087                 break;
1088         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1089                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1090                 authdata.algmode = OP_ALG_AAI_HMAC;
1091                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1092                 break;
1093         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1094                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1095                 authdata.algmode = OP_ALG_AAI_HMAC;
1096                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1097                 break;
1098         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1099         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1100         case RTE_CRYPTO_AUTH_NULL:
1101         case RTE_CRYPTO_AUTH_SHA1:
1102         case RTE_CRYPTO_AUTH_SHA256:
1103         case RTE_CRYPTO_AUTH_SHA512:
1104         case RTE_CRYPTO_AUTH_SHA224:
1105         case RTE_CRYPTO_AUTH_SHA384:
1106         case RTE_CRYPTO_AUTH_MD5:
1107         case RTE_CRYPTO_AUTH_AES_GMAC:
1108         case RTE_CRYPTO_AUTH_KASUMI_F9:
1109         case RTE_CRYPTO_AUTH_AES_CMAC:
1110         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1111         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1112                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u",
1113                         auth_xform->algo);
1114                 goto error_out;
1115         default:
1116                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1117                         auth_xform->algo);
1118                 goto error_out;
1119         }
1120         cipherdata.key = (uint64_t)session->cipher_key.data;
1121         cipherdata.keylen = session->cipher_key.length;
1122         cipherdata.key_enc_flags = 0;
1123         cipherdata.key_type = RTA_DATA_IMM;
1124
1125         switch (cipher_xform->algo) {
1126         case RTE_CRYPTO_CIPHER_AES_CBC:
1127                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1128                 cipherdata.algmode = OP_ALG_AAI_CBC;
1129                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1130                 ctxt->iv.length = AES_CBC_IV_LEN;
1131                 break;
1132         case RTE_CRYPTO_CIPHER_3DES_CBC:
1133                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1134                 cipherdata.algmode = OP_ALG_AAI_CBC;
1135                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1136                 ctxt->iv.length = TDES_CBC_IV_LEN;
1137                 break;
1138         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1139         case RTE_CRYPTO_CIPHER_NULL:
1140         case RTE_CRYPTO_CIPHER_3DES_ECB:
1141         case RTE_CRYPTO_CIPHER_AES_ECB:
1142         case RTE_CRYPTO_CIPHER_AES_CTR:
1143         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1144                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u",
1145                         cipher_xform->algo);
1146                 goto error_out;
1147         default:
1148                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1149                         cipher_xform->algo);
1150                 goto error_out;
1151         }
1152         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1153                                 DIR_ENC : DIR_DEC;
1154
1155         priv->flc_desc[0].desc[0] = cipherdata.keylen;
1156         priv->flc_desc[0].desc[1] = authdata.keylen;
1157         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1158                                MIN_JOB_DESC_SIZE,
1159                                (unsigned int *)priv->flc_desc[0].desc,
1160                                &priv->flc_desc[0].desc[2], 2);
1161
1162         if (err < 0) {
1163                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths");
1164                 goto error_out;
1165         }
1166         if (priv->flc_desc[0].desc[2] & 1) {
1167                 cipherdata.key_type = RTA_DATA_IMM;
1168         } else {
1169                 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
1170                 cipherdata.key_type = RTA_DATA_PTR;
1171         }
1172         if (priv->flc_desc[0].desc[2] & (1 << 1)) {
1173                 authdata.key_type = RTA_DATA_IMM;
1174         } else {
1175                 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
1176                 authdata.key_type = RTA_DATA_PTR;
1177         }
1178         priv->flc_desc[0].desc[0] = 0;
1179         priv->flc_desc[0].desc[1] = 0;
1180         priv->flc_desc[0].desc[2] = 0;
1181
1182         if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
1183                 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
1184                                               0, &cipherdata, &authdata,
1185                                               ctxt->iv.length,
1186                                               ctxt->auth_only_len,
1187                                               ctxt->trunc_len,
1188                                               session->dir);
1189         } else {
1190                 RTE_LOG(ERR, PMD, "Hash before cipher not supported");
1191                 goto error_out;
1192         }
1193
1194         flc->word1_sdl = (uint8_t)bufsize;
1195         flc->word2_rflc_31_0 = lower_32_bits(
1196                         (uint64_t)&(((struct dpaa2_sec_qp *)
1197                         dev->data->queue_pairs[0])->rx_vq));
1198         flc->word3_rflc_63_32 = upper_32_bits(
1199                         (uint64_t)&(((struct dpaa2_sec_qp *)
1200                         dev->data->queue_pairs[0])->rx_vq));
1201         session->ctxt = priv;
1202
1203         return 0;
1204
1205 error_out:
1206         rte_free(session->cipher_key.data);
1207         rte_free(session->auth_key.data);
1208         rte_free(priv);
1209         return -1;
1210 }
1211
1212 static void *
1213 dpaa2_sec_session_configure(struct rte_cryptodev *dev,
1214                             struct rte_crypto_sym_xform *xform, void *sess)
1215 {
1216         dpaa2_sec_session *session = sess;
1217
1218         PMD_INIT_FUNC_TRACE();
1219
1220         if (unlikely(sess == NULL)) {
1221                 RTE_LOG(ERR, PMD, "invalid session struct");
1222                 return NULL;
1223         }
1224
1225         /* Default IV length = 0 */
1226         session->iv.length = 0;
1227
1228         /* Cipher Only */
1229         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1230                 session->ctxt_type = DPAA2_SEC_CIPHER;
1231                 dpaa2_sec_cipher_init(dev, xform, session);
1232
1233         /* Authentication Only */
1234         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1235                    xform->next == NULL) {
1236                 session->ctxt_type = DPAA2_SEC_AUTH;
1237                 dpaa2_sec_auth_init(dev, xform, session);
1238
1239         /* Cipher then Authenticate */
1240         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1241                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1242                 session->ext_params.aead_ctxt.auth_cipher_text = true;
1243                 dpaa2_sec_aead_init(dev, xform, session);
1244
1245         /* Authenticate then Cipher */
1246         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1247                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1248                 session->ext_params.aead_ctxt.auth_cipher_text = false;
1249                 dpaa2_sec_aead_init(dev, xform, session);
1250         } else {
1251                 RTE_LOG(ERR, PMD, "Invalid crypto type");
1252                 return NULL;
1253         }
1254
1255         return session;
1256 }
1257
1258 /** Clear the memory of session so it doesn't leave key material behind */
1259 static void
1260 dpaa2_sec_session_clear(struct rte_cryptodev *dev __rte_unused, void *sess)
1261 {
1262         PMD_INIT_FUNC_TRACE();
1263         dpaa2_sec_session *s = (dpaa2_sec_session *)sess;
1264
1265         if (s) {
1266                 rte_free(s->ctxt);
1267                 rte_free(s->cipher_key.data);
1268                 rte_free(s->auth_key.data);
1269                 memset(sess, 0, sizeof(dpaa2_sec_session));
1270         }
1271 }
1272
1273 static int
1274 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
1275                         struct rte_cryptodev_config *config __rte_unused)
1276 {
1277         PMD_INIT_FUNC_TRACE();
1278
1279         return -ENOTSUP;
1280 }
1281
1282 static int
1283 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
1284 {
1285         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1286         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1287         struct dpseci_attr attr;
1288         struct dpaa2_queue *dpaa2_q;
1289         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1290                                         dev->data->queue_pairs;
1291         struct dpseci_rx_queue_attr rx_attr;
1292         struct dpseci_tx_queue_attr tx_attr;
1293         int ret, i;
1294
1295         PMD_INIT_FUNC_TRACE();
1296
1297         memset(&attr, 0, sizeof(struct dpseci_attr));
1298
1299         ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
1300         if (ret) {
1301                 PMD_INIT_LOG(ERR, "DPSECI with HW_ID = %d ENABLE FAILED\n",
1302                              priv->hw_id);
1303                 goto get_attr_failure;
1304         }
1305         ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
1306         if (ret) {
1307                 PMD_INIT_LOG(ERR,
1308                              "DPSEC ATTRIBUTE READ FAILED, disabling DPSEC\n");
1309                 goto get_attr_failure;
1310         }
1311         for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
1312                 dpaa2_q = &qp[i]->rx_vq;
1313                 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1314                                     &rx_attr);
1315                 dpaa2_q->fqid = rx_attr.fqid;
1316                 PMD_INIT_LOG(DEBUG, "rx_fqid: %d", dpaa2_q->fqid);
1317         }
1318         for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
1319                 dpaa2_q = &qp[i]->tx_vq;
1320                 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1321                                     &tx_attr);
1322                 dpaa2_q->fqid = tx_attr.fqid;
1323                 PMD_INIT_LOG(DEBUG, "tx_fqid: %d", dpaa2_q->fqid);
1324         }
1325
1326         return 0;
1327 get_attr_failure:
1328         dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1329         return -1;
1330 }
1331
1332 static void
1333 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
1334 {
1335         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1336         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1337         int ret;
1338
1339         PMD_INIT_FUNC_TRACE();
1340
1341         ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1342         if (ret) {
1343                 PMD_INIT_LOG(ERR, "Failure in disabling dpseci %d device",
1344                              priv->hw_id);
1345                 return;
1346         }
1347
1348         ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
1349         if (ret < 0) {
1350                 PMD_INIT_LOG(ERR, "SEC Device cannot be reset:Error = %0x\n",
1351                              ret);
1352                 return;
1353         }
1354 }
1355
1356 static int
1357 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
1358 {
1359         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1360         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1361         int ret;
1362
1363         PMD_INIT_FUNC_TRACE();
1364
1365         /* Function is reverse of dpaa2_sec_dev_init.
1366          * It does the following:
1367          * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
1368          * 2. Close the DPSECI device
1369          * 3. Free the allocated resources.
1370          */
1371
1372         /*Close the device at underlying layer*/
1373         ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
1374         if (ret) {
1375                 PMD_INIT_LOG(ERR, "Failure closing dpseci device with"
1376                              " error code %d\n", ret);
1377                 return -1;
1378         }
1379
1380         /*Free the allocated memory for ethernet private data and dpseci*/
1381         priv->hw = NULL;
1382         free(dpseci);
1383
1384         return 0;
1385 }
1386
1387 static void
1388 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
1389                         struct rte_cryptodev_info *info)
1390 {
1391         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
1392
1393         PMD_INIT_FUNC_TRACE();
1394         if (info != NULL) {
1395                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
1396                 info->feature_flags = dev->feature_flags;
1397                 info->capabilities = dpaa2_sec_capabilities;
1398                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1399                 info->dev_type = RTE_CRYPTODEV_DPAA2_SEC_PMD;
1400         }
1401 }
1402
1403 static
1404 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
1405                          struct rte_cryptodev_stats *stats)
1406 {
1407         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1408         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1409         struct dpseci_sec_counters counters = {0};
1410         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1411                                         dev->data->queue_pairs;
1412         int ret, i;
1413
1414         PMD_INIT_FUNC_TRACE();
1415         if (stats == NULL) {
1416                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1417                 return;
1418         }
1419         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1420                 if (qp[i] == NULL) {
1421                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1422                         continue;
1423                 }
1424
1425                 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
1426                 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
1427                 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
1428                 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
1429         }
1430
1431         ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
1432                                       &counters);
1433         if (ret) {
1434                 PMD_DRV_LOG(ERR, "dpseci_get_sec_counters failed\n");
1435         } else {
1436                 PMD_DRV_LOG(INFO, "dpseci hw stats:"
1437                             "\n\tNumber of Requests Dequeued = %lu"
1438                             "\n\tNumber of Outbound Encrypt Requests = %lu"
1439                             "\n\tNumber of Inbound Decrypt Requests = %lu"
1440                             "\n\tNumber of Outbound Bytes Encrypted = %lu"
1441                             "\n\tNumber of Outbound Bytes Protected = %lu"
1442                             "\n\tNumber of Inbound Bytes Decrypted = %lu"
1443                             "\n\tNumber of Inbound Bytes Validated = %lu",
1444                             counters.dequeued_requests,
1445                             counters.ob_enc_requests,
1446                             counters.ib_dec_requests,
1447                             counters.ob_enc_bytes,
1448                             counters.ob_prot_bytes,
1449                             counters.ib_dec_bytes,
1450                             counters.ib_valid_bytes);
1451         }
1452 }
1453
1454 static
1455 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
1456 {
1457         int i;
1458         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1459                                    (dev->data->queue_pairs);
1460
1461         PMD_INIT_FUNC_TRACE();
1462
1463         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1464                 if (qp[i] == NULL) {
1465                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1466                         continue;
1467                 }
1468                 qp[i]->tx_vq.rx_pkts = 0;
1469                 qp[i]->tx_vq.tx_pkts = 0;
1470                 qp[i]->tx_vq.err_pkts = 0;
1471                 qp[i]->rx_vq.rx_pkts = 0;
1472                 qp[i]->rx_vq.tx_pkts = 0;
1473                 qp[i]->rx_vq.err_pkts = 0;
1474         }
1475 }
1476
1477 static struct rte_cryptodev_ops crypto_ops = {
1478         .dev_configure        = dpaa2_sec_dev_configure,
1479         .dev_start            = dpaa2_sec_dev_start,
1480         .dev_stop             = dpaa2_sec_dev_stop,
1481         .dev_close            = dpaa2_sec_dev_close,
1482         .dev_infos_get        = dpaa2_sec_dev_infos_get,
1483         .stats_get            = dpaa2_sec_stats_get,
1484         .stats_reset          = dpaa2_sec_stats_reset,
1485         .queue_pair_setup     = dpaa2_sec_queue_pair_setup,
1486         .queue_pair_release   = dpaa2_sec_queue_pair_release,
1487         .queue_pair_start     = dpaa2_sec_queue_pair_start,
1488         .queue_pair_stop      = dpaa2_sec_queue_pair_stop,
1489         .queue_pair_count     = dpaa2_sec_queue_pair_count,
1490         .session_get_size     = dpaa2_sec_session_get_size,
1491         .session_initialize   = dpaa2_sec_session_initialize,
1492         .session_configure    = dpaa2_sec_session_configure,
1493         .session_clear        = dpaa2_sec_session_clear,
1494 };
1495
1496 static int
1497 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
1498 {
1499         PMD_INIT_LOG(INFO, "Closing DPAA2_SEC device %s on numa socket %u\n",
1500                      dev->data->name, rte_socket_id());
1501
1502         return 0;
1503 }
1504
1505 static int
1506 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
1507 {
1508         struct dpaa2_sec_dev_private *internals;
1509         struct rte_device *dev = cryptodev->device;
1510         struct rte_dpaa2_device *dpaa2_dev;
1511         struct fsl_mc_io *dpseci;
1512         uint16_t token;
1513         struct dpseci_attr attr;
1514         int retcode, hw_id;
1515
1516         PMD_INIT_FUNC_TRACE();
1517         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1518         if (dpaa2_dev == NULL) {
1519                 PMD_INIT_LOG(ERR, "dpaa2_device not found\n");
1520                 return -1;
1521         }
1522         hw_id = dpaa2_dev->object_id;
1523
1524         cryptodev->dev_type = RTE_CRYPTODEV_DPAA2_SEC_PMD;
1525         cryptodev->dev_ops = &crypto_ops;
1526
1527         cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
1528         cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
1529         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
1530                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
1531                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
1532
1533         internals = cryptodev->data->dev_private;
1534         internals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;
1535
1536         /*
1537          * For secondary processes, we don't initialise any further as primary
1538          * has already done this work. Only check we don't need a different
1539          * RX function
1540          */
1541         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1542                 PMD_INIT_LOG(DEBUG, "Device already init by primary process");
1543                 return 0;
1544         }
1545         /*Open the rte device via MC and save the handle for further use*/
1546         dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
1547                                 sizeof(struct fsl_mc_io), 0);
1548         if (!dpseci) {
1549                 PMD_INIT_LOG(ERR,
1550                              "Error in allocating the memory for dpsec object");
1551                 return -1;
1552         }
1553         dpseci->regs = rte_mcp_ptr_list[0];
1554
1555         retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
1556         if (retcode != 0) {
1557                 PMD_INIT_LOG(ERR, "Cannot open the dpsec device: Error = %x",
1558                              retcode);
1559                 goto init_error;
1560         }
1561         retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
1562         if (retcode != 0) {
1563                 PMD_INIT_LOG(ERR,
1564                              "Cannot get dpsec device attributed: Error = %x",
1565                              retcode);
1566                 goto init_error;
1567         }
1568         sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
1569
1570         internals->max_nb_queue_pairs = attr.num_tx_queues;
1571         cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
1572         internals->hw = dpseci;
1573         internals->token = token;
1574
1575         PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
1576         return 0;
1577
1578 init_error:
1579         PMD_INIT_LOG(ERR, "driver %s: create failed\n", cryptodev->data->name);
1580
1581         /* dpaa2_sec_uninit(crypto_dev_name); */
1582         return -EFAULT;
1583 }
1584
1585 static int
1586 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
1587                           struct rte_dpaa2_device *dpaa2_dev)
1588 {
1589         struct rte_cryptodev *cryptodev;
1590         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
1591
1592         int retval;
1593
1594         sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
1595
1596         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
1597         if (cryptodev == NULL)
1598                 return -ENOMEM;
1599
1600         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1601                 cryptodev->data->dev_private = rte_zmalloc_socket(
1602                                         "cryptodev private structure",
1603                                         sizeof(struct dpaa2_sec_dev_private),
1604                                         RTE_CACHE_LINE_SIZE,
1605                                         rte_socket_id());
1606
1607                 if (cryptodev->data->dev_private == NULL)
1608                         rte_panic("Cannot allocate memzone for private "
1609                                         "device data");
1610         }
1611
1612         dpaa2_dev->cryptodev = cryptodev;
1613         cryptodev->device = &dpaa2_dev->device;
1614
1615         /* init user callbacks */
1616         TAILQ_INIT(&(cryptodev->link_intr_cbs));
1617
1618         /* Invoke PMD device initialization function */
1619         retval = dpaa2_sec_dev_init(cryptodev);
1620         if (retval == 0)
1621                 return 0;
1622
1623         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1624                 rte_free(cryptodev->data->dev_private);
1625
1626         cryptodev->attached = RTE_CRYPTODEV_DETACHED;
1627
1628         return -ENXIO;
1629 }
1630
1631 static int
1632 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
1633 {
1634         struct rte_cryptodev *cryptodev;
1635         int ret;
1636
1637         cryptodev = dpaa2_dev->cryptodev;
1638         if (cryptodev == NULL)
1639                 return -ENODEV;
1640
1641         ret = dpaa2_sec_uninit(cryptodev);
1642         if (ret)
1643                 return ret;
1644
1645         /* free crypto device */
1646         rte_cryptodev_pmd_release_device(cryptodev);
1647
1648         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1649                 rte_free(cryptodev->data->dev_private);
1650
1651         cryptodev->device = NULL;
1652         cryptodev->data = NULL;
1653
1654         return 0;
1655 }
1656
1657 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
1658         .drv_type = DPAA2_MC_DPSECI_DEVID,
1659         .driver = {
1660                 .name = "DPAA2 SEC PMD"
1661         },
1662         .probe = cryptodev_dpaa2_sec_probe,
1663         .remove = cryptodev_dpaa2_sec_remove,
1664 };
1665
1666 RTE_PMD_REGISTER_DPAA2(dpaa2_sec_pmd, rte_dpaa2_sec_driver);