drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_cryptodev.h>
  13 #include <rte_security_driver.h>
  14 #include <rte_malloc.h>
  15 #include <rte_memcpy.h>
  16 #include <rte_string_fns.h>
  17 #include <rte_cycles.h>
  18 #include <rte_kvargs.h>
  19 #include <rte_dev.h>
  20 #include <rte_cryptodev_pmd.h>
  21 #include <rte_common.h>
  22 #include <rte_fslmc.h>
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_dpio.h>
  26 #include <dpaa2_hw_mempool.h>
  27 #include <fsl_dpseci.h>
  28 #include <fsl_mc_sys.h>
  29
  30 #include "dpaa2_sec_priv.h"
  31 #include "dpaa2_sec_logs.h"
  32
  33 /* RTA header files */
  34 #include <hw/desc/ipsec.h>
  35 #include <hw/desc/algo.h>
  36
  37 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
  38  * a pointer to the shared descriptor
  39  */
  40 #define MIN_JOB_DESC_SIZE       (CAAM_CMD_SZ + CAAM_PTR_SZ)
  41 #define FSL_VENDOR_ID           0x1957
  42 #define FSL_DEVICE_ID           0x410
  43 #define FSL_SUBSYSTEM_SEC       1
  44 #define FSL_MC_DPSECI_DEVID     3
  45
  46 #define NO_PREFETCH 0
  47 /* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
  48 #define FLE_POOL_NUM_BUFS       32000
  49 #define FLE_POOL_BUF_SIZE       256
  50 #define FLE_POOL_CACHE_SIZE     512
  51 #define FLE_SG_MEM_SIZE         2048
  52 #define SEC_FLC_DHR_OUTBOUND    -114
  53 #define SEC_FLC_DHR_INBOUND     0
  54
  55 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
  56
  57 static uint8_t cryptodev_driver_id;
  58
  59 static inline int
  60 build_proto_fd(dpaa2_sec_session *sess,
  61                struct rte_crypto_op *op,
  62                struct qbman_fd *fd, uint16_t bpid)
  63 {
  64         struct rte_crypto_sym_op *sym_op = op->sym;
  65         struct ctxt_priv *priv = sess->ctxt;
  66         struct sec_flow_context *flc;
  67         struct rte_mbuf *mbuf = sym_op->m_src;
  68
  69         if (likely(bpid < MAX_BPID))
  70                 DPAA2_SET_FD_BPID(fd, bpid);
  71         else
  72                 DPAA2_SET_FD_IVP(fd);
  73
  74         /* Save the shared descriptor */
  75         flc = &priv->flc_desc[0].flc;
  76
  77         DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
  78         DPAA2_SET_FD_OFFSET(fd, sym_op->m_src->data_off);
  79         DPAA2_SET_FD_LEN(fd, sym_op->m_src->pkt_len);
  80         DPAA2_SET_FD_FLC(fd, (ptrdiff_t)flc);
  81
  82         /* save physical address of mbuf */
  83         op->sym->aead.digest.phys_addr = mbuf->buf_iova;
  84         mbuf->buf_iova = (size_t)op;
  85
  86         return 0;
  87 }
  88
  89 static inline int
  90 build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
  91                  struct rte_crypto_op *op,
  92                  struct qbman_fd *fd, __rte_unused uint16_t bpid)
  93 {
  94         struct rte_crypto_sym_op *sym_op = op->sym;
  95         struct ctxt_priv *priv = sess->ctxt;
  96         struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
  97         struct sec_flow_context *flc;
  98         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
  99         int icv_len = sess->digest_length;
 100         uint8_t *old_icv;
 101         struct rte_mbuf *mbuf;
 102         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 103                         sess->iv.offset);
 104
 105         PMD_INIT_FUNC_TRACE();
 106
 107         if (sym_op->m_dst)
 108                 mbuf = sym_op->m_dst;
 109         else
 110                 mbuf = sym_op->m_src;
 111
 112         /* first FLE entry used to store mbuf and session ctxt */
 113         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
 114                         RTE_CACHE_LINE_SIZE);
 115         if (unlikely(!fle)) {
 116                 RTE_LOG(ERR, PMD, "GCM SG: Memory alloc failed for SGE\n");
 117                 return -1;
 118         }
 119         memset(fle, 0, FLE_SG_MEM_SIZE);
 120         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 121         DPAA2_FLE_SAVE_CTXT(fle, (size_t)priv);
 122
 123         op_fle = fle + 1;
 124         ip_fle = fle + 2;
 125         sge = fle + 3;
 126
 127         /* Save the shared descriptor */
 128         flc = &priv->flc_desc[0].flc;
 129
 130         /* Configure FD as a FRAME LIST */
 131         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
 132         DPAA2_SET_FD_COMPOUND_FMT(fd);
 133         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 134
 135         PMD_TX_LOG(DEBUG, "GCM SG: auth_off: 0x%x/length %d, digest-len=%d\n"
 136                    "iv-len=%d data_off: 0x%x\n",
 137                    sym_op->aead.data.offset,
 138                    sym_op->aead.data.length,
 139                    sym_op->aead.digest.length,
 140                    sess->iv.length,
 141                    sym_op->m_src->data_off);
 142
 143         /* Configure Output FLE with Scatter/Gather Entry */
 144         DPAA2_SET_FLE_SG_EXT(op_fle);
 145         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
 146
 147         if (auth_only_len)
 148                 DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
 149
 150         op_fle->length = (sess->dir == DIR_ENC) ?
 151                         (sym_op->aead.data.length + icv_len + auth_only_len) :
 152                         sym_op->aead.data.length + auth_only_len;
 153
 154         /* Configure Output SGE for Encap/Decap */
 155         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 156         DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset -
 157                                                                 auth_only_len);
 158         sge->length = mbuf->data_len - sym_op->aead.data.offset + auth_only_len;
 159
 160         mbuf = mbuf->next;
 161         /* o/p segs */
 162         while (mbuf) {
 163                 sge++;
 164                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 165                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 166                 sge->length = mbuf->data_len;
 167                 mbuf = mbuf->next;
 168         }
 169         sge->length -= icv_len;
 170
 171         if (sess->dir == DIR_ENC) {
 172                 sge++;
 173                 DPAA2_SET_FLE_ADDR(sge,
 174                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
 175                 sge->length = icv_len;
 176         }
 177         DPAA2_SET_FLE_FIN(sge);
 178
 179         sge++;
 180         mbuf = sym_op->m_src;
 181
 182         /* Configure Input FLE with Scatter/Gather Entry */
 183         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
 184         DPAA2_SET_FLE_SG_EXT(ip_fle);
 185         DPAA2_SET_FLE_FIN(ip_fle);
 186         ip_fle->length = (sess->dir == DIR_ENC) ?
 187                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
 188                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
 189                  icv_len);
 190
 191         /* Configure Input SGE for Encap/Decap */
 192         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
 193         sge->length = sess->iv.length;
 194
 195         sge++;
 196         if (auth_only_len) {
 197                 DPAA2_SET_FLE_ADDR(sge,
 198                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
 199                 sge->length = auth_only_len;
 200                 sge++;
 201         }
 202
 203         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 204         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 205                                 mbuf->data_off);
 206         sge->length = mbuf->data_len - sym_op->aead.data.offset;
 207
 208         mbuf = mbuf->next;
 209         /* i/p segs */
 210         while (mbuf) {
 211                 sge++;
 212                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 213                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 214                 sge->length = mbuf->data_len;
 215                 mbuf = mbuf->next;
 216         }
 217
 218         if (sess->dir == DIR_DEC) {
 219                 sge++;
 220                 old_icv = (uint8_t *)(sge + 1);
 221                 memcpy(old_icv, sym_op->aead.digest.data, icv_len);
 222                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 223                 sge->length = icv_len;
 224         }
 225
 226         DPAA2_SET_FLE_FIN(sge);
 227         if (auth_only_len) {
 228                 DPAA2_SET_FLE_INTERNAL_JD(ip_fle, auth_only_len);
 229                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 230         }
 231         DPAA2_SET_FD_LEN(fd, ip_fle->length);
 232
 233         return 0;
 234 }
 235
 236 static inline int
 237 build_authenc_gcm_fd(dpaa2_sec_session *sess,
 238                      struct rte_crypto_op *op,
 239                      struct qbman_fd *fd, uint16_t bpid)
 240 {
 241         struct rte_crypto_sym_op *sym_op = op->sym;
 242         struct ctxt_priv *priv = sess->ctxt;
 243         struct qbman_fle *fle, *sge;
 244         struct sec_flow_context *flc;
 245         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
 246         int icv_len = sess->digest_length, retval;
 247         uint8_t *old_icv;
 248         struct rte_mbuf *dst;
 249         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 250                         sess->iv.offset);
 251
 252         PMD_INIT_FUNC_TRACE();
 253
 254         if (sym_op->m_dst)
 255                 dst = sym_op->m_dst;
 256         else
 257                 dst = sym_op->m_src;
 258
 259         /* TODO we are using the first FLE entry to store Mbuf and session ctxt.
 260          * Currently we donot know which FLE has the mbuf stored.
 261          * So while retreiving we can go back 1 FLE from the FD -ADDR
 262          * to get the MBUF Addr from the previous FLE.
 263          * We can have a better approach to use the inline Mbuf
 264          */
 265         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 266         if (retval) {
 267                 RTE_LOG(ERR, PMD, "GCM: Memory alloc failed for SGE\n");
 268                 return -1;
 269         }
 270         memset(fle, 0, FLE_POOL_BUF_SIZE);
 271         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 272         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 273         fle = fle + 1;
 274         sge = fle + 2;
 275         if (likely(bpid < MAX_BPID)) {
 276                 DPAA2_SET_FD_BPID(fd, bpid);
 277                 DPAA2_SET_FLE_BPID(fle, bpid);
 278                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 279                 DPAA2_SET_FLE_BPID(sge, bpid);
 280                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 281                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 282                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 283         } else {
 284                 DPAA2_SET_FD_IVP(fd);
 285                 DPAA2_SET_FLE_IVP(fle);
 286                 DPAA2_SET_FLE_IVP((fle + 1));
 287                 DPAA2_SET_FLE_IVP(sge);
 288                 DPAA2_SET_FLE_IVP((sge + 1));
 289                 DPAA2_SET_FLE_IVP((sge + 2));
 290                 DPAA2_SET_FLE_IVP((sge + 3));
 291         }
 292
 293         /* Save the shared descriptor */
 294         flc = &priv->flc_desc[0].flc;
 295         /* Configure FD as a FRAME LIST */
 296         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 297         DPAA2_SET_FD_COMPOUND_FMT(fd);
 298         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 299
 300         PMD_TX_LOG(DEBUG, "GCM: auth_off: 0x%x/length %d, digest-len=%d\n"
 301                    "iv-len=%d data_off: 0x%x\n",
 302                    sym_op->aead.data.offset,
 303                    sym_op->aead.data.length,
 304                    sym_op->aead.digest.length,
 305                    sess->iv.length,
 306                    sym_op->m_src->data_off);
 307
 308         /* Configure Output FLE with Scatter/Gather Entry */
 309         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 310         if (auth_only_len)
 311                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 312         fle->length = (sess->dir == DIR_ENC) ?
 313                         (sym_op->aead.data.length + icv_len + auth_only_len) :
 314                         sym_op->aead.data.length + auth_only_len;
 315
 316         DPAA2_SET_FLE_SG_EXT(fle);
 317
 318         /* Configure Output SGE for Encap/Decap */
 319         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 320         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 321                                 dst->data_off - auth_only_len);
 322         sge->length = sym_op->aead.data.length + auth_only_len;
 323
 324         if (sess->dir == DIR_ENC) {
 325                 sge++;
 326                 DPAA2_SET_FLE_ADDR(sge,
 327                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
 328                 sge->length = sess->digest_length;
 329                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 330                                         sess->iv.length + auth_only_len));
 331         }
 332         DPAA2_SET_FLE_FIN(sge);
 333
 334         sge++;
 335         fle++;
 336
 337         /* Configure Input FLE with Scatter/Gather Entry */
 338         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 339         DPAA2_SET_FLE_SG_EXT(fle);
 340         DPAA2_SET_FLE_FIN(fle);
 341         fle->length = (sess->dir == DIR_ENC) ?
 342                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
 343                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
 344                  sess->digest_length);
 345
 346         /* Configure Input SGE for Encap/Decap */
 347         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
 348         sge->length = sess->iv.length;
 349         sge++;
 350         if (auth_only_len) {
 351                 DPAA2_SET_FLE_ADDR(sge,
 352                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
 353                 sge->length = auth_only_len;
 354                 DPAA2_SET_FLE_BPID(sge, bpid);
 355                 sge++;
 356         }
 357
 358         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 359         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 360                                 sym_op->m_src->data_off);
 361         sge->length = sym_op->aead.data.length;
 362         if (sess->dir == DIR_DEC) {
 363                 sge++;
 364                 old_icv = (uint8_t *)(sge + 1);
 365                 memcpy(old_icv, sym_op->aead.digest.data,
 366                        sess->digest_length);
 367                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 368                 sge->length = sess->digest_length;
 369                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 370                                  sess->digest_length +
 371                                  sess->iv.length +
 372                                  auth_only_len));
 373         }
 374         DPAA2_SET_FLE_FIN(sge);
 375
 376         if (auth_only_len) {
 377                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 378                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 379         }
 380
 381         return 0;
 382 }
 383
 384 static inline int
 385 build_authenc_sg_fd(dpaa2_sec_session *sess,
 386                  struct rte_crypto_op *op,
 387                  struct qbman_fd *fd, __rte_unused uint16_t bpid)
 388 {
 389         struct rte_crypto_sym_op *sym_op = op->sym;
 390         struct ctxt_priv *priv = sess->ctxt;
 391         struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
 392         struct sec_flow_context *flc;
 393         uint32_t auth_only_len = sym_op->auth.data.length -
 394                                 sym_op->cipher.data.length;
 395         int icv_len = sess->digest_length;
 396         uint8_t *old_icv;
 397         struct rte_mbuf *mbuf;
 398         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 399                         sess->iv.offset);
 400
 401         PMD_INIT_FUNC_TRACE();
 402
 403         if (sym_op->m_dst)
 404                 mbuf = sym_op->m_dst;
 405         else
 406                 mbuf = sym_op->m_src;
 407
 408         /* first FLE entry used to store mbuf and session ctxt */
 409         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
 410                         RTE_CACHE_LINE_SIZE);
 411         if (unlikely(!fle)) {
 412                 RTE_LOG(ERR, PMD, "AUTHENC SG: Memory alloc failed for SGE\n");
 413                 return -1;
 414         }
 415         memset(fle, 0, FLE_SG_MEM_SIZE);
 416         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 417         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 418
 419         op_fle = fle + 1;
 420         ip_fle = fle + 2;
 421         sge = fle + 3;
 422
 423         /* Save the shared descriptor */
 424         flc = &priv->flc_desc[0].flc;
 425
 426         /* Configure FD as a FRAME LIST */
 427         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
 428         DPAA2_SET_FD_COMPOUND_FMT(fd);
 429         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 430
 431         PMD_TX_LOG(DEBUG,
 432                         "AUTHENC SG: auth_off: 0x%x/length %d, digest-len=%d\n"
 433                         "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
 434                    sym_op->auth.data.offset,
 435                    sym_op->auth.data.length,
 436                    sym_op->auth.digest.length,
 437                    sym_op->cipher.data.offset,
 438                    sym_op->cipher.data.length,
 439                    sym_op->cipher.iv.length,
 440                    sym_op->m_src->data_off);
 441
 442         /* Configure Output FLE with Scatter/Gather Entry */
 443         DPAA2_SET_FLE_SG_EXT(op_fle);
 444         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
 445
 446         if (auth_only_len)
 447                 DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
 448
 449         op_fle->length = (sess->dir == DIR_ENC) ?
 450                         (sym_op->cipher.data.length + icv_len) :
 451                         sym_op->cipher.data.length;
 452
 453         /* Configure Output SGE for Encap/Decap */
 454         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 455         DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->auth.data.offset);
 456         sge->length = mbuf->data_len - sym_op->auth.data.offset;
 457
 458         mbuf = mbuf->next;
 459         /* o/p segs */
 460         while (mbuf) {
 461                 sge++;
 462                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 463                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 464                 sge->length = mbuf->data_len;
 465                 mbuf = mbuf->next;
 466         }
 467         sge->length -= icv_len;
 468
 469         if (sess->dir == DIR_ENC) {
 470                 sge++;
 471                 DPAA2_SET_FLE_ADDR(sge,
 472                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 473                 sge->length = icv_len;
 474         }
 475         DPAA2_SET_FLE_FIN(sge);
 476
 477         sge++;
 478         mbuf = sym_op->m_src;
 479
 480         /* Configure Input FLE with Scatter/Gather Entry */
 481         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
 482         DPAA2_SET_FLE_SG_EXT(ip_fle);
 483         DPAA2_SET_FLE_FIN(ip_fle);
 484         ip_fle->length = (sess->dir == DIR_ENC) ?
 485                         (sym_op->auth.data.length + sess->iv.length) :
 486                         (sym_op->auth.data.length + sess->iv.length +
 487                          icv_len);
 488
 489         /* Configure Input SGE for Encap/Decap */
 490         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 491         sge->length = sess->iv.length;
 492
 493         sge++;
 494         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 495         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 496                                 mbuf->data_off);
 497         sge->length = mbuf->data_len - sym_op->auth.data.offset;
 498
 499         mbuf = mbuf->next;
 500         /* i/p segs */
 501         while (mbuf) {
 502                 sge++;
 503                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 504                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 505                 sge->length = mbuf->data_len;
 506                 mbuf = mbuf->next;
 507         }
 508         sge->length -= icv_len;
 509
 510         if (sess->dir == DIR_DEC) {
 511                 sge++;
 512                 old_icv = (uint8_t *)(sge + 1);
 513                 memcpy(old_icv, sym_op->auth.digest.data,
 514                        icv_len);
 515                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 516                 sge->length = icv_len;
 517         }
 518
 519         DPAA2_SET_FLE_FIN(sge);
 520         if (auth_only_len) {
 521                 DPAA2_SET_FLE_INTERNAL_JD(ip_fle, auth_only_len);
 522                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 523         }
 524         DPAA2_SET_FD_LEN(fd, ip_fle->length);
 525
 526         return 0;
 527 }
 528
 529 static inline int
 530 build_authenc_fd(dpaa2_sec_session *sess,
 531                  struct rte_crypto_op *op,
 532                  struct qbman_fd *fd, uint16_t bpid)
 533 {
 534         struct rte_crypto_sym_op *sym_op = op->sym;
 535         struct ctxt_priv *priv = sess->ctxt;
 536         struct qbman_fle *fle, *sge;
 537         struct sec_flow_context *flc;
 538         uint32_t auth_only_len = sym_op->auth.data.length -
 539                                 sym_op->cipher.data.length;
 540         int icv_len = sess->digest_length, retval;
 541         uint8_t *old_icv;
 542         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 543                         sess->iv.offset);
 544         struct rte_mbuf *dst;
 545
 546         PMD_INIT_FUNC_TRACE();
 547
 548         if (sym_op->m_dst)
 549                 dst = sym_op->m_dst;
 550         else
 551                 dst = sym_op->m_src;
 552
 553         /* we are using the first FLE entry to store Mbuf.
 554          * Currently we donot know which FLE has the mbuf stored.
 555          * So while retreiving we can go back 1 FLE from the FD -ADDR
 556          * to get the MBUF Addr from the previous FLE.
 557          * We can have a better approach to use the inline Mbuf
 558          */
 559         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 560         if (retval) {
 561                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 562                 return -1;
 563         }
 564         memset(fle, 0, FLE_POOL_BUF_SIZE);
 565         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 566         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 567         fle = fle + 1;
 568         sge = fle + 2;
 569         if (likely(bpid < MAX_BPID)) {
 570                 DPAA2_SET_FD_BPID(fd, bpid);
 571                 DPAA2_SET_FLE_BPID(fle, bpid);
 572                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 573                 DPAA2_SET_FLE_BPID(sge, bpid);
 574                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 575                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 576                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 577         } else {
 578                 DPAA2_SET_FD_IVP(fd);
 579                 DPAA2_SET_FLE_IVP(fle);
 580                 DPAA2_SET_FLE_IVP((fle + 1));
 581                 DPAA2_SET_FLE_IVP(sge);
 582                 DPAA2_SET_FLE_IVP((sge + 1));
 583                 DPAA2_SET_FLE_IVP((sge + 2));
 584                 DPAA2_SET_FLE_IVP((sge + 3));
 585         }
 586
 587         /* Save the shared descriptor */
 588         flc = &priv->flc_desc[0].flc;
 589         /* Configure FD as a FRAME LIST */
 590         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 591         DPAA2_SET_FD_COMPOUND_FMT(fd);
 592         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 593
 594         PMD_TX_LOG(DEBUG, "AUTHENC: auth_off: 0x%x/length %d, digest-len=%d\n"
 595                    "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
 596                    sym_op->auth.data.offset,
 597                    sym_op->auth.data.length,
 598                    sess->digest_length,
 599                    sym_op->cipher.data.offset,
 600                    sym_op->cipher.data.length,
 601                    sess->iv.length,
 602                    sym_op->m_src->data_off);
 603
 604         /* Configure Output FLE with Scatter/Gather Entry */
 605         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 606         if (auth_only_len)
 607                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 608         fle->length = (sess->dir == DIR_ENC) ?
 609                         (sym_op->cipher.data.length + icv_len) :
 610                         sym_op->cipher.data.length;
 611
 612         DPAA2_SET_FLE_SG_EXT(fle);
 613
 614         /* Configure Output SGE for Encap/Decap */
 615         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 616         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 617                                 dst->data_off);
 618         sge->length = sym_op->cipher.data.length;
 619
 620         if (sess->dir == DIR_ENC) {
 621                 sge++;
 622                 DPAA2_SET_FLE_ADDR(sge,
 623                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 624                 sge->length = sess->digest_length;
 625                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 626                                         sess->iv.length));
 627         }
 628         DPAA2_SET_FLE_FIN(sge);
 629
 630         sge++;
 631         fle++;
 632
 633         /* Configure Input FLE with Scatter/Gather Entry */
 634         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 635         DPAA2_SET_FLE_SG_EXT(fle);
 636         DPAA2_SET_FLE_FIN(fle);
 637         fle->length = (sess->dir == DIR_ENC) ?
 638                         (sym_op->auth.data.length + sess->iv.length) :
 639                         (sym_op->auth.data.length + sess->iv.length +
 640                          sess->digest_length);
 641
 642         /* Configure Input SGE for Encap/Decap */
 643         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 644         sge->length = sess->iv.length;
 645         sge++;
 646
 647         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 648         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 649                                 sym_op->m_src->data_off);
 650         sge->length = sym_op->auth.data.length;
 651         if (sess->dir == DIR_DEC) {
 652                 sge++;
 653                 old_icv = (uint8_t *)(sge + 1);
 654                 memcpy(old_icv, sym_op->auth.digest.data,
 655                        sess->digest_length);
 656                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 657                 sge->length = sess->digest_length;
 658                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 659                                  sess->digest_length +
 660                                  sess->iv.length));
 661         }
 662         DPAA2_SET_FLE_FIN(sge);
 663         if (auth_only_len) {
 664                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 665                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 666         }
 667         return 0;
 668 }
 669
 670 static inline int build_auth_sg_fd(
 671                 dpaa2_sec_session *sess,
 672                 struct rte_crypto_op *op,
 673                 struct qbman_fd *fd,
 674                 __rte_unused uint16_t bpid)
 675 {
 676         struct rte_crypto_sym_op *sym_op = op->sym;
 677         struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
 678         struct sec_flow_context *flc;
 679         struct ctxt_priv *priv = sess->ctxt;
 680         uint8_t *old_digest;
 681         struct rte_mbuf *mbuf;
 682
 683         PMD_INIT_FUNC_TRACE();
 684
 685         mbuf = sym_op->m_src;
 686         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
 687                         RTE_CACHE_LINE_SIZE);
 688         if (unlikely(!fle)) {
 689                 RTE_LOG(ERR, PMD, "AUTH SG: Memory alloc failed for SGE\n");
 690                 return -1;
 691         }
 692         memset(fle, 0, FLE_SG_MEM_SIZE);
 693         /* first FLE entry used to store mbuf and session ctxt */
 694         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 695         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 696         op_fle = fle + 1;
 697         ip_fle = fle + 2;
 698         sge = fle + 3;
 699
 700         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 701         /* sg FD */
 702         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 703         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
 704         DPAA2_SET_FD_COMPOUND_FMT(fd);
 705
 706         /* o/p fle */
 707         DPAA2_SET_FLE_ADDR(op_fle,
 708                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 709         op_fle->length = sess->digest_length;
 710
 711         /* i/p fle */
 712         DPAA2_SET_FLE_SG_EXT(ip_fle);
 713         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
 714         /* i/p 1st seg */
 715         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 716         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset + mbuf->data_off);
 717         sge->length = mbuf->data_len - sym_op->auth.data.offset;
 718
 719         /* i/p segs */
 720         mbuf = mbuf->next;
 721         while (mbuf) {
 722                 sge++;
 723                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 724                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 725                 sge->length = mbuf->data_len;
 726                 mbuf = mbuf->next;
 727         }
 728         if (sess->dir == DIR_ENC) {
 729                 /* Digest calculation case */
 730                 sge->length -= sess->digest_length;
 731                 ip_fle->length = sym_op->auth.data.length;
 732         } else {
 733                 /* Digest verification case */
 734                 sge++;
 735                 old_digest = (uint8_t *)(sge + 1);
 736                 rte_memcpy(old_digest, sym_op->auth.digest.data,
 737                            sess->digest_length);
 738                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
 739                 sge->length = sess->digest_length;
 740                 ip_fle->length = sym_op->auth.data.length +
 741                                 sess->digest_length;
 742         }
 743         DPAA2_SET_FLE_FIN(sge);
 744         DPAA2_SET_FLE_FIN(ip_fle);
 745         DPAA2_SET_FD_LEN(fd, ip_fle->length);
 746
 747         return 0;
 748 }
 749
 750 static inline int
 751 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 752               struct qbman_fd *fd, uint16_t bpid)
 753 {
 754         struct rte_crypto_sym_op *sym_op = op->sym;
 755         struct qbman_fle *fle, *sge;
 756         struct sec_flow_context *flc;
 757         struct ctxt_priv *priv = sess->ctxt;
 758         uint8_t *old_digest;
 759         int retval;
 760
 761         PMD_INIT_FUNC_TRACE();
 762
 763         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 764         if (retval) {
 765                 RTE_LOG(ERR, PMD, "AUTH Memory alloc failed for SGE\n");
 766                 return -1;
 767         }
 768         memset(fle, 0, FLE_POOL_BUF_SIZE);
 769         /* TODO we are using the first FLE entry to store Mbuf.
 770          * Currently we donot know which FLE has the mbuf stored.
 771          * So while retreiving we can go back 1 FLE from the FD -ADDR
 772          * to get the MBUF Addr from the previous FLE.
 773          * We can have a better approach to use the inline Mbuf
 774          */
 775         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 776         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 777         fle = fle + 1;
 778
 779         if (likely(bpid < MAX_BPID)) {
 780                 DPAA2_SET_FD_BPID(fd, bpid);
 781                 DPAA2_SET_FLE_BPID(fle, bpid);
 782                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 783         } else {
 784                 DPAA2_SET_FD_IVP(fd);
 785                 DPAA2_SET_FLE_IVP(fle);
 786                 DPAA2_SET_FLE_IVP((fle + 1));
 787         }
 788         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 789         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 790
 791         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 792         fle->length = sess->digest_length;
 793
 794         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 795         DPAA2_SET_FD_COMPOUND_FMT(fd);
 796         fle++;
 797
 798         if (sess->dir == DIR_ENC) {
 799                 DPAA2_SET_FLE_ADDR(fle,
 800                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 801                 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
 802                                      sym_op->m_src->data_off);
 803                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
 804                 fle->length = sym_op->auth.data.length;
 805         } else {
 806                 sge = fle + 2;
 807                 DPAA2_SET_FLE_SG_EXT(fle);
 808                 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 809
 810                 if (likely(bpid < MAX_BPID)) {
 811                         DPAA2_SET_FLE_BPID(sge, bpid);
 812                         DPAA2_SET_FLE_BPID(sge + 1, bpid);
 813                 } else {
 814                         DPAA2_SET_FLE_IVP(sge);
 815                         DPAA2_SET_FLE_IVP((sge + 1));
 816                 }
 817                 DPAA2_SET_FLE_ADDR(sge,
 818                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 819                 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 820                                      sym_op->m_src->data_off);
 821
 822                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
 823                                  sess->digest_length);
 824                 sge->length = sym_op->auth.data.length;
 825                 sge++;
 826                 old_digest = (uint8_t *)(sge + 1);
 827                 rte_memcpy(old_digest, sym_op->auth.digest.data,
 828                            sess->digest_length);
 829                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
 830                 sge->length = sess->digest_length;
 831                 fle->length = sym_op->auth.data.length +
 832                                 sess->digest_length;
 833                 DPAA2_SET_FLE_FIN(sge);
 834         }
 835         DPAA2_SET_FLE_FIN(fle);
 836
 837         return 0;
 838 }
 839
 840 static int
 841 build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 842                 struct qbman_fd *fd, __rte_unused uint16_t bpid)
 843 {
 844         struct rte_crypto_sym_op *sym_op = op->sym;
 845         struct qbman_fle *ip_fle, *op_fle, *sge, *fle;
 846         struct sec_flow_context *flc;
 847         struct ctxt_priv *priv = sess->ctxt;
 848         struct rte_mbuf *mbuf;
 849         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 850                         sess->iv.offset);
 851
 852         PMD_INIT_FUNC_TRACE();
 853
 854         if (sym_op->m_dst)
 855                 mbuf = sym_op->m_dst;
 856         else
 857                 mbuf = sym_op->m_src;
 858
 859         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
 860                         RTE_CACHE_LINE_SIZE);
 861         if (!fle) {
 862                 RTE_LOG(ERR, PMD, "CIPHER SG: Memory alloc failed for SGE\n");
 863                 return -1;
 864         }
 865         memset(fle, 0, FLE_SG_MEM_SIZE);
 866         /* first FLE entry used to store mbuf and session ctxt */
 867         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 868         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 869
 870         op_fle = fle + 1;
 871         ip_fle = fle + 2;
 872         sge = fle + 3;
 873
 874         flc = &priv->flc_desc[0].flc;
 875
 876         PMD_TX_LOG(DEBUG,
 877                         "CIPHER SG: cipher_off: 0x%x/length %d,ivlen=%d data_off: 0x%x",
 878                    sym_op->cipher.data.offset,
 879                    sym_op->cipher.data.length,
 880                    sym_op->cipher.iv.length,
 881                    sym_op->m_src->data_off);
 882
 883         /* o/p fle */
 884         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
 885         op_fle->length = sym_op->cipher.data.length;
 886         DPAA2_SET_FLE_SG_EXT(op_fle);
 887
 888         /* o/p 1st seg */
 889         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 890         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset + mbuf->data_off);
 891         sge->length = mbuf->data_len - sym_op->cipher.data.offset;
 892
 893         mbuf = mbuf->next;
 894         /* o/p segs */
 895         while (mbuf) {
 896                 sge++;
 897                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 898                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 899                 sge->length = mbuf->data_len;
 900                 mbuf = mbuf->next;
 901         }
 902         DPAA2_SET_FLE_FIN(sge);
 903
 904         PMD_TX_LOG(DEBUG,
 905                         "CIPHER SG: 1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
 906                         flc, fle, fle->addr_hi, fle->addr_lo,
 907                         fle->length);
 908
 909         /* i/p fle */
 910         mbuf = sym_op->m_src;
 911         sge++;
 912         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
 913         ip_fle->length = sess->iv.length + sym_op->cipher.data.length;
 914         DPAA2_SET_FLE_SG_EXT(ip_fle);
 915
 916         /* i/p IV */
 917         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 918         DPAA2_SET_FLE_OFFSET(sge, 0);
 919         sge->length = sess->iv.length;
 920
 921         sge++;
 922
 923         /* i/p 1st seg */
 924         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 925         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 926                              mbuf->data_off);
 927         sge->length = mbuf->data_len - sym_op->cipher.data.offset;
 928
 929         mbuf = mbuf->next;
 930         /* i/p segs */
 931         while (mbuf) {
 932                 sge++;
 933                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
 934                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
 935                 sge->length = mbuf->data_len;
 936                 mbuf = mbuf->next;
 937         }
 938         DPAA2_SET_FLE_FIN(sge);
 939         DPAA2_SET_FLE_FIN(ip_fle);
 940
 941         /* sg fd */
 942         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
 943         DPAA2_SET_FD_LEN(fd, ip_fle->length);
 944         DPAA2_SET_FD_COMPOUND_FMT(fd);
 945         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 946
 947         PMD_TX_LOG(DEBUG, "CIPHER SG: fdaddr =%" PRIx64
 948                 " bpid =%d meta =%d off =%d, len =%d\n",
 949                 DPAA2_GET_FD_ADDR(fd),
 950                 DPAA2_GET_FD_BPID(fd),
 951                 rte_dpaa2_bpid_info[bpid].meta_data_size,
 952                 DPAA2_GET_FD_OFFSET(fd),
 953                 DPAA2_GET_FD_LEN(fd));
 954         return 0;
 955 }
 956
 957 static int
 958 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 959                 struct qbman_fd *fd, uint16_t bpid)
 960 {
 961         struct rte_crypto_sym_op *sym_op = op->sym;
 962         struct qbman_fle *fle, *sge;
 963         int retval;
 964         struct sec_flow_context *flc;
 965         struct ctxt_priv *priv = sess->ctxt;
 966         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 967                         sess->iv.offset);
 968         struct rte_mbuf *dst;
 969
 970         PMD_INIT_FUNC_TRACE();
 971
 972         if (sym_op->m_dst)
 973                 dst = sym_op->m_dst;
 974         else
 975                 dst = sym_op->m_src;
 976
 977         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 978         if (retval) {
 979                 RTE_LOG(ERR, PMD, "CIPHER: Memory alloc failed for SGE\n");
 980                 return -1;
 981         }
 982         memset(fle, 0, FLE_POOL_BUF_SIZE);
 983         /* TODO we are using the first FLE entry to store Mbuf.
 984          * Currently we donot know which FLE has the mbuf stored.
 985          * So while retreiving we can go back 1 FLE from the FD -ADDR
 986          * to get the MBUF Addr from the previous FLE.
 987          * We can have a better approach to use the inline Mbuf
 988          */
 989         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 990         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
 991         fle = fle + 1;
 992         sge = fle + 2;
 993
 994         if (likely(bpid < MAX_BPID)) {
 995                 DPAA2_SET_FD_BPID(fd, bpid);
 996                 DPAA2_SET_FLE_BPID(fle, bpid);
 997                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 998                 DPAA2_SET_FLE_BPID(sge, bpid);
 999                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
1000         } else {
1001                 DPAA2_SET_FD_IVP(fd);
1002                 DPAA2_SET_FLE_IVP(fle);
1003                 DPAA2_SET_FLE_IVP((fle + 1));
1004                 DPAA2_SET_FLE_IVP(sge);
1005                 DPAA2_SET_FLE_IVP((sge + 1));
1006         }
1007
1008         flc = &priv->flc_desc[0].flc;
1009         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
1010         DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
1011                          sess->iv.length);
1012         DPAA2_SET_FD_COMPOUND_FMT(fd);
1013         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
1014
1015         PMD_TX_LOG(DEBUG,
1016                         "CIPHER: cipher_off: 0x%x/length %d, ivlen=%d, data_off: 0x%x",
1017                    sym_op->cipher.data.offset,
1018                    sym_op->cipher.data.length,
1019                    sess->iv.length,
1020                    sym_op->m_src->data_off);
1021
1022         DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(dst));
1023         DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
1024                              dst->data_off);
1025
1026         fle->length = sym_op->cipher.data.length + sess->iv.length;
1027
1028         PMD_TX_LOG(DEBUG,
1029                         "CIPHER: 1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
1030                         flc, fle, fle->addr_hi, fle->addr_lo,
1031                         fle->length);
1032
1033         fle++;
1034
1035         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
1036         fle->length = sym_op->cipher.data.length + sess->iv.length;
1037
1038         DPAA2_SET_FLE_SG_EXT(fle);
1039
1040         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
1041         sge->length = sess->iv.length;
1042
1043         sge++;
1044         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
1045         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
1046                              sym_op->m_src->data_off);
1047
1048         sge->length = sym_op->cipher.data.length;
1049         DPAA2_SET_FLE_FIN(sge);
1050         DPAA2_SET_FLE_FIN(fle);
1051
1052         PMD_TX_LOG(DEBUG,
1053                         "CIPHER: fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
1054                    (void *)DPAA2_GET_FD_ADDR(fd),
1055                    DPAA2_GET_FD_BPID(fd),
1056                    rte_dpaa2_bpid_info[bpid].meta_data_size,
1057                    DPAA2_GET_FD_OFFSET(fd),
1058                    DPAA2_GET_FD_LEN(fd));
1059
1060         return 0;
1061 }
1062
1063 static inline int
1064 build_sec_fd(struct rte_crypto_op *op,
1065              struct qbman_fd *fd, uint16_t bpid)
1066 {
1067         int ret = -1;
1068         dpaa2_sec_session *sess;
1069
1070         PMD_INIT_FUNC_TRACE();
1071
1072         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
1073                 sess = (dpaa2_sec_session *)get_session_private_data(
1074                                 op->sym->session, cryptodev_driver_id);
1075         else if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
1076                 sess = (dpaa2_sec_session *)get_sec_session_private_data(
1077                                 op->sym->sec_session);
1078         else
1079                 return -1;
1080
1081         /* Segmented buffer */
1082         if (unlikely(!rte_pktmbuf_is_contiguous(op->sym->m_src))) {
1083                 switch (sess->ctxt_type) {
1084                 case DPAA2_SEC_CIPHER:
1085                         ret = build_cipher_sg_fd(sess, op, fd, bpid);
1086                         break;
1087                 case DPAA2_SEC_AUTH:
1088                         ret = build_auth_sg_fd(sess, op, fd, bpid);
1089                         break;
1090                 case DPAA2_SEC_AEAD:
1091                         ret = build_authenc_gcm_sg_fd(sess, op, fd, bpid);
1092                         break;
1093                 case DPAA2_SEC_CIPHER_HASH:
1094                         ret = build_authenc_sg_fd(sess, op, fd, bpid);
1095                         break;
1096                 case DPAA2_SEC_HASH_CIPHER:
1097                 default:
1098                         RTE_LOG(ERR, PMD, "error: Unsupported session\n");
1099                 }
1100         } else {
1101                 switch (sess->ctxt_type) {
1102                 case DPAA2_SEC_CIPHER:
1103                         ret = build_cipher_fd(sess, op, fd, bpid);
1104                         break;
1105                 case DPAA2_SEC_AUTH:
1106                         ret = build_auth_fd(sess, op, fd, bpid);
1107                         break;
1108                 case DPAA2_SEC_AEAD:
1109                         ret = build_authenc_gcm_fd(sess, op, fd, bpid);
1110                         break;
1111                 case DPAA2_SEC_CIPHER_HASH:
1112                         ret = build_authenc_fd(sess, op, fd, bpid);
1113                         break;
1114                 case DPAA2_SEC_IPSEC:
1115                         ret = build_proto_fd(sess, op, fd, bpid);
1116                         break;
1117                 case DPAA2_SEC_HASH_CIPHER:
1118                 default:
1119                         RTE_LOG(ERR, PMD, "error: Unsupported session\n");
1120                 }
1121         }
1122         return ret;
1123 }
1124
1125 static uint16_t
1126 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
1127                         uint16_t nb_ops)
1128 {
1129         /* Function to transmit the frames to given device and VQ*/
1130         uint32_t loop;
1131         int32_t ret;
1132         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
1133         uint32_t frames_to_send;
1134         struct qbman_eq_desc eqdesc;
1135         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
1136         struct qbman_swp *swp;
1137         uint16_t num_tx = 0;
1138         /*todo - need to support multiple buffer pools */
1139         uint16_t bpid;
1140         struct rte_mempool *mb_pool;
1141
1142         if (unlikely(nb_ops == 0))
1143                 return 0;
1144
1145         if (ops[0]->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
1146                 RTE_LOG(ERR, PMD, "sessionless crypto op not supported\n");
1147                 return 0;
1148         }
1149         /*Prepare enqueue descriptor*/
1150         qbman_eq_desc_clear(&eqdesc);
1151         qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
1152         qbman_eq_desc_set_response(&eqdesc, 0, 0);
1153         qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
1154
1155         if (!DPAA2_PER_LCORE_SEC_DPIO) {
1156                 ret = dpaa2_affine_qbman_swp_sec();
1157                 if (ret) {
1158                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
1159                         return 0;
1160                 }
1161         }
1162         swp = DPAA2_PER_LCORE_SEC_PORTAL;
1163
1164         while (nb_ops) {
1165                 frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops;
1166
1167                 for (loop = 0; loop < frames_to_send; loop++) {
1168                         /*Clear the unused FD fields before sending*/
1169                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
1170                         mb_pool = (*ops)->sym->m_src->pool;
1171                         bpid = mempool_to_bpid(mb_pool);
1172                         ret = build_sec_fd(*ops, &fd_arr[loop], bpid);
1173                         if (ret) {
1174                                 PMD_DRV_LOG(ERR, "error: Improper packet"
1175                                             " contents for crypto operation\n");
1176                                 goto skip_tx;
1177                         }
1178                         ops++;
1179                 }
1180                 loop = 0;
1181                 while (loop < frames_to_send) {
1182                         loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
1183                                                         &fd_arr[loop],
1184                                                         NULL,
1185                                                         frames_to_send - loop);
1186                 }
1187
1188                 num_tx += frames_to_send;
1189                 nb_ops -= frames_to_send;
1190         }
1191 skip_tx:
1192         dpaa2_qp->tx_vq.tx_pkts += num_tx;
1193         dpaa2_qp->tx_vq.err_pkts += nb_ops;
1194         return num_tx;
1195 }
1196
1197 static inline struct rte_crypto_op *
1198 sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
1199 {
1200         struct rte_crypto_op *op;
1201         uint16_t len = DPAA2_GET_FD_LEN(fd);
1202         uint16_t diff = 0;
1203         dpaa2_sec_session *sess_priv;
1204
1205         struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
1206                 DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
1207                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
1208
1209         op = (struct rte_crypto_op *)(size_t)mbuf->buf_iova;
1210         mbuf->buf_iova = op->sym->aead.digest.phys_addr;
1211         op->sym->aead.digest.phys_addr = 0L;
1212
1213         sess_priv = (dpaa2_sec_session *)get_sec_session_private_data(
1214                                 op->sym->sec_session);
1215         if (sess_priv->dir == DIR_ENC)
1216                 mbuf->data_off += SEC_FLC_DHR_OUTBOUND;
1217         else
1218                 mbuf->data_off += SEC_FLC_DHR_INBOUND;
1219         diff = len - mbuf->pkt_len;
1220         mbuf->pkt_len += diff;
1221         mbuf->data_len += diff;
1222
1223         return op;
1224 }
1225
1226 static inline struct rte_crypto_op *
1227 sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
1228 {
1229         struct qbman_fle *fle;
1230         struct rte_crypto_op *op;
1231         struct ctxt_priv *priv;
1232         struct rte_mbuf *dst, *src;
1233
1234         if (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)
1235                 return sec_simple_fd_to_mbuf(fd, driver_id);
1236
1237         fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
1238
1239         PMD_RX_LOG(DEBUG, "FLE addr = %x - %x, offset = %x",
1240                    fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
1241
1242         /* we are using the first FLE entry to store Mbuf.
1243          * Currently we donot know which FLE has the mbuf stored.
1244          * So while retreiving we can go back 1 FLE from the FD -ADDR
1245          * to get the MBUF Addr from the previous FLE.
1246          * We can have a better approach to use the inline Mbuf
1247          */
1248
1249         if (unlikely(DPAA2_GET_FD_IVP(fd))) {
1250                 /* TODO complete it. */
1251                 RTE_LOG(ERR, PMD, "error: Non inline buffer - WHAT to DO?\n");
1252                 return NULL;
1253         }
1254         op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
1255                         DPAA2_GET_FLE_ADDR((fle - 1)));
1256
1257         /* Prefeth op */
1258         src = op->sym->m_src;
1259         rte_prefetch0(src);
1260
1261         if (op->sym->m_dst) {
1262                 dst = op->sym->m_dst;
1263                 rte_prefetch0(dst);
1264         } else
1265                 dst = src;
1266
1267         PMD_RX_LOG(DEBUG, "mbuf %p BMAN buf addr %p",
1268                    (void *)dst, dst->buf_addr);
1269
1270         PMD_RX_LOG(DEBUG, "fdaddr =%" PRIx64
1271                 " bpid =%d meta =%d off =%d, len =%d",
1272                 DPAA2_GET_FD_ADDR(fd),
1273                 DPAA2_GET_FD_BPID(fd),
1274                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
1275                 DPAA2_GET_FD_OFFSET(fd),
1276                 DPAA2_GET_FD_LEN(fd));
1277
1278         /* free the fle memory */
1279         if (likely(rte_pktmbuf_is_contiguous(src))) {
1280                 priv = (struct ctxt_priv *)(size_t)DPAA2_GET_FLE_CTXT(fle - 1);
1281                 rte_mempool_put(priv->fle_pool, (void *)(fle-1));
1282         } else
1283                 rte_free((void *)(fle-1));
1284
1285         return op;
1286 }
1287
1288 static uint16_t
1289 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
1290                         uint16_t nb_ops)
1291 {
1292         /* Function is responsible to receive frames for a given device and VQ*/
1293         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
1294         struct rte_cryptodev *dev =
1295                         (struct rte_cryptodev *)(dpaa2_qp->rx_vq.dev);
1296         struct qbman_result *dq_storage;
1297         uint32_t fqid = dpaa2_qp->rx_vq.fqid;
1298         int ret, num_rx = 0;
1299         uint8_t is_last = 0, status;
1300         struct qbman_swp *swp;
1301         const struct qbman_fd *fd;
1302         struct qbman_pull_desc pulldesc;
1303
1304         if (!DPAA2_PER_LCORE_SEC_DPIO) {
1305                 ret = dpaa2_affine_qbman_swp_sec();
1306                 if (ret) {
1307                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
1308                         return 0;
1309                 }
1310         }
1311         swp = DPAA2_PER_LCORE_SEC_PORTAL;
1312         dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
1313
1314         qbman_pull_desc_clear(&pulldesc);
1315         qbman_pull_desc_set_numframes(&pulldesc,
1316                                       (nb_ops > DPAA2_DQRR_RING_SIZE) ?
1317                                       DPAA2_DQRR_RING_SIZE : nb_ops);
1318         qbman_pull_desc_set_fq(&pulldesc, fqid);
1319         qbman_pull_desc_set_storage(&pulldesc, dq_storage,
1320                                     (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
1321                                     1);
1322
1323         /*Issue a volatile dequeue command. */
1324         while (1) {
1325                 if (qbman_swp_pull(swp, &pulldesc)) {
1326                         RTE_LOG(WARNING, PMD,
1327                                 "SEC VDQ command is not issued : QBMAN busy\n");
1328                         /* Portal was busy, try again */
1329                         continue;
1330                 }
1331                 break;
1332         };
1333
1334         /* Receive the packets till Last Dequeue entry is found with
1335          * respect to the above issues PULL command.
1336          */
1337         while (!is_last) {
1338                 /* Check if the previous issued command is completed.
1339                  * Also seems like the SWP is shared between the Ethernet Driver
1340                  * and the SEC driver.
1341                  */
1342                 while (!qbman_check_command_complete(dq_storage))
1343                         ;
1344
1345                 /* Loop until the dq_storage is updated with
1346                  * new token by QBMAN
1347                  */
1348                 while (!qbman_check_new_result(dq_storage))
1349                         ;
1350                 /* Check whether Last Pull command is Expired and
1351                  * setting Condition for Loop termination
1352                  */
1353                 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
1354                         is_last = 1;
1355                         /* Check for valid frame. */
1356                         status = (uint8_t)qbman_result_DQ_flags(dq_storage);
1357                         if (unlikely(
1358                                 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
1359                                 PMD_RX_LOG(DEBUG, "No frame is delivered");
1360                                 continue;
1361                         }
1362                 }
1363
1364                 fd = qbman_result_DQ_fd(dq_storage);
1365                 ops[num_rx] = sec_fd_to_mbuf(fd, dev->driver_id);
1366
1367                 if (unlikely(fd->simple.frc)) {
1368                         /* TODO Parse SEC errors */
1369                         RTE_LOG(ERR, PMD, "SEC returned Error - %x\n",
1370                                 fd->simple.frc);
1371                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
1372                 } else {
1373                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1374                 }
1375
1376                 num_rx++;
1377                 dq_storage++;
1378         } /* End of Packet Rx loop */
1379
1380         dpaa2_qp->rx_vq.rx_pkts += num_rx;
1381
1382         PMD_RX_LOG(DEBUG, "SEC Received %d Packets", num_rx);
1383         /*Return the total number of packets received to DPAA2 app*/
1384         return num_rx;
1385 }
1386
1387 /** Release queue pair */
1388 static int
1389 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
1390 {
1391         struct dpaa2_sec_qp *qp =
1392                 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
1393
1394         PMD_INIT_FUNC_TRACE();
1395
1396         if (qp->rx_vq.q_storage) {
1397                 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
1398                 rte_free(qp->rx_vq.q_storage);
1399         }
1400         rte_free(qp);
1401
1402         dev->data->queue_pairs[queue_pair_id] = NULL;
1403
1404         return 0;
1405 }
1406
1407 /** Setup a queue pair */
1408 static int
1409 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1410                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
1411                 __rte_unused int socket_id,
1412                 __rte_unused struct rte_mempool *session_pool)
1413 {
1414         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1415         struct dpaa2_sec_qp *qp;
1416         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1417         struct dpseci_rx_queue_cfg cfg;
1418         int32_t retcode;
1419
1420         PMD_INIT_FUNC_TRACE();
1421
1422         /* If qp is already in use free ring memory and qp metadata. */
1423         if (dev->data->queue_pairs[qp_id] != NULL) {
1424                 PMD_DRV_LOG(INFO, "QP already setup");
1425                 return 0;
1426         }
1427
1428         PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, conf =%p",
1429                     dev, qp_id, qp_conf);
1430
1431         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
1432
1433         qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
1434                         RTE_CACHE_LINE_SIZE);
1435         if (!qp) {
1436                 RTE_LOG(ERR, PMD, "malloc failed for rx/tx queues\n");
1437                 return -1;
1438         }
1439
1440         qp->rx_vq.dev = dev;
1441         qp->tx_vq.dev = dev;
1442         qp->rx_vq.q_storage = rte_malloc("sec dq storage",
1443                 sizeof(struct queue_storage_info_t),
1444                 RTE_CACHE_LINE_SIZE);
1445         if (!qp->rx_vq.q_storage) {
1446                 RTE_LOG(ERR, PMD, "malloc failed for q_storage\n");
1447                 return -1;
1448         }
1449         memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
1450
1451         if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
1452                 RTE_LOG(ERR, PMD, "dpaa2_alloc_dq_storage failed\n");
1453                 return -1;
1454         }
1455
1456         dev->data->queue_pairs[qp_id] = qp;
1457
1458         cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
1459         cfg.user_ctx = (size_t)(&qp->rx_vq);
1460         retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
1461                                       qp_id, &cfg);
1462         return retcode;
1463 }
1464
1465 /** Start queue pair */
1466 static int
1467 dpaa2_sec_queue_pair_start(__rte_unused struct rte_cryptodev *dev,
1468                            __rte_unused uint16_t queue_pair_id)
1469 {
1470         PMD_INIT_FUNC_TRACE();
1471
1472         return 0;
1473 }
1474
1475 /** Stop queue pair */
1476 static int
1477 dpaa2_sec_queue_pair_stop(__rte_unused struct rte_cryptodev *dev,
1478                           __rte_unused uint16_t queue_pair_id)
1479 {
1480         PMD_INIT_FUNC_TRACE();
1481
1482         return 0;
1483 }
1484
1485 /** Return the number of allocated queue pairs */
1486 static uint32_t
1487 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
1488 {
1489         PMD_INIT_FUNC_TRACE();
1490
1491         return dev->data->nb_queue_pairs;
1492 }
1493
1494 /** Returns the size of the aesni gcm session structure */
1495 static unsigned int
1496 dpaa2_sec_session_get_size(struct rte_cryptodev *dev __rte_unused)
1497 {
1498         PMD_INIT_FUNC_TRACE();
1499
1500         return sizeof(dpaa2_sec_session);
1501 }
1502
1503 static int
1504 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
1505                       struct rte_crypto_sym_xform *xform,
1506                       dpaa2_sec_session *session)
1507 {
1508         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1509         struct alginfo cipherdata;
1510         int bufsize, i;
1511         struct ctxt_priv *priv;
1512         struct sec_flow_context *flc;
1513
1514         PMD_INIT_FUNC_TRACE();
1515
1516         /* For SEC CIPHER only one descriptor is required. */
1517         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1518                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1519                         RTE_CACHE_LINE_SIZE);
1520         if (priv == NULL) {
1521                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1522                 return -1;
1523         }
1524
1525         priv->fle_pool = dev_priv->fle_pool;
1526
1527         flc = &priv->flc_desc[0].flc;
1528
1529         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
1530                         RTE_CACHE_LINE_SIZE);
1531         if (session->cipher_key.data == NULL) {
1532                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
1533                 rte_free(priv);
1534                 return -1;
1535         }
1536         session->cipher_key.length = xform->cipher.key.length;
1537
1538         memcpy(session->cipher_key.data, xform->cipher.key.data,
1539                xform->cipher.key.length);
1540         cipherdata.key = (size_t)session->cipher_key.data;
1541         cipherdata.keylen = session->cipher_key.length;
1542         cipherdata.key_enc_flags = 0;
1543         cipherdata.key_type = RTA_DATA_IMM;
1544
1545         /* Set IV parameters */
1546         session->iv.offset = xform->cipher.iv.offset;
1547         session->iv.length = xform->cipher.iv.length;
1548
1549         switch (xform->cipher.algo) {
1550         case RTE_CRYPTO_CIPHER_AES_CBC:
1551                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1552                 cipherdata.algmode = OP_ALG_AAI_CBC;
1553                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1554                 break;
1555         case RTE_CRYPTO_CIPHER_3DES_CBC:
1556                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1557                 cipherdata.algmode = OP_ALG_AAI_CBC;
1558                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1559                 break;
1560         case RTE_CRYPTO_CIPHER_AES_CTR:
1561                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1562                 cipherdata.algmode = OP_ALG_AAI_CTR;
1563                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1564                 break;
1565         case RTE_CRYPTO_CIPHER_3DES_CTR:
1566         case RTE_CRYPTO_CIPHER_AES_ECB:
1567         case RTE_CRYPTO_CIPHER_3DES_ECB:
1568         case RTE_CRYPTO_CIPHER_AES_XTS:
1569         case RTE_CRYPTO_CIPHER_AES_F8:
1570         case RTE_CRYPTO_CIPHER_ARC4:
1571         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1572         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1573         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
1574         case RTE_CRYPTO_CIPHER_NULL:
1575                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
1576                         xform->cipher.algo);
1577                 goto error_out;
1578         default:
1579                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1580                         xform->cipher.algo);
1581                 goto error_out;
1582         }
1583         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1584                                 DIR_ENC : DIR_DEC;
1585
1586         bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
1587                                         &cipherdata, NULL, session->iv.length,
1588                                         session->dir);
1589         if (bufsize < 0) {
1590                 RTE_LOG(ERR, PMD, "Crypto: Descriptor build failed\n");
1591                 goto error_out;
1592         }
1593         flc->dhr = 0;
1594         flc->bpv0 = 0x1;
1595         flc->mode_bits = 0x8000;
1596
1597         flc->word1_sdl = (uint8_t)bufsize;
1598         flc->word2_rflc_31_0 = lower_32_bits(
1599                         (size_t)&(((struct dpaa2_sec_qp *)
1600                         dev->data->queue_pairs[0])->rx_vq));
1601         flc->word3_rflc_63_32 = upper_32_bits(
1602                         (size_t)&(((struct dpaa2_sec_qp *)
1603                         dev->data->queue_pairs[0])->rx_vq));
1604         session->ctxt = priv;
1605
1606         for (i = 0; i < bufsize; i++)
1607                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1608                             i, priv->flc_desc[0].desc[i]);
1609
1610         return 0;
1611
1612 error_out:
1613         rte_free(session->cipher_key.data);
1614         rte_free(priv);
1615         return -1;
1616 }
1617
1618 static int
1619 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
1620                     struct rte_crypto_sym_xform *xform,
1621                     dpaa2_sec_session *session)
1622 {
1623         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1624         struct alginfo authdata;
1625         unsigned int bufsize, i;
1626         struct ctxt_priv *priv;
1627         struct sec_flow_context *flc;
1628
1629         PMD_INIT_FUNC_TRACE();
1630
1631         /* For SEC AUTH three descriptors are required for various stages */
1632         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1633                         sizeof(struct ctxt_priv) + 3 *
1634                         sizeof(struct sec_flc_desc),
1635                         RTE_CACHE_LINE_SIZE);
1636         if (priv == NULL) {
1637                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1638                 return -1;
1639         }
1640
1641         priv->fle_pool = dev_priv->fle_pool;
1642         flc = &priv->flc_desc[DESC_INITFINAL].flc;
1643
1644         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1645                         RTE_CACHE_LINE_SIZE);
1646         if (session->auth_key.data == NULL) {
1647                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1648                 rte_free(priv);
1649                 return -1;
1650         }
1651         session->auth_key.length = xform->auth.key.length;
1652
1653         memcpy(session->auth_key.data, xform->auth.key.data,
1654                xform->auth.key.length);
1655         authdata.key = (size_t)session->auth_key.data;
1656         authdata.keylen = session->auth_key.length;
1657         authdata.key_enc_flags = 0;
1658         authdata.key_type = RTA_DATA_IMM;
1659
1660         session->digest_length = xform->auth.digest_length;
1661
1662         switch (xform->auth.algo) {
1663         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1664                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1665                 authdata.algmode = OP_ALG_AAI_HMAC;
1666                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1667                 break;
1668         case RTE_CRYPTO_AUTH_MD5_HMAC:
1669                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1670                 authdata.algmode = OP_ALG_AAI_HMAC;
1671                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1672                 break;
1673         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1674                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1675                 authdata.algmode = OP_ALG_AAI_HMAC;
1676                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1677                 break;
1678         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1679                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1680                 authdata.algmode = OP_ALG_AAI_HMAC;
1681                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1682                 break;
1683         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1684                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1685                 authdata.algmode = OP_ALG_AAI_HMAC;
1686                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1687                 break;
1688         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1689                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1690                 authdata.algmode = OP_ALG_AAI_HMAC;
1691                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1692                 break;
1693         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1694         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1695         case RTE_CRYPTO_AUTH_NULL:
1696         case RTE_CRYPTO_AUTH_SHA1:
1697         case RTE_CRYPTO_AUTH_SHA256:
1698         case RTE_CRYPTO_AUTH_SHA512:
1699         case RTE_CRYPTO_AUTH_SHA224:
1700         case RTE_CRYPTO_AUTH_SHA384:
1701         case RTE_CRYPTO_AUTH_MD5:
1702         case RTE_CRYPTO_AUTH_AES_GMAC:
1703         case RTE_CRYPTO_AUTH_KASUMI_F9:
1704         case RTE_CRYPTO_AUTH_AES_CMAC:
1705         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1706         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1707                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1708                         xform->auth.algo);
1709                 goto error_out;
1710         default:
1711                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1712                         xform->auth.algo);
1713                 goto error_out;
1714         }
1715         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1716                                 DIR_ENC : DIR_DEC;
1717
1718         bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
1719                                    1, 0, &authdata, !session->dir,
1720                                    session->digest_length);
1721
1722         flc->word1_sdl = (uint8_t)bufsize;
1723         flc->word2_rflc_31_0 = lower_32_bits(
1724                         (size_t)&(((struct dpaa2_sec_qp *)
1725                         dev->data->queue_pairs[0])->rx_vq));
1726         flc->word3_rflc_63_32 = upper_32_bits(
1727                         (size_t)&(((struct dpaa2_sec_qp *)
1728                         dev->data->queue_pairs[0])->rx_vq));
1729         session->ctxt = priv;
1730         for (i = 0; i < bufsize; i++)
1731                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1732                             i, priv->flc_desc[DESC_INITFINAL].desc[i]);
1733
1734
1735         return 0;
1736
1737 error_out:
1738         rte_free(session->auth_key.data);
1739         rte_free(priv);
1740         return -1;
1741 }
1742
1743 static int
1744 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
1745                     struct rte_crypto_sym_xform *xform,
1746                     dpaa2_sec_session *session)
1747 {
1748         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1749         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1750         struct alginfo aeaddata;
1751         unsigned int bufsize, i;
1752         struct ctxt_priv *priv;
1753         struct sec_flow_context *flc;
1754         struct rte_crypto_aead_xform *aead_xform = &xform->aead;
1755         int err;
1756
1757         PMD_INIT_FUNC_TRACE();
1758
1759         /* Set IV parameters */
1760         session->iv.offset = aead_xform->iv.offset;
1761         session->iv.length = aead_xform->iv.length;
1762         session->ctxt_type = DPAA2_SEC_AEAD;
1763
1764         /* For SEC AEAD only one descriptor is required */
1765         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1766                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1767                         RTE_CACHE_LINE_SIZE);
1768         if (priv == NULL) {
1769                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1770                 return -1;
1771         }
1772
1773         priv->fle_pool = dev_priv->fle_pool;
1774         flc = &priv->flc_desc[0].flc;
1775
1776         session->aead_key.data = rte_zmalloc(NULL, aead_xform->key.length,
1777                                                RTE_CACHE_LINE_SIZE);
1778         if (session->aead_key.data == NULL && aead_xform->key.length > 0) {
1779                 RTE_LOG(ERR, PMD, "No Memory for aead key\n");
1780                 rte_free(priv);
1781                 return -1;
1782         }
1783         memcpy(session->aead_key.data, aead_xform->key.data,
1784                aead_xform->key.length);
1785
1786         session->digest_length = aead_xform->digest_length;
1787         session->aead_key.length = aead_xform->key.length;
1788         ctxt->auth_only_len = aead_xform->aad_length;
1789
1790         aeaddata.key = (size_t)session->aead_key.data;
1791         aeaddata.keylen = session->aead_key.length;
1792         aeaddata.key_enc_flags = 0;
1793         aeaddata.key_type = RTA_DATA_IMM;
1794
1795         switch (aead_xform->algo) {
1796         case RTE_CRYPTO_AEAD_AES_GCM:
1797                 aeaddata.algtype = OP_ALG_ALGSEL_AES;
1798                 aeaddata.algmode = OP_ALG_AAI_GCM;
1799                 session->aead_alg = RTE_CRYPTO_AEAD_AES_GCM;
1800                 break;
1801         case RTE_CRYPTO_AEAD_AES_CCM:
1802                 RTE_LOG(ERR, PMD, "Crypto: Unsupported AEAD alg %u\n",
1803                         aead_xform->algo);
1804                 goto error_out;
1805         default:
1806                 RTE_LOG(ERR, PMD, "Crypto: Undefined AEAD specified %u\n",
1807                         aead_xform->algo);
1808                 goto error_out;
1809         }
1810         session->dir = (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1811                                 DIR_ENC : DIR_DEC;
1812
1813         priv->flc_desc[0].desc[0] = aeaddata.keylen;
1814         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1815                                MIN_JOB_DESC_SIZE,
1816                                (unsigned int *)priv->flc_desc[0].desc,
1817                                &priv->flc_desc[0].desc[1], 1);
1818
1819         if (err < 0) {
1820                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths\n");
1821                 goto error_out;
1822         }
1823         if (priv->flc_desc[0].desc[1] & 1) {
1824                 aeaddata.key_type = RTA_DATA_IMM;
1825         } else {
1826                 aeaddata.key = DPAA2_VADDR_TO_IOVA(aeaddata.key);
1827                 aeaddata.key_type = RTA_DATA_PTR;
1828         }
1829         priv->flc_desc[0].desc[0] = 0;
1830         priv->flc_desc[0].desc[1] = 0;
1831
1832         if (session->dir == DIR_ENC)
1833                 bufsize = cnstr_shdsc_gcm_encap(
1834                                 priv->flc_desc[0].desc, 1, 0,
1835                                 &aeaddata, session->iv.length,
1836                                 session->digest_length);
1837         else
1838                 bufsize = cnstr_shdsc_gcm_decap(
1839                                 priv->flc_desc[0].desc, 1, 0,
1840                                 &aeaddata, session->iv.length,
1841                                 session->digest_length);
1842         flc->word1_sdl = (uint8_t)bufsize;
1843         flc->word2_rflc_31_0 = lower_32_bits(
1844                         (size_t)&(((struct dpaa2_sec_qp *)
1845                         dev->data->queue_pairs[0])->rx_vq));
1846         flc->word3_rflc_63_32 = upper_32_bits(
1847                         (size_t)&(((struct dpaa2_sec_qp *)
1848                         dev->data->queue_pairs[0])->rx_vq));
1849         session->ctxt = priv;
1850         for (i = 0; i < bufsize; i++)
1851                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1852                             i, priv->flc_desc[0].desc[i]);
1853
1854         return 0;
1855
1856 error_out:
1857         rte_free(session->aead_key.data);
1858         rte_free(priv);
1859         return -1;
1860 }
1861
1862
1863 static int
1864 dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
1865                     struct rte_crypto_sym_xform *xform,
1866                     dpaa2_sec_session *session)
1867 {
1868         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1869         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1870         struct alginfo authdata, cipherdata;
1871         unsigned int bufsize, i;
1872         struct ctxt_priv *priv;
1873         struct sec_flow_context *flc;
1874         struct rte_crypto_cipher_xform *cipher_xform;
1875         struct rte_crypto_auth_xform *auth_xform;
1876         int err;
1877
1878         PMD_INIT_FUNC_TRACE();
1879
1880         if (session->ext_params.aead_ctxt.auth_cipher_text) {
1881                 cipher_xform = &xform->cipher;
1882                 auth_xform = &xform->next->auth;
1883                 session->ctxt_type =
1884                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1885                         DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1886         } else {
1887                 cipher_xform = &xform->next->cipher;
1888                 auth_xform = &xform->auth;
1889                 session->ctxt_type =
1890                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1891                         DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1892         }
1893
1894         /* Set IV parameters */
1895         session->iv.offset = cipher_xform->iv.offset;
1896         session->iv.length = cipher_xform->iv.length;
1897
1898         /* For SEC AEAD only one descriptor is required */
1899         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1900                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1901                         RTE_CACHE_LINE_SIZE);
1902         if (priv == NULL) {
1903                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1904                 return -1;
1905         }
1906
1907         priv->fle_pool = dev_priv->fle_pool;
1908         flc = &priv->flc_desc[0].flc;
1909
1910         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1911                                                RTE_CACHE_LINE_SIZE);
1912         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1913                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
1914                 rte_free(priv);
1915                 return -1;
1916         }
1917         session->cipher_key.length = cipher_xform->key.length;
1918         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
1919                                              RTE_CACHE_LINE_SIZE);
1920         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
1921                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1922                 rte_free(session->cipher_key.data);
1923                 rte_free(priv);
1924                 return -1;
1925         }
1926         session->auth_key.length = auth_xform->key.length;
1927         memcpy(session->cipher_key.data, cipher_xform->key.data,
1928                cipher_xform->key.length);
1929         memcpy(session->auth_key.data, auth_xform->key.data,
1930                auth_xform->key.length);
1931
1932         authdata.key = (size_t)session->auth_key.data;
1933         authdata.keylen = session->auth_key.length;
1934         authdata.key_enc_flags = 0;
1935         authdata.key_type = RTA_DATA_IMM;
1936
1937         session->digest_length = auth_xform->digest_length;
1938
1939         switch (auth_xform->algo) {
1940         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1941                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1942                 authdata.algmode = OP_ALG_AAI_HMAC;
1943                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1944                 break;
1945         case RTE_CRYPTO_AUTH_MD5_HMAC:
1946                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1947                 authdata.algmode = OP_ALG_AAI_HMAC;
1948                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1949                 break;
1950         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1951                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1952                 authdata.algmode = OP_ALG_AAI_HMAC;
1953                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1954                 break;
1955         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1956                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1957                 authdata.algmode = OP_ALG_AAI_HMAC;
1958                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1959                 break;
1960         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1961                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1962                 authdata.algmode = OP_ALG_AAI_HMAC;
1963                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1964                 break;
1965         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1966                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1967                 authdata.algmode = OP_ALG_AAI_HMAC;
1968                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1969                 break;
1970         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1971         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1972         case RTE_CRYPTO_AUTH_NULL:
1973         case RTE_CRYPTO_AUTH_SHA1:
1974         case RTE_CRYPTO_AUTH_SHA256:
1975         case RTE_CRYPTO_AUTH_SHA512:
1976         case RTE_CRYPTO_AUTH_SHA224:
1977         case RTE_CRYPTO_AUTH_SHA384:
1978         case RTE_CRYPTO_AUTH_MD5:
1979         case RTE_CRYPTO_AUTH_AES_GMAC:
1980         case RTE_CRYPTO_AUTH_KASUMI_F9:
1981         case RTE_CRYPTO_AUTH_AES_CMAC:
1982         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1983         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1984                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1985                         auth_xform->algo);
1986                 goto error_out;
1987         default:
1988                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1989                         auth_xform->algo);
1990                 goto error_out;
1991         }
1992         cipherdata.key = (size_t)session->cipher_key.data;
1993         cipherdata.keylen = session->cipher_key.length;
1994         cipherdata.key_enc_flags = 0;
1995         cipherdata.key_type = RTA_DATA_IMM;
1996
1997         switch (cipher_xform->algo) {
1998         case RTE_CRYPTO_CIPHER_AES_CBC:
1999                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
2000                 cipherdata.algmode = OP_ALG_AAI_CBC;
2001                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
2002                 break;
2003         case RTE_CRYPTO_CIPHER_3DES_CBC:
2004                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
2005                 cipherdata.algmode = OP_ALG_AAI_CBC;
2006                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
2007                 break;
2008         case RTE_CRYPTO_CIPHER_AES_CTR:
2009                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
2010                 cipherdata.algmode = OP_ALG_AAI_CTR;
2011                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
2012                 break;
2013         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
2014         case RTE_CRYPTO_CIPHER_NULL:
2015         case RTE_CRYPTO_CIPHER_3DES_ECB:
2016         case RTE_CRYPTO_CIPHER_AES_ECB:
2017         case RTE_CRYPTO_CIPHER_KASUMI_F8:
2018                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
2019                         cipher_xform->algo);
2020                 goto error_out;
2021         default:
2022                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
2023                         cipher_xform->algo);
2024                 goto error_out;
2025         }
2026         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
2027                                 DIR_ENC : DIR_DEC;
2028
2029         priv->flc_desc[0].desc[0] = cipherdata.keylen;
2030         priv->flc_desc[0].desc[1] = authdata.keylen;
2031         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
2032                                MIN_JOB_DESC_SIZE,
2033                                (unsigned int *)priv->flc_desc[0].desc,
2034                                &priv->flc_desc[0].desc[2], 2);
2035
2036         if (err < 0) {
2037                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths\n");
2038                 goto error_out;
2039         }
2040         if (priv->flc_desc[0].desc[2] & 1) {
2041                 cipherdata.key_type = RTA_DATA_IMM;
2042         } else {
2043                 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
2044                 cipherdata.key_type = RTA_DATA_PTR;
2045         }
2046         if (priv->flc_desc[0].desc[2] & (1 << 1)) {
2047                 authdata.key_type = RTA_DATA_IMM;
2048         } else {
2049                 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
2050                 authdata.key_type = RTA_DATA_PTR;
2051         }
2052         priv->flc_desc[0].desc[0] = 0;
2053         priv->flc_desc[0].desc[1] = 0;
2054         priv->flc_desc[0].desc[2] = 0;
2055
2056         if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
2057                 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
2058                                               0, &cipherdata, &authdata,
2059                                               session->iv.length,
2060                                               ctxt->auth_only_len,
2061                                               session->digest_length,
2062                                               session->dir);
2063         } else {
2064                 RTE_LOG(ERR, PMD, "Hash before cipher not supported\n");
2065                 goto error_out;
2066         }
2067
2068         flc->word1_sdl = (uint8_t)bufsize;
2069         flc->word2_rflc_31_0 = lower_32_bits(
2070                         (size_t)&(((struct dpaa2_sec_qp *)
2071                         dev->data->queue_pairs[0])->rx_vq));
2072         flc->word3_rflc_63_32 = upper_32_bits(
2073                         (size_t)&(((struct dpaa2_sec_qp *)
2074                         dev->data->queue_pairs[0])->rx_vq));
2075         session->ctxt = priv;
2076         for (i = 0; i < bufsize; i++)
2077                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
2078                             i, priv->flc_desc[0].desc[i]);
2079
2080         return 0;
2081
2082 error_out:
2083         rte_free(session->cipher_key.data);
2084         rte_free(session->auth_key.data);
2085         rte_free(priv);
2086         return -1;
2087 }
2088
2089 static int
2090 dpaa2_sec_set_session_parameters(struct rte_cryptodev *dev,
2091                             struct rte_crypto_sym_xform *xform, void *sess)
2092 {
2093         dpaa2_sec_session *session = sess;
2094
2095         PMD_INIT_FUNC_TRACE();
2096
2097         if (unlikely(sess == NULL)) {
2098                 RTE_LOG(ERR, PMD, "invalid session struct\n");
2099                 return -1;
2100         }
2101
2102         /* Default IV length = 0 */
2103         session->iv.length = 0;
2104
2105         /* Cipher Only */
2106         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
2107                 session->ctxt_type = DPAA2_SEC_CIPHER;
2108                 dpaa2_sec_cipher_init(dev, xform, session);
2109
2110         /* Authentication Only */
2111         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
2112                    xform->next == NULL) {
2113                 session->ctxt_type = DPAA2_SEC_AUTH;
2114                 dpaa2_sec_auth_init(dev, xform, session);
2115
2116         /* Cipher then Authenticate */
2117         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
2118                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
2119                 session->ext_params.aead_ctxt.auth_cipher_text = true;
2120                 dpaa2_sec_aead_chain_init(dev, xform, session);
2121
2122         /* Authenticate then Cipher */
2123         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
2124                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
2125                 session->ext_params.aead_ctxt.auth_cipher_text = false;
2126                 dpaa2_sec_aead_chain_init(dev, xform, session);
2127
2128         /* AEAD operation for AES-GCM kind of Algorithms */
2129         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
2130                    xform->next == NULL) {
2131                 dpaa2_sec_aead_init(dev, xform, session);
2132
2133         } else {
2134                 RTE_LOG(ERR, PMD, "Invalid crypto type\n");
2135                 return -EINVAL;
2136         }
2137
2138         return 0;
2139 }
2140
2141 static int
2142 dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
2143                             struct rte_security_session_conf *conf,
2144                             void *sess)
2145 {
2146         struct rte_security_ipsec_xform *ipsec_xform = &conf->ipsec;
2147         struct rte_crypto_auth_xform *auth_xform;
2148         struct rte_crypto_cipher_xform *cipher_xform;
2149         dpaa2_sec_session *session = (dpaa2_sec_session *)sess;
2150         struct ctxt_priv *priv;
2151         struct ipsec_encap_pdb encap_pdb;
2152         struct ipsec_decap_pdb decap_pdb;
2153         struct alginfo authdata, cipherdata;
2154         unsigned int bufsize;
2155         struct sec_flow_context *flc;
2156
2157         PMD_INIT_FUNC_TRACE();
2158
2159         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
2160                 cipher_xform = &conf->crypto_xform->cipher;
2161                 auth_xform = &conf->crypto_xform->next->auth;
2162         } else {
2163                 auth_xform = &conf->crypto_xform->auth;
2164                 cipher_xform = &conf->crypto_xform->next->cipher;
2165         }
2166         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
2167                                 sizeof(struct ctxt_priv) +
2168                                 sizeof(struct sec_flc_desc),
2169                                 RTE_CACHE_LINE_SIZE);
2170
2171         if (priv == NULL) {
2172                 RTE_LOG(ERR, PMD, "\nNo memory for priv CTXT");
2173                 return -ENOMEM;
2174         }
2175
2176         flc = &priv->flc_desc[0].flc;
2177
2178         session->ctxt_type = DPAA2_SEC_IPSEC;
2179         session->cipher_key.data = rte_zmalloc(NULL,
2180                                                cipher_xform->key.length,
2181                                                RTE_CACHE_LINE_SIZE);
2182         if (session->cipher_key.data == NULL &&
2183                         cipher_xform->key.length > 0) {
2184                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
2185                 rte_free(priv);
2186                 return -ENOMEM;
2187         }
2188
2189         session->cipher_key.length = cipher_xform->key.length;
2190         session->auth_key.data = rte_zmalloc(NULL,
2191                                         auth_xform->key.length,
2192                                         RTE_CACHE_LINE_SIZE);
2193         if (session->auth_key.data == NULL &&
2194                         auth_xform->key.length > 0) {
2195                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
2196                 rte_free(session->cipher_key.data);
2197                 rte_free(priv);
2198                 return -ENOMEM;
2199         }
2200         session->auth_key.length = auth_xform->key.length;
2201         memcpy(session->cipher_key.data, cipher_xform->key.data,
2202                         cipher_xform->key.length);
2203         memcpy(session->auth_key.data, auth_xform->key.data,
2204                         auth_xform->key.length);
2205
2206         authdata.key = (size_t)session->auth_key.data;
2207         authdata.keylen = session->auth_key.length;
2208         authdata.key_enc_flags = 0;
2209         authdata.key_type = RTA_DATA_IMM;
2210         switch (auth_xform->algo) {
2211         case RTE_CRYPTO_AUTH_SHA1_HMAC:
2212                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA1_96;
2213                 authdata.algmode = OP_ALG_AAI_HMAC;
2214                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
2215                 break;
2216         case RTE_CRYPTO_AUTH_MD5_HMAC:
2217                 authdata.algtype = OP_PCL_IPSEC_HMAC_MD5_96;
2218                 authdata.algmode = OP_ALG_AAI_HMAC;
2219                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
2220                 break;
2221         case RTE_CRYPTO_AUTH_SHA256_HMAC:
2222                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_256_128;
2223                 authdata.algmode = OP_ALG_AAI_HMAC;
2224                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
2225                 break;
2226         case RTE_CRYPTO_AUTH_SHA384_HMAC:
2227                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_384_192;
2228                 authdata.algmode = OP_ALG_AAI_HMAC;
2229                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
2230                 break;
2231         case RTE_CRYPTO_AUTH_SHA512_HMAC:
2232                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_512_256;
2233                 authdata.algmode = OP_ALG_AAI_HMAC;
2234                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
2235                 break;
2236         case RTE_CRYPTO_AUTH_AES_CMAC:
2237                 authdata.algtype = OP_PCL_IPSEC_AES_CMAC_96;
2238                 session->auth_alg = RTE_CRYPTO_AUTH_AES_CMAC;
2239                 break;
2240         case RTE_CRYPTO_AUTH_NULL:
2241                 authdata.algtype = OP_PCL_IPSEC_HMAC_NULL;
2242                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
2243                 break;
2244         case RTE_CRYPTO_AUTH_SHA224_HMAC:
2245         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
2246         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
2247         case RTE_CRYPTO_AUTH_SHA1:
2248         case RTE_CRYPTO_AUTH_SHA256:
2249         case RTE_CRYPTO_AUTH_SHA512:
2250         case RTE_CRYPTO_AUTH_SHA224:
2251         case RTE_CRYPTO_AUTH_SHA384:
2252         case RTE_CRYPTO_AUTH_MD5:
2253         case RTE_CRYPTO_AUTH_AES_GMAC:
2254         case RTE_CRYPTO_AUTH_KASUMI_F9:
2255         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
2256         case RTE_CRYPTO_AUTH_ZUC_EIA3:
2257                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
2258                         auth_xform->algo);
2259                 goto out;
2260         default:
2261                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
2262                         auth_xform->algo);
2263                 goto out;
2264         }
2265         cipherdata.key = (size_t)session->cipher_key.data;
2266         cipherdata.keylen = session->cipher_key.length;
2267         cipherdata.key_enc_flags = 0;
2268         cipherdata.key_type = RTA_DATA_IMM;
2269
2270         switch (cipher_xform->algo) {
2271         case RTE_CRYPTO_CIPHER_AES_CBC:
2272                 cipherdata.algtype = OP_PCL_IPSEC_AES_CBC;
2273                 cipherdata.algmode = OP_ALG_AAI_CBC;
2274                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
2275                 break;
2276         case RTE_CRYPTO_CIPHER_3DES_CBC:
2277                 cipherdata.algtype = OP_PCL_IPSEC_3DES;
2278                 cipherdata.algmode = OP_ALG_AAI_CBC;
2279                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
2280                 break;
2281         case RTE_CRYPTO_CIPHER_AES_CTR:
2282                 cipherdata.algtype = OP_PCL_IPSEC_AES_CTR;
2283                 cipherdata.algmode = OP_ALG_AAI_CTR;
2284                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
2285                 break;
2286         case RTE_CRYPTO_CIPHER_NULL:
2287                 cipherdata.algtype = OP_PCL_IPSEC_NULL;
2288                 break;
2289         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
2290         case RTE_CRYPTO_CIPHER_3DES_ECB:
2291         case RTE_CRYPTO_CIPHER_AES_ECB:
2292         case RTE_CRYPTO_CIPHER_KASUMI_F8:
2293                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
2294                         cipher_xform->algo);
2295                 goto out;
2296         default:
2297                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
2298                         cipher_xform->algo);
2299                 goto out;
2300         }
2301
2302         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
2303                 struct ip ip4_hdr;
2304
2305                 flc->dhr = SEC_FLC_DHR_OUTBOUND;
2306                 ip4_hdr.ip_v = IPVERSION;
2307                 ip4_hdr.ip_hl = 5;
2308                 ip4_hdr.ip_len = rte_cpu_to_be_16(sizeof(ip4_hdr));
2309                 ip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;
2310                 ip4_hdr.ip_id = 0;
2311                 ip4_hdr.ip_off = 0;
2312                 ip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;
2313                 ip4_hdr.ip_p = 0x32;
2314                 ip4_hdr.ip_sum = 0;
2315                 ip4_hdr.ip_src = ipsec_xform->tunnel.ipv4.src_ip;
2316                 ip4_hdr.ip_dst = ipsec_xform->tunnel.ipv4.dst_ip;
2317                 ip4_hdr.ip_sum = calc_chksum((uint16_t *)(void *)&ip4_hdr,
2318                         sizeof(struct ip));
2319
2320                 /* For Sec Proto only one descriptor is required. */
2321                 memset(&encap_pdb, 0, sizeof(struct ipsec_encap_pdb));
2322                 encap_pdb.options = (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |
2323                         PDBOPTS_ESP_OIHI_PDB_INL |
2324                         PDBOPTS_ESP_IVSRC |
2325                         PDBHMO_ESP_ENCAP_DTTL;
2326                 encap_pdb.spi = ipsec_xform->spi;
2327                 encap_pdb.ip_hdr_len = sizeof(struct ip);
2328
2329                 session->dir = DIR_ENC;
2330                 bufsize = cnstr_shdsc_ipsec_new_encap(priv->flc_desc[0].desc,
2331                                 1, 0, &encap_pdb,
2332                                 (uint8_t *)&ip4_hdr,
2333                                 &cipherdata, &authdata);
2334         } else if (ipsec_xform->direction ==
2335                         RTE_SECURITY_IPSEC_SA_DIR_INGRESS) {
2336                 flc->dhr = SEC_FLC_DHR_INBOUND;
2337                 memset(&decap_pdb, 0, sizeof(struct ipsec_decap_pdb));
2338                 decap_pdb.options = sizeof(struct ip) << 16;
2339                 session->dir = DIR_DEC;
2340                 bufsize = cnstr_shdsc_ipsec_new_decap(priv->flc_desc[0].desc,
2341                                 1, 0, &decap_pdb, &cipherdata, &authdata);
2342         } else
2343                 goto out;
2344         flc->word1_sdl = (uint8_t)bufsize;
2345
2346         /* Enable the stashing control bit */
2347         DPAA2_SET_FLC_RSC(flc);
2348         flc->word2_rflc_31_0 = lower_32_bits(
2349                         (size_t)&(((struct dpaa2_sec_qp *)
2350                         dev->data->queue_pairs[0])->rx_vq) | 0x14);
2351         flc->word3_rflc_63_32 = upper_32_bits(
2352                         (size_t)&(((struct dpaa2_sec_qp *)
2353                         dev->data->queue_pairs[0])->rx_vq));
2354
2355         /* Set EWS bit i.e. enable write-safe */
2356         DPAA2_SET_FLC_EWS(flc);
2357         /* Set BS = 1 i.e reuse input buffers as output buffers */
2358         DPAA2_SET_FLC_REUSE_BS(flc);
2359         /* Set FF = 10; reuse input buffers if they provide sufficient space */
2360         DPAA2_SET_FLC_REUSE_FF(flc);
2361
2362         session->ctxt = priv;
2363
2364         return 0;
2365 out:
2366         rte_free(session->auth_key.data);
2367         rte_free(session->cipher_key.data);
2368         rte_free(priv);
2369         return -1;
2370 }
2371
2372 static int
2373 dpaa2_sec_security_session_create(void *dev,
2374                                   struct rte_security_session_conf *conf,
2375                                   struct rte_security_session *sess,
2376                                   struct rte_mempool *mempool)
2377 {
2378         void *sess_private_data;
2379         struct rte_cryptodev *cdev = (struct rte_cryptodev *)dev;
2380         int ret;
2381
2382         if (rte_mempool_get(mempool, &sess_private_data)) {
2383                 CDEV_LOG_ERR(
2384                         "Couldn't get object from session mempool");
2385                 return -ENOMEM;
2386         }
2387
2388         switch (conf->protocol) {
2389         case RTE_SECURITY_PROTOCOL_IPSEC:
2390                 ret = dpaa2_sec_set_ipsec_session(cdev, conf,
2391                                 sess_private_data);
2392                 break;
2393         case RTE_SECURITY_PROTOCOL_MACSEC:
2394                 return -ENOTSUP;
2395         default:
2396                 return -EINVAL;
2397         }
2398         if (ret != 0) {
2399                 PMD_DRV_LOG(ERR,
2400                         "DPAA2 PMD: failed to configure session parameters");
2401
2402                 /* Return session to mempool */
2403                 rte_mempool_put(mempool, sess_private_data);
2404                 return ret;
2405         }
2406
2407         set_sec_session_private_data(sess, sess_private_data);
2408
2409         return ret;
2410 }
2411
2412 /** Clear the memory of session so it doesn't leave key material behind */
2413 static int
2414 dpaa2_sec_security_session_destroy(void *dev __rte_unused,
2415                 struct rte_security_session *sess)
2416 {
2417         PMD_INIT_FUNC_TRACE();
2418         void *sess_priv = get_sec_session_private_data(sess);
2419
2420         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
2421
2422         if (sess_priv) {
2423                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
2424
2425                 rte_free(s->ctxt);
2426                 rte_free(s->cipher_key.data);
2427                 rte_free(s->auth_key.data);
2428                 memset(sess, 0, sizeof(dpaa2_sec_session));
2429                 set_sec_session_private_data(sess, NULL);
2430                 rte_mempool_put(sess_mp, sess_priv);
2431         }
2432         return 0;
2433 }
2434
2435 static int
2436 dpaa2_sec_session_configure(struct rte_cryptodev *dev,
2437                 struct rte_crypto_sym_xform *xform,
2438                 struct rte_cryptodev_sym_session *sess,
2439                 struct rte_mempool *mempool)
2440 {
2441         void *sess_private_data;
2442         int ret;
2443
2444         if (rte_mempool_get(mempool, &sess_private_data)) {
2445                 CDEV_LOG_ERR(
2446                         "Couldn't get object from session mempool");
2447                 return -ENOMEM;
2448         }
2449
2450         ret = dpaa2_sec_set_session_parameters(dev, xform, sess_private_data);
2451         if (ret != 0) {
2452                 PMD_DRV_LOG(ERR, "DPAA2 PMD: failed to configure "
2453                                 "session parameters");
2454
2455                 /* Return session to mempool */
2456                 rte_mempool_put(mempool, sess_private_data);
2457                 return ret;
2458         }
2459
2460         set_session_private_data(sess, dev->driver_id,
2461                 sess_private_data);
2462
2463         return 0;
2464 }
2465
2466 /** Clear the memory of session so it doesn't leave key material behind */
2467 static void
2468 dpaa2_sec_session_clear(struct rte_cryptodev *dev,
2469                 struct rte_cryptodev_sym_session *sess)
2470 {
2471         PMD_INIT_FUNC_TRACE();
2472         uint8_t index = dev->driver_id;
2473         void *sess_priv = get_session_private_data(sess, index);
2474         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
2475
2476         if (sess_priv) {
2477                 rte_free(s->ctxt);
2478                 rte_free(s->cipher_key.data);
2479                 rte_free(s->auth_key.data);
2480                 memset(sess, 0, sizeof(dpaa2_sec_session));
2481                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
2482                 set_session_private_data(sess, index, NULL);
2483                 rte_mempool_put(sess_mp, sess_priv);
2484         }
2485 }
2486
2487 static int
2488 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
2489                         struct rte_cryptodev_config *config __rte_unused)
2490 {
2491         PMD_INIT_FUNC_TRACE();
2492
2493         return 0;
2494 }
2495
2496 static int
2497 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
2498 {
2499         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2500         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2501         struct dpseci_attr attr;
2502         struct dpaa2_queue *dpaa2_q;
2503         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2504                                         dev->data->queue_pairs;
2505         struct dpseci_rx_queue_attr rx_attr;
2506         struct dpseci_tx_queue_attr tx_attr;
2507         int ret, i;
2508
2509         PMD_INIT_FUNC_TRACE();
2510
2511         memset(&attr, 0, sizeof(struct dpseci_attr));
2512
2513         ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
2514         if (ret) {
2515                 PMD_INIT_LOG(ERR, "DPSECI with HW_ID = %d ENABLE FAILED\n",
2516                              priv->hw_id);
2517                 goto get_attr_failure;
2518         }
2519         ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
2520         if (ret) {
2521                 PMD_INIT_LOG(ERR,
2522                              "DPSEC ATTRIBUTE READ FAILED, disabling DPSEC\n");
2523                 goto get_attr_failure;
2524         }
2525         for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
2526                 dpaa2_q = &qp[i]->rx_vq;
2527                 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
2528                                     &rx_attr);
2529                 dpaa2_q->fqid = rx_attr.fqid;
2530                 PMD_INIT_LOG(DEBUG, "rx_fqid: %d", dpaa2_q->fqid);
2531         }
2532         for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
2533                 dpaa2_q = &qp[i]->tx_vq;
2534                 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
2535                                     &tx_attr);
2536                 dpaa2_q->fqid = tx_attr.fqid;
2537                 PMD_INIT_LOG(DEBUG, "tx_fqid: %d", dpaa2_q->fqid);
2538         }
2539
2540         return 0;
2541 get_attr_failure:
2542         dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
2543         return -1;
2544 }
2545
2546 static void
2547 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
2548 {
2549         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2550         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2551         int ret;
2552
2553         PMD_INIT_FUNC_TRACE();
2554
2555         ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
2556         if (ret) {
2557                 PMD_INIT_LOG(ERR, "Failure in disabling dpseci %d device",
2558                              priv->hw_id);
2559                 return;
2560         }
2561
2562         ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
2563         if (ret < 0) {
2564                 PMD_INIT_LOG(ERR, "SEC Device cannot be reset:Error = %0x\n",
2565                              ret);
2566                 return;
2567         }
2568 }
2569
2570 static int
2571 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
2572 {
2573         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2574         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2575         int ret;
2576
2577         PMD_INIT_FUNC_TRACE();
2578
2579         /* Function is reverse of dpaa2_sec_dev_init.
2580          * It does the following:
2581          * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
2582          * 2. Close the DPSECI device
2583          * 3. Free the allocated resources.
2584          */
2585
2586         /*Close the device at underlying layer*/
2587         ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
2588         if (ret) {
2589                 PMD_INIT_LOG(ERR, "Failure closing dpseci device with"
2590                              " error code %d\n", ret);
2591                 return -1;
2592         }
2593
2594         /*Free the allocated memory for ethernet private data and dpseci*/
2595         priv->hw = NULL;
2596         rte_free(dpseci);
2597
2598         return 0;
2599 }
2600
2601 static void
2602 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
2603                         struct rte_cryptodev_info *info)
2604 {
2605         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
2606
2607         PMD_INIT_FUNC_TRACE();
2608         if (info != NULL) {
2609                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
2610                 info->feature_flags = dev->feature_flags;
2611                 info->capabilities = dpaa2_sec_capabilities;
2612                 info->sym.max_nb_sessions = internals->max_nb_sessions;
2613                 info->driver_id = cryptodev_driver_id;
2614         }
2615 }
2616
2617 static
2618 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
2619                          struct rte_cryptodev_stats *stats)
2620 {
2621         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2622         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2623         struct dpseci_sec_counters counters = {0};
2624         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2625                                         dev->data->queue_pairs;
2626         int ret, i;
2627
2628         PMD_INIT_FUNC_TRACE();
2629         if (stats == NULL) {
2630                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
2631                 return;
2632         }
2633         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
2634                 if (qp[i] == NULL) {
2635                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
2636                         continue;
2637                 }
2638
2639                 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
2640                 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
2641                 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
2642                 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
2643         }
2644
2645         ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
2646                                       &counters);
2647         if (ret) {
2648                 PMD_DRV_LOG(ERR, "dpseci_get_sec_counters failed\n");
2649         } else {
2650                 PMD_DRV_LOG(INFO, "dpseci hw stats:"
2651                         "\n\tNumber of Requests Dequeued = %" PRIu64
2652                         "\n\tNumber of Outbound Encrypt Requests = %" PRIu64
2653                         "\n\tNumber of Inbound Decrypt Requests = %" PRIu64
2654                         "\n\tNumber of Outbound Bytes Encrypted = %" PRIu64
2655                         "\n\tNumber of Outbound Bytes Protected = %" PRIu64
2656                         "\n\tNumber of Inbound Bytes Decrypted = %" PRIu64
2657                         "\n\tNumber of Inbound Bytes Validated = %" PRIu64,
2658                             counters.dequeued_requests,
2659                             counters.ob_enc_requests,
2660                             counters.ib_dec_requests,
2661                             counters.ob_enc_bytes,
2662                             counters.ob_prot_bytes,
2663                             counters.ib_dec_bytes,
2664                             counters.ib_valid_bytes);
2665         }
2666 }
2667
2668 static
2669 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
2670 {
2671         int i;
2672         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2673                                    (dev->data->queue_pairs);
2674
2675         PMD_INIT_FUNC_TRACE();
2676
2677         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
2678                 if (qp[i] == NULL) {
2679                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
2680                         continue;
2681                 }
2682                 qp[i]->tx_vq.rx_pkts = 0;
2683                 qp[i]->tx_vq.tx_pkts = 0;
2684                 qp[i]->tx_vq.err_pkts = 0;
2685                 qp[i]->rx_vq.rx_pkts = 0;
2686                 qp[i]->rx_vq.tx_pkts = 0;
2687                 qp[i]->rx_vq.err_pkts = 0;
2688         }
2689 }
2690
2691 static struct rte_cryptodev_ops crypto_ops = {
2692         .dev_configure        = dpaa2_sec_dev_configure,
2693         .dev_start            = dpaa2_sec_dev_start,
2694         .dev_stop             = dpaa2_sec_dev_stop,
2695         .dev_close            = dpaa2_sec_dev_close,
2696         .dev_infos_get        = dpaa2_sec_dev_infos_get,
2697         .stats_get            = dpaa2_sec_stats_get,
2698         .stats_reset          = dpaa2_sec_stats_reset,
2699         .queue_pair_setup     = dpaa2_sec_queue_pair_setup,
2700         .queue_pair_release   = dpaa2_sec_queue_pair_release,
2701         .queue_pair_start     = dpaa2_sec_queue_pair_start,
2702         .queue_pair_stop      = dpaa2_sec_queue_pair_stop,
2703         .queue_pair_count     = dpaa2_sec_queue_pair_count,
2704         .session_get_size     = dpaa2_sec_session_get_size,
2705         .session_configure    = dpaa2_sec_session_configure,
2706         .session_clear        = dpaa2_sec_session_clear,
2707 };
2708
2709 static const struct rte_security_capability *
2710 dpaa2_sec_capabilities_get(void *device __rte_unused)
2711 {
2712         return dpaa2_sec_security_cap;
2713 }
2714
2715 struct rte_security_ops dpaa2_sec_security_ops = {
2716         .session_create = dpaa2_sec_security_session_create,
2717         .session_update = NULL,
2718         .session_stats_get = NULL,
2719         .session_destroy = dpaa2_sec_security_session_destroy,
2720         .set_pkt_metadata = NULL,
2721         .capabilities_get = dpaa2_sec_capabilities_get
2722 };
2723
2724 static int
2725 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
2726 {
2727         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
2728
2729         rte_free(dev->security_ctx);
2730
2731         rte_mempool_free(internals->fle_pool);
2732
2733         PMD_INIT_LOG(INFO, "Closing DPAA2_SEC device %s on numa socket %u\n",
2734                      dev->data->name, rte_socket_id());
2735
2736         return 0;
2737 }
2738
2739 static int
2740 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
2741 {
2742         struct dpaa2_sec_dev_private *internals;
2743         struct rte_device *dev = cryptodev->device;
2744         struct rte_dpaa2_device *dpaa2_dev;
2745         struct rte_security_ctx *security_instance;
2746         struct fsl_mc_io *dpseci;
2747         uint16_t token;
2748         struct dpseci_attr attr;
2749         int retcode, hw_id;
2750         char str[20];
2751
2752         PMD_INIT_FUNC_TRACE();
2753         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2754         if (dpaa2_dev == NULL) {
2755                 PMD_INIT_LOG(ERR, "dpaa2_device not found\n");
2756                 return -1;
2757         }
2758         hw_id = dpaa2_dev->object_id;
2759
2760         cryptodev->driver_id = cryptodev_driver_id;
2761         cryptodev->dev_ops = &crypto_ops;
2762
2763         cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
2764         cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
2765         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
2766                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
2767                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
2768                         RTE_CRYPTODEV_FF_SECURITY |
2769                         RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;
2770
2771         internals = cryptodev->data->dev_private;
2772         internals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;
2773
2774         /*
2775          * For secondary processes, we don't initialise any further as primary
2776          * has already done this work. Only check we don't need a different
2777          * RX function
2778          */
2779         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2780                 PMD_INIT_LOG(DEBUG, "Device already init by primary process");
2781                 return 0;
2782         }
2783
2784         /* Initialize security_ctx only for primary process*/
2785         security_instance = rte_malloc("rte_security_instances_ops",
2786                                 sizeof(struct rte_security_ctx), 0);
2787         if (security_instance == NULL)
2788                 return -ENOMEM;
2789         security_instance->device = (void *)cryptodev;
2790         security_instance->ops = &dpaa2_sec_security_ops;
2791         security_instance->sess_cnt = 0;
2792         cryptodev->security_ctx = security_instance;
2793
2794         /*Open the rte device via MC and save the handle for further use*/
2795         dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
2796                                 sizeof(struct fsl_mc_io), 0);
2797         if (!dpseci) {
2798                 PMD_INIT_LOG(ERR,
2799                              "Error in allocating the memory for dpsec object");
2800                 return -1;
2801         }
2802         dpseci->regs = rte_mcp_ptr_list[0];
2803
2804         retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
2805         if (retcode != 0) {
2806                 PMD_INIT_LOG(ERR, "Cannot open the dpsec device: Error = %x",
2807                              retcode);
2808                 goto init_error;
2809         }
2810         retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
2811         if (retcode != 0) {
2812                 PMD_INIT_LOG(ERR,
2813                              "Cannot get dpsec device attributed: Error = %x",
2814                              retcode);
2815                 goto init_error;
2816         }
2817         sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
2818
2819         internals->max_nb_queue_pairs = attr.num_tx_queues;
2820         cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
2821         internals->hw = dpseci;
2822         internals->token = token;
2823
2824         sprintf(str, "fle_pool_%d", cryptodev->data->dev_id);
2825         internals->fle_pool = rte_mempool_create((const char *)str,
2826                         FLE_POOL_NUM_BUFS,
2827                         FLE_POOL_BUF_SIZE,
2828                         FLE_POOL_CACHE_SIZE, 0,
2829                         NULL, NULL, NULL, NULL,
2830                         SOCKET_ID_ANY, 0);
2831         if (!internals->fle_pool) {
2832                 RTE_LOG(ERR, PMD, "%s create failed\n", str);
2833                 goto init_error;
2834         }
2835
2836         PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
2837         return 0;
2838
2839 init_error:
2840         PMD_INIT_LOG(ERR, "driver %s: create failed\n", cryptodev->data->name);
2841
2842         /* dpaa2_sec_uninit(crypto_dev_name); */
2843         return -EFAULT;
2844 }
2845
2846 static int
2847 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv,
2848                           struct rte_dpaa2_device *dpaa2_dev)
2849 {
2850         struct rte_cryptodev *cryptodev;
2851         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
2852
2853         int retval;
2854
2855         sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
2856
2857         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
2858         if (cryptodev == NULL)
2859                 return -ENOMEM;
2860
2861         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2862                 cryptodev->data->dev_private = rte_zmalloc_socket(
2863                                         "cryptodev private structure",
2864                                         sizeof(struct dpaa2_sec_dev_private),
2865                                         RTE_CACHE_LINE_SIZE,
2866                                         rte_socket_id());
2867
2868                 if (cryptodev->data->dev_private == NULL)
2869                         rte_panic("Cannot allocate memzone for private "
2870                                         "device data");
2871         }
2872
2873         dpaa2_dev->cryptodev = cryptodev;
2874         cryptodev->device = &dpaa2_dev->device;
2875         cryptodev->device->driver = &dpaa2_drv->driver;
2876
2877         /* init user callbacks */
2878         TAILQ_INIT(&(cryptodev->link_intr_cbs));
2879
2880         /* Invoke PMD device initialization function */
2881         retval = dpaa2_sec_dev_init(cryptodev);
2882         if (retval == 0)
2883                 return 0;
2884
2885         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2886                 rte_free(cryptodev->data->dev_private);
2887
2888         cryptodev->attached = RTE_CRYPTODEV_DETACHED;
2889
2890         return -ENXIO;
2891 }
2892
2893 static int
2894 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
2895 {
2896         struct rte_cryptodev *cryptodev;
2897         int ret;
2898
2899         cryptodev = dpaa2_dev->cryptodev;
2900         if (cryptodev == NULL)
2901                 return -ENODEV;
2902
2903         ret = dpaa2_sec_uninit(cryptodev);
2904         if (ret)
2905                 return ret;
2906
2907         return rte_cryptodev_pmd_destroy(cryptodev);
2908 }
2909
2910 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
2911         .drv_flags = RTE_DPAA2_DRV_IOVA_AS_VA,
2912         .drv_type = DPAA2_CRYPTO,
2913         .driver = {
2914                 .name = "DPAA2 SEC PMD"
2915         },
2916         .probe = cryptodev_dpaa2_sec_probe,
2917         .remove = cryptodev_dpaa2_sec_remove,
2918 };
2919
2920 static struct cryptodev_driver dpaa2_sec_crypto_drv;
2921
2922 RTE_PMD_REGISTER_DPAA2(CRYPTODEV_NAME_DPAA2_SEC_PMD, rte_dpaa2_sec_driver);
2923 RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa2_sec_crypto_drv, rte_dpaa2_sec_driver,
2924                 cryptodev_driver_id);