crypto/dpaa2_sec: support atomic queues
[dpdk.git] / drivers / crypto / dpaa2_sec / dpaa2_sec_dpseci.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
4  *   Copyright 2016-2018 NXP
5  *
6  */
7
8 #include <time.h>
9 #include <net/if.h>
10
11 #include <rte_mbuf.h>
12 #include <rte_cryptodev.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
18 #include <rte_dev.h>
19 #include <rte_cryptodev_pmd.h>
20 #include <rte_common.h>
21 #include <rte_fslmc.h>
22 #include <fslmc_vfio.h>
23 #include <dpaa2_hw_pvt.h>
24 #include <dpaa2_hw_dpio.h>
25 #include <dpaa2_hw_mempool.h>
26 #include <fsl_dpopr.h>
27 #include <fsl_dpseci.h>
28 #include <fsl_mc_sys.h>
29
30 #include "dpaa2_sec_priv.h"
31 #include "dpaa2_sec_event.h"
32 #include "dpaa2_sec_logs.h"
33
34 /* Required types */
35 typedef uint64_t        dma_addr_t;
36
37 /* RTA header files */
38 #include <hw/desc/ipsec.h>
39 #include <hw/desc/algo.h>
40
41 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
42  * a pointer to the shared descriptor
43  */
44 #define MIN_JOB_DESC_SIZE       (CAAM_CMD_SZ + CAAM_PTR_SZ)
45 #define FSL_VENDOR_ID           0x1957
46 #define FSL_DEVICE_ID           0x410
47 #define FSL_SUBSYSTEM_SEC       1
48 #define FSL_MC_DPSECI_DEVID     3
49
50 #define NO_PREFETCH 0
51 /* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
52 #define FLE_POOL_NUM_BUFS       32000
53 #define FLE_POOL_BUF_SIZE       256
54 #define FLE_POOL_CACHE_SIZE     512
55 #define FLE_SG_MEM_SIZE         2048
56 #define SEC_FLC_DHR_OUTBOUND    -114
57 #define SEC_FLC_DHR_INBOUND     0
58
59 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
60
61 static uint8_t cryptodev_driver_id;
62
63 int dpaa2_logtype_sec;
64
65 static inline int
66 build_proto_compound_fd(dpaa2_sec_session *sess,
67                struct rte_crypto_op *op,
68                struct qbman_fd *fd, uint16_t bpid)
69 {
70         struct rte_crypto_sym_op *sym_op = op->sym;
71         struct ctxt_priv *priv = sess->ctxt;
72         struct qbman_fle *fle, *ip_fle, *op_fle;
73         struct sec_flow_context *flc;
74         struct rte_mbuf *src_mbuf = sym_op->m_src;
75         struct rte_mbuf *dst_mbuf = sym_op->m_dst;
76         int retval;
77
78         /* Save the shared descriptor */
79         flc = &priv->flc_desc[0].flc;
80
81         /* we are using the first FLE entry to store Mbuf */
82         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
83         if (retval) {
84                 DPAA2_SEC_ERR("Memory alloc failed");
85                 return -1;
86         }
87         memset(fle, 0, FLE_POOL_BUF_SIZE);
88         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
89         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
90
91         op_fle = fle + 1;
92         ip_fle = fle + 2;
93
94         if (likely(bpid < MAX_BPID)) {
95                 DPAA2_SET_FD_BPID(fd, bpid);
96                 DPAA2_SET_FLE_BPID(op_fle, bpid);
97                 DPAA2_SET_FLE_BPID(ip_fle, bpid);
98         } else {
99                 DPAA2_SET_FD_IVP(fd);
100                 DPAA2_SET_FLE_IVP(op_fle);
101                 DPAA2_SET_FLE_IVP(ip_fle);
102         }
103
104         /* Configure FD as a FRAME LIST */
105         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
106         DPAA2_SET_FD_COMPOUND_FMT(fd);
107         DPAA2_SET_FD_FLC(fd, (ptrdiff_t)flc);
108
109         /* Configure Output FLE with dst mbuf data  */
110         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_MBUF_VADDR_TO_IOVA(dst_mbuf));
111         DPAA2_SET_FLE_OFFSET(op_fle, dst_mbuf->data_off);
112         DPAA2_SET_FLE_LEN(op_fle, dst_mbuf->buf_len);
113
114         /* Configure Input FLE with src mbuf data */
115         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_MBUF_VADDR_TO_IOVA(src_mbuf));
116         DPAA2_SET_FLE_OFFSET(ip_fle, src_mbuf->data_off);
117         DPAA2_SET_FLE_LEN(ip_fle, src_mbuf->pkt_len);
118
119         DPAA2_SET_FD_LEN(fd, ip_fle->length);
120         DPAA2_SET_FLE_FIN(ip_fle);
121
122         return 0;
123
124 }
125
126 static inline int
127 build_proto_fd(dpaa2_sec_session *sess,
128                struct rte_crypto_op *op,
129                struct qbman_fd *fd, uint16_t bpid)
130 {
131         struct rte_crypto_sym_op *sym_op = op->sym;
132         if (sym_op->m_dst)
133                 return build_proto_compound_fd(sess, op, fd, bpid);
134
135         struct ctxt_priv *priv = sess->ctxt;
136         struct sec_flow_context *flc;
137         struct rte_mbuf *mbuf = sym_op->m_src;
138
139         if (likely(bpid < MAX_BPID))
140                 DPAA2_SET_FD_BPID(fd, bpid);
141         else
142                 DPAA2_SET_FD_IVP(fd);
143
144         /* Save the shared descriptor */
145         flc = &priv->flc_desc[0].flc;
146
147         DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
148         DPAA2_SET_FD_OFFSET(fd, sym_op->m_src->data_off);
149         DPAA2_SET_FD_LEN(fd, sym_op->m_src->pkt_len);
150         DPAA2_SET_FD_FLC(fd, (ptrdiff_t)flc);
151
152         /* save physical address of mbuf */
153         op->sym->aead.digest.phys_addr = mbuf->buf_iova;
154         mbuf->buf_iova = (size_t)op;
155
156         return 0;
157 }
158
159 static inline int
160 build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
161                  struct rte_crypto_op *op,
162                  struct qbman_fd *fd, __rte_unused uint16_t bpid)
163 {
164         struct rte_crypto_sym_op *sym_op = op->sym;
165         struct ctxt_priv *priv = sess->ctxt;
166         struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
167         struct sec_flow_context *flc;
168         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
169         int icv_len = sess->digest_length;
170         uint8_t *old_icv;
171         struct rte_mbuf *mbuf;
172         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
173                         sess->iv.offset);
174
175         PMD_INIT_FUNC_TRACE();
176
177         if (sym_op->m_dst)
178                 mbuf = sym_op->m_dst;
179         else
180                 mbuf = sym_op->m_src;
181
182         /* first FLE entry used to store mbuf and session ctxt */
183         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
184                         RTE_CACHE_LINE_SIZE);
185         if (unlikely(!fle)) {
186                 DPAA2_SEC_ERR("GCM SG: Memory alloc failed for SGE");
187                 return -1;
188         }
189         memset(fle, 0, FLE_SG_MEM_SIZE);
190         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
191         DPAA2_FLE_SAVE_CTXT(fle, (size_t)priv);
192
193         op_fle = fle + 1;
194         ip_fle = fle + 2;
195         sge = fle + 3;
196
197         /* Save the shared descriptor */
198         flc = &priv->flc_desc[0].flc;
199
200         /* Configure FD as a FRAME LIST */
201         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
202         DPAA2_SET_FD_COMPOUND_FMT(fd);
203         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
204
205         DPAA2_SEC_DP_DEBUG("GCM SG: auth_off: 0x%x/length %d, digest-len=%d\n"
206                    "iv-len=%d data_off: 0x%x\n",
207                    sym_op->aead.data.offset,
208                    sym_op->aead.data.length,
209                    sess->digest_length,
210                    sess->iv.length,
211                    sym_op->m_src->data_off);
212
213         /* Configure Output FLE with Scatter/Gather Entry */
214         DPAA2_SET_FLE_SG_EXT(op_fle);
215         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
216
217         if (auth_only_len)
218                 DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
219
220         op_fle->length = (sess->dir == DIR_ENC) ?
221                         (sym_op->aead.data.length + icv_len + auth_only_len) :
222                         sym_op->aead.data.length + auth_only_len;
223
224         /* Configure Output SGE for Encap/Decap */
225         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
226         DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset -
227                                                                 auth_only_len);
228         sge->length = mbuf->data_len - sym_op->aead.data.offset + auth_only_len;
229
230         mbuf = mbuf->next;
231         /* o/p segs */
232         while (mbuf) {
233                 sge++;
234                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
235                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
236                 sge->length = mbuf->data_len;
237                 mbuf = mbuf->next;
238         }
239         sge->length -= icv_len;
240
241         if (sess->dir == DIR_ENC) {
242                 sge++;
243                 DPAA2_SET_FLE_ADDR(sge,
244                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
245                 sge->length = icv_len;
246         }
247         DPAA2_SET_FLE_FIN(sge);
248
249         sge++;
250         mbuf = sym_op->m_src;
251
252         /* Configure Input FLE with Scatter/Gather Entry */
253         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
254         DPAA2_SET_FLE_SG_EXT(ip_fle);
255         DPAA2_SET_FLE_FIN(ip_fle);
256         ip_fle->length = (sess->dir == DIR_ENC) ?
257                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
258                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
259                  icv_len);
260
261         /* Configure Input SGE for Encap/Decap */
262         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
263         sge->length = sess->iv.length;
264
265         sge++;
266         if (auth_only_len) {
267                 DPAA2_SET_FLE_ADDR(sge,
268                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
269                 sge->length = auth_only_len;
270                 sge++;
271         }
272
273         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
274         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
275                                 mbuf->data_off);
276         sge->length = mbuf->data_len - sym_op->aead.data.offset;
277
278         mbuf = mbuf->next;
279         /* i/p segs */
280         while (mbuf) {
281                 sge++;
282                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
283                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
284                 sge->length = mbuf->data_len;
285                 mbuf = mbuf->next;
286         }
287
288         if (sess->dir == DIR_DEC) {
289                 sge++;
290                 old_icv = (uint8_t *)(sge + 1);
291                 memcpy(old_icv, sym_op->aead.digest.data, icv_len);
292                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
293                 sge->length = icv_len;
294         }
295
296         DPAA2_SET_FLE_FIN(sge);
297         if (auth_only_len) {
298                 DPAA2_SET_FLE_INTERNAL_JD(ip_fle, auth_only_len);
299                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
300         }
301         DPAA2_SET_FD_LEN(fd, ip_fle->length);
302
303         return 0;
304 }
305
306 static inline int
307 build_authenc_gcm_fd(dpaa2_sec_session *sess,
308                      struct rte_crypto_op *op,
309                      struct qbman_fd *fd, uint16_t bpid)
310 {
311         struct rte_crypto_sym_op *sym_op = op->sym;
312         struct ctxt_priv *priv = sess->ctxt;
313         struct qbman_fle *fle, *sge;
314         struct sec_flow_context *flc;
315         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
316         int icv_len = sess->digest_length, retval;
317         uint8_t *old_icv;
318         struct rte_mbuf *dst;
319         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
320                         sess->iv.offset);
321
322         PMD_INIT_FUNC_TRACE();
323
324         if (sym_op->m_dst)
325                 dst = sym_op->m_dst;
326         else
327                 dst = sym_op->m_src;
328
329         /* TODO we are using the first FLE entry to store Mbuf and session ctxt.
330          * Currently we donot know which FLE has the mbuf stored.
331          * So while retreiving we can go back 1 FLE from the FD -ADDR
332          * to get the MBUF Addr from the previous FLE.
333          * We can have a better approach to use the inline Mbuf
334          */
335         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
336         if (retval) {
337                 DPAA2_SEC_ERR("GCM: Memory alloc failed for SGE");
338                 return -1;
339         }
340         memset(fle, 0, FLE_POOL_BUF_SIZE);
341         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
342         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
343         fle = fle + 1;
344         sge = fle + 2;
345         if (likely(bpid < MAX_BPID)) {
346                 DPAA2_SET_FD_BPID(fd, bpid);
347                 DPAA2_SET_FLE_BPID(fle, bpid);
348                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
349                 DPAA2_SET_FLE_BPID(sge, bpid);
350                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
351                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
352                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
353         } else {
354                 DPAA2_SET_FD_IVP(fd);
355                 DPAA2_SET_FLE_IVP(fle);
356                 DPAA2_SET_FLE_IVP((fle + 1));
357                 DPAA2_SET_FLE_IVP(sge);
358                 DPAA2_SET_FLE_IVP((sge + 1));
359                 DPAA2_SET_FLE_IVP((sge + 2));
360                 DPAA2_SET_FLE_IVP((sge + 3));
361         }
362
363         /* Save the shared descriptor */
364         flc = &priv->flc_desc[0].flc;
365         /* Configure FD as a FRAME LIST */
366         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
367         DPAA2_SET_FD_COMPOUND_FMT(fd);
368         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
369
370         DPAA2_SEC_DP_DEBUG("GCM: auth_off: 0x%x/length %d, digest-len=%d\n"
371                    "iv-len=%d data_off: 0x%x\n",
372                    sym_op->aead.data.offset,
373                    sym_op->aead.data.length,
374                    sess->digest_length,
375                    sess->iv.length,
376                    sym_op->m_src->data_off);
377
378         /* Configure Output FLE with Scatter/Gather Entry */
379         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
380         if (auth_only_len)
381                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
382         fle->length = (sess->dir == DIR_ENC) ?
383                         (sym_op->aead.data.length + icv_len + auth_only_len) :
384                         sym_op->aead.data.length + auth_only_len;
385
386         DPAA2_SET_FLE_SG_EXT(fle);
387
388         /* Configure Output SGE for Encap/Decap */
389         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
390         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
391                                 dst->data_off - auth_only_len);
392         sge->length = sym_op->aead.data.length + auth_only_len;
393
394         if (sess->dir == DIR_ENC) {
395                 sge++;
396                 DPAA2_SET_FLE_ADDR(sge,
397                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
398                 sge->length = sess->digest_length;
399                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
400                                         sess->iv.length + auth_only_len));
401         }
402         DPAA2_SET_FLE_FIN(sge);
403
404         sge++;
405         fle++;
406
407         /* Configure Input FLE with Scatter/Gather Entry */
408         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
409         DPAA2_SET_FLE_SG_EXT(fle);
410         DPAA2_SET_FLE_FIN(fle);
411         fle->length = (sess->dir == DIR_ENC) ?
412                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
413                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
414                  sess->digest_length);
415
416         /* Configure Input SGE for Encap/Decap */
417         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
418         sge->length = sess->iv.length;
419         sge++;
420         if (auth_only_len) {
421                 DPAA2_SET_FLE_ADDR(sge,
422                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
423                 sge->length = auth_only_len;
424                 DPAA2_SET_FLE_BPID(sge, bpid);
425                 sge++;
426         }
427
428         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
429         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
430                                 sym_op->m_src->data_off);
431         sge->length = sym_op->aead.data.length;
432         if (sess->dir == DIR_DEC) {
433                 sge++;
434                 old_icv = (uint8_t *)(sge + 1);
435                 memcpy(old_icv, sym_op->aead.digest.data,
436                        sess->digest_length);
437                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
438                 sge->length = sess->digest_length;
439                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
440                                  sess->digest_length +
441                                  sess->iv.length +
442                                  auth_only_len));
443         }
444         DPAA2_SET_FLE_FIN(sge);
445
446         if (auth_only_len) {
447                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
448                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
449         }
450
451         return 0;
452 }
453
454 static inline int
455 build_authenc_sg_fd(dpaa2_sec_session *sess,
456                  struct rte_crypto_op *op,
457                  struct qbman_fd *fd, __rte_unused uint16_t bpid)
458 {
459         struct rte_crypto_sym_op *sym_op = op->sym;
460         struct ctxt_priv *priv = sess->ctxt;
461         struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
462         struct sec_flow_context *flc;
463         uint32_t auth_only_len = sym_op->auth.data.length -
464                                 sym_op->cipher.data.length;
465         int icv_len = sess->digest_length;
466         uint8_t *old_icv;
467         struct rte_mbuf *mbuf;
468         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
469                         sess->iv.offset);
470
471         PMD_INIT_FUNC_TRACE();
472
473         if (sym_op->m_dst)
474                 mbuf = sym_op->m_dst;
475         else
476                 mbuf = sym_op->m_src;
477
478         /* first FLE entry used to store mbuf and session ctxt */
479         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
480                         RTE_CACHE_LINE_SIZE);
481         if (unlikely(!fle)) {
482                 DPAA2_SEC_ERR("AUTHENC SG: Memory alloc failed for SGE");
483                 return -1;
484         }
485         memset(fle, 0, FLE_SG_MEM_SIZE);
486         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
487         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
488
489         op_fle = fle + 1;
490         ip_fle = fle + 2;
491         sge = fle + 3;
492
493         /* Save the shared descriptor */
494         flc = &priv->flc_desc[0].flc;
495
496         /* Configure FD as a FRAME LIST */
497         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
498         DPAA2_SET_FD_COMPOUND_FMT(fd);
499         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
500
501         DPAA2_SEC_DP_DEBUG(
502                 "AUTHENC SG: auth_off: 0x%x/length %d, digest-len=%d\n"
503                 "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
504                 sym_op->auth.data.offset,
505                 sym_op->auth.data.length,
506                 sess->digest_length,
507                 sym_op->cipher.data.offset,
508                 sym_op->cipher.data.length,
509                 sess->iv.length,
510                 sym_op->m_src->data_off);
511
512         /* Configure Output FLE with Scatter/Gather Entry */
513         DPAA2_SET_FLE_SG_EXT(op_fle);
514         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
515
516         if (auth_only_len)
517                 DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
518
519         op_fle->length = (sess->dir == DIR_ENC) ?
520                         (sym_op->cipher.data.length + icv_len) :
521                         sym_op->cipher.data.length;
522
523         /* Configure Output SGE for Encap/Decap */
524         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
525         DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->auth.data.offset);
526         sge->length = mbuf->data_len - sym_op->auth.data.offset;
527
528         mbuf = mbuf->next;
529         /* o/p segs */
530         while (mbuf) {
531                 sge++;
532                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
533                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
534                 sge->length = mbuf->data_len;
535                 mbuf = mbuf->next;
536         }
537         sge->length -= icv_len;
538
539         if (sess->dir == DIR_ENC) {
540                 sge++;
541                 DPAA2_SET_FLE_ADDR(sge,
542                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
543                 sge->length = icv_len;
544         }
545         DPAA2_SET_FLE_FIN(sge);
546
547         sge++;
548         mbuf = sym_op->m_src;
549
550         /* Configure Input FLE with Scatter/Gather Entry */
551         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
552         DPAA2_SET_FLE_SG_EXT(ip_fle);
553         DPAA2_SET_FLE_FIN(ip_fle);
554         ip_fle->length = (sess->dir == DIR_ENC) ?
555                         (sym_op->auth.data.length + sess->iv.length) :
556                         (sym_op->auth.data.length + sess->iv.length +
557                          icv_len);
558
559         /* Configure Input SGE for Encap/Decap */
560         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
561         sge->length = sess->iv.length;
562
563         sge++;
564         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
565         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
566                                 mbuf->data_off);
567         sge->length = mbuf->data_len - sym_op->auth.data.offset;
568
569         mbuf = mbuf->next;
570         /* i/p segs */
571         while (mbuf) {
572                 sge++;
573                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
574                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
575                 sge->length = mbuf->data_len;
576                 mbuf = mbuf->next;
577         }
578         sge->length -= icv_len;
579
580         if (sess->dir == DIR_DEC) {
581                 sge++;
582                 old_icv = (uint8_t *)(sge + 1);
583                 memcpy(old_icv, sym_op->auth.digest.data,
584                        icv_len);
585                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
586                 sge->length = icv_len;
587         }
588
589         DPAA2_SET_FLE_FIN(sge);
590         if (auth_only_len) {
591                 DPAA2_SET_FLE_INTERNAL_JD(ip_fle, auth_only_len);
592                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
593         }
594         DPAA2_SET_FD_LEN(fd, ip_fle->length);
595
596         return 0;
597 }
598
599 static inline int
600 build_authenc_fd(dpaa2_sec_session *sess,
601                  struct rte_crypto_op *op,
602                  struct qbman_fd *fd, uint16_t bpid)
603 {
604         struct rte_crypto_sym_op *sym_op = op->sym;
605         struct ctxt_priv *priv = sess->ctxt;
606         struct qbman_fle *fle, *sge;
607         struct sec_flow_context *flc;
608         uint32_t auth_only_len = sym_op->auth.data.length -
609                                 sym_op->cipher.data.length;
610         int icv_len = sess->digest_length, retval;
611         uint8_t *old_icv;
612         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
613                         sess->iv.offset);
614         struct rte_mbuf *dst;
615
616         PMD_INIT_FUNC_TRACE();
617
618         if (sym_op->m_dst)
619                 dst = sym_op->m_dst;
620         else
621                 dst = sym_op->m_src;
622
623         /* we are using the first FLE entry to store Mbuf.
624          * Currently we donot know which FLE has the mbuf stored.
625          * So while retreiving we can go back 1 FLE from the FD -ADDR
626          * to get the MBUF Addr from the previous FLE.
627          * We can have a better approach to use the inline Mbuf
628          */
629         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
630         if (retval) {
631                 DPAA2_SEC_ERR("Memory alloc failed for SGE");
632                 return -1;
633         }
634         memset(fle, 0, FLE_POOL_BUF_SIZE);
635         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
636         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
637         fle = fle + 1;
638         sge = fle + 2;
639         if (likely(bpid < MAX_BPID)) {
640                 DPAA2_SET_FD_BPID(fd, bpid);
641                 DPAA2_SET_FLE_BPID(fle, bpid);
642                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
643                 DPAA2_SET_FLE_BPID(sge, bpid);
644                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
645                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
646                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
647         } else {
648                 DPAA2_SET_FD_IVP(fd);
649                 DPAA2_SET_FLE_IVP(fle);
650                 DPAA2_SET_FLE_IVP((fle + 1));
651                 DPAA2_SET_FLE_IVP(sge);
652                 DPAA2_SET_FLE_IVP((sge + 1));
653                 DPAA2_SET_FLE_IVP((sge + 2));
654                 DPAA2_SET_FLE_IVP((sge + 3));
655         }
656
657         /* Save the shared descriptor */
658         flc = &priv->flc_desc[0].flc;
659         /* Configure FD as a FRAME LIST */
660         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
661         DPAA2_SET_FD_COMPOUND_FMT(fd);
662         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
663
664         DPAA2_SEC_DP_DEBUG(
665                 "AUTHENC: auth_off: 0x%x/length %d, digest-len=%d\n"
666                 "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
667                 sym_op->auth.data.offset,
668                 sym_op->auth.data.length,
669                 sess->digest_length,
670                 sym_op->cipher.data.offset,
671                 sym_op->cipher.data.length,
672                 sess->iv.length,
673                 sym_op->m_src->data_off);
674
675         /* Configure Output FLE with Scatter/Gather Entry */
676         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
677         if (auth_only_len)
678                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
679         fle->length = (sess->dir == DIR_ENC) ?
680                         (sym_op->cipher.data.length + icv_len) :
681                         sym_op->cipher.data.length;
682
683         DPAA2_SET_FLE_SG_EXT(fle);
684
685         /* Configure Output SGE for Encap/Decap */
686         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
687         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
688                                 dst->data_off);
689         sge->length = sym_op->cipher.data.length;
690
691         if (sess->dir == DIR_ENC) {
692                 sge++;
693                 DPAA2_SET_FLE_ADDR(sge,
694                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
695                 sge->length = sess->digest_length;
696                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
697                                         sess->iv.length));
698         }
699         DPAA2_SET_FLE_FIN(sge);
700
701         sge++;
702         fle++;
703
704         /* Configure Input FLE with Scatter/Gather Entry */
705         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
706         DPAA2_SET_FLE_SG_EXT(fle);
707         DPAA2_SET_FLE_FIN(fle);
708         fle->length = (sess->dir == DIR_ENC) ?
709                         (sym_op->auth.data.length + sess->iv.length) :
710                         (sym_op->auth.data.length + sess->iv.length +
711                          sess->digest_length);
712
713         /* Configure Input SGE for Encap/Decap */
714         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
715         sge->length = sess->iv.length;
716         sge++;
717
718         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
719         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
720                                 sym_op->m_src->data_off);
721         sge->length = sym_op->auth.data.length;
722         if (sess->dir == DIR_DEC) {
723                 sge++;
724                 old_icv = (uint8_t *)(sge + 1);
725                 memcpy(old_icv, sym_op->auth.digest.data,
726                        sess->digest_length);
727                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
728                 sge->length = sess->digest_length;
729                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
730                                  sess->digest_length +
731                                  sess->iv.length));
732         }
733         DPAA2_SET_FLE_FIN(sge);
734         if (auth_only_len) {
735                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
736                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
737         }
738         return 0;
739 }
740
741 static inline int build_auth_sg_fd(
742                 dpaa2_sec_session *sess,
743                 struct rte_crypto_op *op,
744                 struct qbman_fd *fd,
745                 __rte_unused uint16_t bpid)
746 {
747         struct rte_crypto_sym_op *sym_op = op->sym;
748         struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
749         struct sec_flow_context *flc;
750         struct ctxt_priv *priv = sess->ctxt;
751         uint8_t *old_digest;
752         struct rte_mbuf *mbuf;
753
754         PMD_INIT_FUNC_TRACE();
755
756         mbuf = sym_op->m_src;
757         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
758                         RTE_CACHE_LINE_SIZE);
759         if (unlikely(!fle)) {
760                 DPAA2_SEC_ERR("AUTH SG: Memory alloc failed for SGE");
761                 return -1;
762         }
763         memset(fle, 0, FLE_SG_MEM_SIZE);
764         /* first FLE entry used to store mbuf and session ctxt */
765         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
766         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
767         op_fle = fle + 1;
768         ip_fle = fle + 2;
769         sge = fle + 3;
770
771         flc = &priv->flc_desc[DESC_INITFINAL].flc;
772         /* sg FD */
773         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
774         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
775         DPAA2_SET_FD_COMPOUND_FMT(fd);
776
777         /* o/p fle */
778         DPAA2_SET_FLE_ADDR(op_fle,
779                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
780         op_fle->length = sess->digest_length;
781
782         /* i/p fle */
783         DPAA2_SET_FLE_SG_EXT(ip_fle);
784         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
785         /* i/p 1st seg */
786         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
787         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset + mbuf->data_off);
788         sge->length = mbuf->data_len - sym_op->auth.data.offset;
789
790         /* i/p segs */
791         mbuf = mbuf->next;
792         while (mbuf) {
793                 sge++;
794                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
795                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
796                 sge->length = mbuf->data_len;
797                 mbuf = mbuf->next;
798         }
799         if (sess->dir == DIR_ENC) {
800                 /* Digest calculation case */
801                 sge->length -= sess->digest_length;
802                 ip_fle->length = sym_op->auth.data.length;
803         } else {
804                 /* Digest verification case */
805                 sge++;
806                 old_digest = (uint8_t *)(sge + 1);
807                 rte_memcpy(old_digest, sym_op->auth.digest.data,
808                            sess->digest_length);
809                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
810                 sge->length = sess->digest_length;
811                 ip_fle->length = sym_op->auth.data.length +
812                                 sess->digest_length;
813         }
814         DPAA2_SET_FLE_FIN(sge);
815         DPAA2_SET_FLE_FIN(ip_fle);
816         DPAA2_SET_FD_LEN(fd, ip_fle->length);
817
818         return 0;
819 }
820
821 static inline int
822 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
823               struct qbman_fd *fd, uint16_t bpid)
824 {
825         struct rte_crypto_sym_op *sym_op = op->sym;
826         struct qbman_fle *fle, *sge;
827         struct sec_flow_context *flc;
828         struct ctxt_priv *priv = sess->ctxt;
829         uint8_t *old_digest;
830         int retval;
831
832         PMD_INIT_FUNC_TRACE();
833
834         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
835         if (retval) {
836                 DPAA2_SEC_ERR("AUTH Memory alloc failed for SGE");
837                 return -1;
838         }
839         memset(fle, 0, FLE_POOL_BUF_SIZE);
840         /* TODO we are using the first FLE entry to store Mbuf.
841          * Currently we donot know which FLE has the mbuf stored.
842          * So while retreiving we can go back 1 FLE from the FD -ADDR
843          * to get the MBUF Addr from the previous FLE.
844          * We can have a better approach to use the inline Mbuf
845          */
846         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
847         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
848         fle = fle + 1;
849
850         if (likely(bpid < MAX_BPID)) {
851                 DPAA2_SET_FD_BPID(fd, bpid);
852                 DPAA2_SET_FLE_BPID(fle, bpid);
853                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
854         } else {
855                 DPAA2_SET_FD_IVP(fd);
856                 DPAA2_SET_FLE_IVP(fle);
857                 DPAA2_SET_FLE_IVP((fle + 1));
858         }
859         flc = &priv->flc_desc[DESC_INITFINAL].flc;
860         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
861
862         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
863         fle->length = sess->digest_length;
864
865         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
866         DPAA2_SET_FD_COMPOUND_FMT(fd);
867         fle++;
868
869         if (sess->dir == DIR_ENC) {
870                 DPAA2_SET_FLE_ADDR(fle,
871                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
872                 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
873                                      sym_op->m_src->data_off);
874                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
875                 fle->length = sym_op->auth.data.length;
876         } else {
877                 sge = fle + 2;
878                 DPAA2_SET_FLE_SG_EXT(fle);
879                 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
880
881                 if (likely(bpid < MAX_BPID)) {
882                         DPAA2_SET_FLE_BPID(sge, bpid);
883                         DPAA2_SET_FLE_BPID(sge + 1, bpid);
884                 } else {
885                         DPAA2_SET_FLE_IVP(sge);
886                         DPAA2_SET_FLE_IVP((sge + 1));
887                 }
888                 DPAA2_SET_FLE_ADDR(sge,
889                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
890                 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
891                                      sym_op->m_src->data_off);
892
893                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
894                                  sess->digest_length);
895                 sge->length = sym_op->auth.data.length;
896                 sge++;
897                 old_digest = (uint8_t *)(sge + 1);
898                 rte_memcpy(old_digest, sym_op->auth.digest.data,
899                            sess->digest_length);
900                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
901                 sge->length = sess->digest_length;
902                 fle->length = sym_op->auth.data.length +
903                                 sess->digest_length;
904                 DPAA2_SET_FLE_FIN(sge);
905         }
906         DPAA2_SET_FLE_FIN(fle);
907
908         return 0;
909 }
910
911 static int
912 build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
913                 struct qbman_fd *fd, __rte_unused uint16_t bpid)
914 {
915         struct rte_crypto_sym_op *sym_op = op->sym;
916         struct qbman_fle *ip_fle, *op_fle, *sge, *fle;
917         struct sec_flow_context *flc;
918         struct ctxt_priv *priv = sess->ctxt;
919         struct rte_mbuf *mbuf;
920         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
921                         sess->iv.offset);
922
923         PMD_INIT_FUNC_TRACE();
924
925         if (sym_op->m_dst)
926                 mbuf = sym_op->m_dst;
927         else
928                 mbuf = sym_op->m_src;
929
930         fle = (struct qbman_fle *)rte_malloc(NULL, FLE_SG_MEM_SIZE,
931                         RTE_CACHE_LINE_SIZE);
932         if (!fle) {
933                 DPAA2_SEC_ERR("CIPHER SG: Memory alloc failed for SGE");
934                 return -1;
935         }
936         memset(fle, 0, FLE_SG_MEM_SIZE);
937         /* first FLE entry used to store mbuf and session ctxt */
938         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
939         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
940
941         op_fle = fle + 1;
942         ip_fle = fle + 2;
943         sge = fle + 3;
944
945         flc = &priv->flc_desc[0].flc;
946
947         DPAA2_SEC_DP_DEBUG(
948                 "CIPHER SG: cipher_off: 0x%x/length %d, ivlen=%d"
949                 " data_off: 0x%x\n",
950                 sym_op->cipher.data.offset,
951                 sym_op->cipher.data.length,
952                 sess->iv.length,
953                 sym_op->m_src->data_off);
954
955         /* o/p fle */
956         DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
957         op_fle->length = sym_op->cipher.data.length;
958         DPAA2_SET_FLE_SG_EXT(op_fle);
959
960         /* o/p 1st seg */
961         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
962         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset + mbuf->data_off);
963         sge->length = mbuf->data_len - sym_op->cipher.data.offset;
964
965         mbuf = mbuf->next;
966         /* o/p segs */
967         while (mbuf) {
968                 sge++;
969                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
970                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
971                 sge->length = mbuf->data_len;
972                 mbuf = mbuf->next;
973         }
974         DPAA2_SET_FLE_FIN(sge);
975
976         DPAA2_SEC_DP_DEBUG(
977                 "CIPHER SG: 1 - flc = %p, fle = %p FLEaddr = %x-%x, len %d\n",
978                 flc, fle, fle->addr_hi, fle->addr_lo,
979                 fle->length);
980
981         /* i/p fle */
982         mbuf = sym_op->m_src;
983         sge++;
984         DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
985         ip_fle->length = sess->iv.length + sym_op->cipher.data.length;
986         DPAA2_SET_FLE_SG_EXT(ip_fle);
987
988         /* i/p IV */
989         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
990         DPAA2_SET_FLE_OFFSET(sge, 0);
991         sge->length = sess->iv.length;
992
993         sge++;
994
995         /* i/p 1st seg */
996         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
997         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
998                              mbuf->data_off);
999         sge->length = mbuf->data_len - sym_op->cipher.data.offset;
1000
1001         mbuf = mbuf->next;
1002         /* i/p segs */
1003         while (mbuf) {
1004                 sge++;
1005                 DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
1006                 DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
1007                 sge->length = mbuf->data_len;
1008                 mbuf = mbuf->next;
1009         }
1010         DPAA2_SET_FLE_FIN(sge);
1011         DPAA2_SET_FLE_FIN(ip_fle);
1012
1013         /* sg fd */
1014         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
1015         DPAA2_SET_FD_LEN(fd, ip_fle->length);
1016         DPAA2_SET_FD_COMPOUND_FMT(fd);
1017         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
1018
1019         DPAA2_SEC_DP_DEBUG(
1020                 "CIPHER SG: fdaddr =%" PRIx64 " bpid =%d meta =%d"
1021                 " off =%d, len =%d\n",
1022                 DPAA2_GET_FD_ADDR(fd),
1023                 DPAA2_GET_FD_BPID(fd),
1024                 rte_dpaa2_bpid_info[bpid].meta_data_size,
1025                 DPAA2_GET_FD_OFFSET(fd),
1026                 DPAA2_GET_FD_LEN(fd));
1027         return 0;
1028 }
1029
1030 static int
1031 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
1032                 struct qbman_fd *fd, uint16_t bpid)
1033 {
1034         struct rte_crypto_sym_op *sym_op = op->sym;
1035         struct qbman_fle *fle, *sge;
1036         int retval;
1037         struct sec_flow_context *flc;
1038         struct ctxt_priv *priv = sess->ctxt;
1039         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1040                         sess->iv.offset);
1041         struct rte_mbuf *dst;
1042
1043         PMD_INIT_FUNC_TRACE();
1044
1045         if (sym_op->m_dst)
1046                 dst = sym_op->m_dst;
1047         else
1048                 dst = sym_op->m_src;
1049
1050         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
1051         if (retval) {
1052                 DPAA2_SEC_ERR("CIPHER: Memory alloc failed for SGE");
1053                 return -1;
1054         }
1055         memset(fle, 0, FLE_POOL_BUF_SIZE);
1056         /* TODO we are using the first FLE entry to store Mbuf.
1057          * Currently we donot know which FLE has the mbuf stored.
1058          * So while retreiving we can go back 1 FLE from the FD -ADDR
1059          * to get the MBUF Addr from the previous FLE.
1060          * We can have a better approach to use the inline Mbuf
1061          */
1062         DPAA2_SET_FLE_ADDR(fle, (size_t)op);
1063         DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
1064         fle = fle + 1;
1065         sge = fle + 2;
1066
1067         if (likely(bpid < MAX_BPID)) {
1068                 DPAA2_SET_FD_BPID(fd, bpid);
1069                 DPAA2_SET_FLE_BPID(fle, bpid);
1070                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
1071                 DPAA2_SET_FLE_BPID(sge, bpid);
1072                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
1073         } else {
1074                 DPAA2_SET_FD_IVP(fd);
1075                 DPAA2_SET_FLE_IVP(fle);
1076                 DPAA2_SET_FLE_IVP((fle + 1));
1077                 DPAA2_SET_FLE_IVP(sge);
1078                 DPAA2_SET_FLE_IVP((sge + 1));
1079         }
1080
1081         flc = &priv->flc_desc[0].flc;
1082         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
1083         DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
1084                          sess->iv.length);
1085         DPAA2_SET_FD_COMPOUND_FMT(fd);
1086         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
1087
1088         DPAA2_SEC_DP_DEBUG(
1089                 "CIPHER: cipher_off: 0x%x/length %d, ivlen=%d,"
1090                 " data_off: 0x%x\n",
1091                 sym_op->cipher.data.offset,
1092                 sym_op->cipher.data.length,
1093                 sess->iv.length,
1094                 sym_op->m_src->data_off);
1095
1096         DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(dst));
1097         DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
1098                              dst->data_off);
1099
1100         fle->length = sym_op->cipher.data.length + sess->iv.length;
1101
1102         DPAA2_SEC_DP_DEBUG(
1103                 "CIPHER: 1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d\n",
1104                 flc, fle, fle->addr_hi, fle->addr_lo,
1105                 fle->length);
1106
1107         fle++;
1108
1109         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
1110         fle->length = sym_op->cipher.data.length + sess->iv.length;
1111
1112         DPAA2_SET_FLE_SG_EXT(fle);
1113
1114         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
1115         sge->length = sess->iv.length;
1116
1117         sge++;
1118         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
1119         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
1120                              sym_op->m_src->data_off);
1121
1122         sge->length = sym_op->cipher.data.length;
1123         DPAA2_SET_FLE_FIN(sge);
1124         DPAA2_SET_FLE_FIN(fle);
1125
1126         DPAA2_SEC_DP_DEBUG(
1127                 "CIPHER: fdaddr =%" PRIx64 " bpid =%d meta =%d"
1128                 " off =%d, len =%d\n",
1129                 DPAA2_GET_FD_ADDR(fd),
1130                 DPAA2_GET_FD_BPID(fd),
1131                 rte_dpaa2_bpid_info[bpid].meta_data_size,
1132                 DPAA2_GET_FD_OFFSET(fd),
1133                 DPAA2_GET_FD_LEN(fd));
1134
1135         return 0;
1136 }
1137
1138 static inline int
1139 build_sec_fd(struct rte_crypto_op *op,
1140              struct qbman_fd *fd, uint16_t bpid)
1141 {
1142         int ret = -1;
1143         dpaa2_sec_session *sess;
1144
1145         PMD_INIT_FUNC_TRACE();
1146
1147         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
1148                 sess = (dpaa2_sec_session *)get_sym_session_private_data(
1149                                 op->sym->session, cryptodev_driver_id);
1150         else if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
1151                 sess = (dpaa2_sec_session *)get_sec_session_private_data(
1152                                 op->sym->sec_session);
1153         else
1154                 return -1;
1155
1156         /* Segmented buffer */
1157         if (unlikely(!rte_pktmbuf_is_contiguous(op->sym->m_src))) {
1158                 switch (sess->ctxt_type) {
1159                 case DPAA2_SEC_CIPHER:
1160                         ret = build_cipher_sg_fd(sess, op, fd, bpid);
1161                         break;
1162                 case DPAA2_SEC_AUTH:
1163                         ret = build_auth_sg_fd(sess, op, fd, bpid);
1164                         break;
1165                 case DPAA2_SEC_AEAD:
1166                         ret = build_authenc_gcm_sg_fd(sess, op, fd, bpid);
1167                         break;
1168                 case DPAA2_SEC_CIPHER_HASH:
1169                         ret = build_authenc_sg_fd(sess, op, fd, bpid);
1170                         break;
1171                 case DPAA2_SEC_HASH_CIPHER:
1172                 default:
1173                         DPAA2_SEC_ERR("error: Unsupported session");
1174                 }
1175         } else {
1176                 switch (sess->ctxt_type) {
1177                 case DPAA2_SEC_CIPHER:
1178                         ret = build_cipher_fd(sess, op, fd, bpid);
1179                         break;
1180                 case DPAA2_SEC_AUTH:
1181                         ret = build_auth_fd(sess, op, fd, bpid);
1182                         break;
1183                 case DPAA2_SEC_AEAD:
1184                         ret = build_authenc_gcm_fd(sess, op, fd, bpid);
1185                         break;
1186                 case DPAA2_SEC_CIPHER_HASH:
1187                         ret = build_authenc_fd(sess, op, fd, bpid);
1188                         break;
1189                 case DPAA2_SEC_IPSEC:
1190                         ret = build_proto_fd(sess, op, fd, bpid);
1191                         break;
1192                 case DPAA2_SEC_HASH_CIPHER:
1193                 default:
1194                         DPAA2_SEC_ERR("error: Unsupported session");
1195                 }
1196         }
1197         return ret;
1198 }
1199
1200 static uint16_t
1201 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
1202                         uint16_t nb_ops)
1203 {
1204         /* Function to transmit the frames to given device and VQ*/
1205         uint32_t loop;
1206         int32_t ret;
1207         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
1208         uint32_t frames_to_send;
1209         struct qbman_eq_desc eqdesc;
1210         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
1211         struct qbman_swp *swp;
1212         uint16_t num_tx = 0;
1213         uint32_t flags[MAX_TX_RING_SLOTS] = {0};
1214         /*todo - need to support multiple buffer pools */
1215         uint16_t bpid;
1216         struct rte_mempool *mb_pool;
1217
1218         if (unlikely(nb_ops == 0))
1219                 return 0;
1220
1221         if (ops[0]->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
1222                 DPAA2_SEC_ERR("sessionless crypto op not supported");
1223                 return 0;
1224         }
1225         /*Prepare enqueue descriptor*/
1226         qbman_eq_desc_clear(&eqdesc);
1227         qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
1228         qbman_eq_desc_set_response(&eqdesc, 0, 0);
1229         qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
1230
1231         if (!DPAA2_PER_LCORE_DPIO) {
1232                 ret = dpaa2_affine_qbman_swp();
1233                 if (ret) {
1234                         DPAA2_SEC_ERR("Failure in affining portal");
1235                         return 0;
1236                 }
1237         }
1238         swp = DPAA2_PER_LCORE_PORTAL;
1239
1240         while (nb_ops) {
1241                 frames_to_send = (nb_ops > dpaa2_eqcr_size) ?
1242                         dpaa2_eqcr_size : nb_ops;
1243
1244                 for (loop = 0; loop < frames_to_send; loop++) {
1245                         if ((*ops)->sym->m_src->seqn) {
1246                          uint8_t dqrr_index = (*ops)->sym->m_src->seqn - 1;
1247
1248                          flags[loop] = QBMAN_ENQUEUE_FLAG_DCA | dqrr_index;
1249                          DPAA2_PER_LCORE_DQRR_SIZE--;
1250                          DPAA2_PER_LCORE_DQRR_HELD &= ~(1 << dqrr_index);
1251                          (*ops)->sym->m_src->seqn = DPAA2_INVALID_MBUF_SEQN;
1252                         }
1253
1254                         /*Clear the unused FD fields before sending*/
1255                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
1256                         mb_pool = (*ops)->sym->m_src->pool;
1257                         bpid = mempool_to_bpid(mb_pool);
1258                         ret = build_sec_fd(*ops, &fd_arr[loop], bpid);
1259                         if (ret) {
1260                                 DPAA2_SEC_ERR("error: Improper packet contents"
1261                                               " for crypto operation");
1262                                 goto skip_tx;
1263                         }
1264                         ops++;
1265                 }
1266                 loop = 0;
1267                 while (loop < frames_to_send) {
1268                         loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
1269                                                         &fd_arr[loop],
1270                                                         &flags[loop],
1271                                                         frames_to_send - loop);
1272                 }
1273
1274                 num_tx += frames_to_send;
1275                 nb_ops -= frames_to_send;
1276         }
1277 skip_tx:
1278         dpaa2_qp->tx_vq.tx_pkts += num_tx;
1279         dpaa2_qp->tx_vq.err_pkts += nb_ops;
1280         return num_tx;
1281 }
1282
1283 static inline struct rte_crypto_op *
1284 sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
1285 {
1286         struct rte_crypto_op *op;
1287         uint16_t len = DPAA2_GET_FD_LEN(fd);
1288         uint16_t diff = 0;
1289         dpaa2_sec_session *sess_priv;
1290
1291         struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
1292                 DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
1293                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
1294
1295         diff = len - mbuf->pkt_len;
1296         mbuf->pkt_len += diff;
1297         mbuf->data_len += diff;
1298         op = (struct rte_crypto_op *)(size_t)mbuf->buf_iova;
1299         mbuf->buf_iova = op->sym->aead.digest.phys_addr;
1300         op->sym->aead.digest.phys_addr = 0L;
1301
1302         sess_priv = (dpaa2_sec_session *)get_sec_session_private_data(
1303                                 op->sym->sec_session);
1304         if (sess_priv->dir == DIR_ENC)
1305                 mbuf->data_off += SEC_FLC_DHR_OUTBOUND;
1306         else
1307                 mbuf->data_off += SEC_FLC_DHR_INBOUND;
1308
1309         return op;
1310 }
1311
1312 static inline struct rte_crypto_op *
1313 sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
1314 {
1315         struct qbman_fle *fle;
1316         struct rte_crypto_op *op;
1317         struct ctxt_priv *priv;
1318         struct rte_mbuf *dst, *src;
1319
1320         if (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)
1321                 return sec_simple_fd_to_mbuf(fd, driver_id);
1322
1323         fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
1324
1325         DPAA2_SEC_DP_DEBUG("FLE addr = %x - %x, offset = %x\n",
1326                            fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
1327
1328         /* we are using the first FLE entry to store Mbuf.
1329          * Currently we donot know which FLE has the mbuf stored.
1330          * So while retreiving we can go back 1 FLE from the FD -ADDR
1331          * to get the MBUF Addr from the previous FLE.
1332          * We can have a better approach to use the inline Mbuf
1333          */
1334
1335         if (unlikely(DPAA2_GET_FD_IVP(fd))) {
1336                 /* TODO complete it. */
1337                 DPAA2_SEC_ERR("error: non inline buffer");
1338                 return NULL;
1339         }
1340         op = (struct rte_crypto_op *)DPAA2_GET_FLE_ADDR((fle - 1));
1341
1342         /* Prefeth op */
1343         src = op->sym->m_src;
1344         rte_prefetch0(src);
1345
1346         if (op->sym->m_dst) {
1347                 dst = op->sym->m_dst;
1348                 rte_prefetch0(dst);
1349         } else
1350                 dst = src;
1351
1352         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
1353                 dpaa2_sec_session *sess = (dpaa2_sec_session *)
1354                         get_sec_session_private_data(op->sym->sec_session);
1355                 if (sess->ctxt_type == DPAA2_SEC_IPSEC) {
1356                         uint16_t len = DPAA2_GET_FD_LEN(fd);
1357                         dst->pkt_len = len;
1358                         dst->data_len = len;
1359                 }
1360         }
1361
1362         DPAA2_SEC_DP_DEBUG("mbuf %p BMAN buf addr %p,"
1363                 " fdaddr =%" PRIx64 " bpid =%d meta =%d off =%d, len =%d\n",
1364                 (void *)dst,
1365                 dst->buf_addr,
1366                 DPAA2_GET_FD_ADDR(fd),
1367                 DPAA2_GET_FD_BPID(fd),
1368                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
1369                 DPAA2_GET_FD_OFFSET(fd),
1370                 DPAA2_GET_FD_LEN(fd));
1371
1372         /* free the fle memory */
1373         if (likely(rte_pktmbuf_is_contiguous(src))) {
1374                 priv = (struct ctxt_priv *)(size_t)DPAA2_GET_FLE_CTXT(fle - 1);
1375                 rte_mempool_put(priv->fle_pool, (void *)(fle-1));
1376         } else
1377                 rte_free((void *)(fle-1));
1378
1379         return op;
1380 }
1381
1382 static uint16_t
1383 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
1384                         uint16_t nb_ops)
1385 {
1386         /* Function is responsible to receive frames for a given device and VQ*/
1387         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
1388         struct rte_cryptodev *dev =
1389                         (struct rte_cryptodev *)(dpaa2_qp->rx_vq.dev);
1390         struct qbman_result *dq_storage;
1391         uint32_t fqid = dpaa2_qp->rx_vq.fqid;
1392         int ret, num_rx = 0;
1393         uint8_t is_last = 0, status;
1394         struct qbman_swp *swp;
1395         const struct qbman_fd *fd;
1396         struct qbman_pull_desc pulldesc;
1397
1398         if (!DPAA2_PER_LCORE_DPIO) {
1399                 ret = dpaa2_affine_qbman_swp();
1400                 if (ret) {
1401                         DPAA2_SEC_ERR("Failure in affining portal");
1402                         return 0;
1403                 }
1404         }
1405         swp = DPAA2_PER_LCORE_PORTAL;
1406         dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
1407
1408         qbman_pull_desc_clear(&pulldesc);
1409         qbman_pull_desc_set_numframes(&pulldesc,
1410                                       (nb_ops > dpaa2_dqrr_size) ?
1411                                       dpaa2_dqrr_size : nb_ops);
1412         qbman_pull_desc_set_fq(&pulldesc, fqid);
1413         qbman_pull_desc_set_storage(&pulldesc, dq_storage,
1414                                     (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
1415                                     1);
1416
1417         /*Issue a volatile dequeue command. */
1418         while (1) {
1419                 if (qbman_swp_pull(swp, &pulldesc)) {
1420                         DPAA2_SEC_WARN(
1421                                 "SEC VDQ command is not issued : QBMAN busy");
1422                         /* Portal was busy, try again */
1423                         continue;
1424                 }
1425                 break;
1426         };
1427
1428         /* Receive the packets till Last Dequeue entry is found with
1429          * respect to the above issues PULL command.
1430          */
1431         while (!is_last) {
1432                 /* Check if the previous issued command is completed.
1433                  * Also seems like the SWP is shared between the Ethernet Driver
1434                  * and the SEC driver.
1435                  */
1436                 while (!qbman_check_command_complete(dq_storage))
1437                         ;
1438
1439                 /* Loop until the dq_storage is updated with
1440                  * new token by QBMAN
1441                  */
1442                 while (!qbman_check_new_result(dq_storage))
1443                         ;
1444                 /* Check whether Last Pull command is Expired and
1445                  * setting Condition for Loop termination
1446                  */
1447                 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
1448                         is_last = 1;
1449                         /* Check for valid frame. */
1450                         status = (uint8_t)qbman_result_DQ_flags(dq_storage);
1451                         if (unlikely(
1452                                 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
1453                                 DPAA2_SEC_DP_DEBUG("No frame is delivered\n");
1454                                 continue;
1455                         }
1456                 }
1457
1458                 fd = qbman_result_DQ_fd(dq_storage);
1459                 ops[num_rx] = sec_fd_to_mbuf(fd, dev->driver_id);
1460
1461                 if (unlikely(fd->simple.frc)) {
1462                         /* TODO Parse SEC errors */
1463                         DPAA2_SEC_ERR("SEC returned Error - %x",
1464                                       fd->simple.frc);
1465                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
1466                 } else {
1467                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1468                 }
1469
1470                 num_rx++;
1471                 dq_storage++;
1472         } /* End of Packet Rx loop */
1473
1474         dpaa2_qp->rx_vq.rx_pkts += num_rx;
1475
1476         DPAA2_SEC_DP_DEBUG("SEC Received %d Packets\n", num_rx);
1477         /*Return the total number of packets received to DPAA2 app*/
1478         return num_rx;
1479 }
1480
1481 /** Release queue pair */
1482 static int
1483 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
1484 {
1485         struct dpaa2_sec_qp *qp =
1486                 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
1487
1488         PMD_INIT_FUNC_TRACE();
1489
1490         if (qp->rx_vq.q_storage) {
1491                 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
1492                 rte_free(qp->rx_vq.q_storage);
1493         }
1494         rte_free(qp);
1495
1496         dev->data->queue_pairs[queue_pair_id] = NULL;
1497
1498         return 0;
1499 }
1500
1501 /** Setup a queue pair */
1502 static int
1503 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1504                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
1505                 __rte_unused int socket_id,
1506                 __rte_unused struct rte_mempool *session_pool)
1507 {
1508         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1509         struct dpaa2_sec_qp *qp;
1510         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1511         struct dpseci_rx_queue_cfg cfg;
1512         int32_t retcode;
1513
1514         PMD_INIT_FUNC_TRACE();
1515
1516         /* If qp is already in use free ring memory and qp metadata. */
1517         if (dev->data->queue_pairs[qp_id] != NULL) {
1518                 DPAA2_SEC_INFO("QP already setup");
1519                 return 0;
1520         }
1521
1522         DPAA2_SEC_DEBUG("dev =%p, queue =%d, conf =%p",
1523                     dev, qp_id, qp_conf);
1524
1525         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
1526
1527         qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
1528                         RTE_CACHE_LINE_SIZE);
1529         if (!qp) {
1530                 DPAA2_SEC_ERR("malloc failed for rx/tx queues");
1531                 return -1;
1532         }
1533
1534         qp->rx_vq.dev = dev;
1535         qp->tx_vq.dev = dev;
1536         qp->rx_vq.q_storage = rte_malloc("sec dq storage",
1537                 sizeof(struct queue_storage_info_t),
1538                 RTE_CACHE_LINE_SIZE);
1539         if (!qp->rx_vq.q_storage) {
1540                 DPAA2_SEC_ERR("malloc failed for q_storage");
1541                 return -1;
1542         }
1543         memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
1544
1545         if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
1546                 DPAA2_SEC_ERR("Unable to allocate dequeue storage");
1547                 return -1;
1548         }
1549
1550         dev->data->queue_pairs[qp_id] = qp;
1551
1552         cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
1553         cfg.user_ctx = (size_t)(&qp->rx_vq);
1554         retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
1555                                       qp_id, &cfg);
1556         return retcode;
1557 }
1558
1559 /** Return the number of allocated queue pairs */
1560 static uint32_t
1561 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
1562 {
1563         PMD_INIT_FUNC_TRACE();
1564
1565         return dev->data->nb_queue_pairs;
1566 }
1567
1568 /** Returns the size of the aesni gcm session structure */
1569 static unsigned int
1570 dpaa2_sec_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1571 {
1572         PMD_INIT_FUNC_TRACE();
1573
1574         return sizeof(dpaa2_sec_session);
1575 }
1576
1577 static int
1578 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
1579                       struct rte_crypto_sym_xform *xform,
1580                       dpaa2_sec_session *session)
1581 {
1582         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1583         struct alginfo cipherdata;
1584         int bufsize, i;
1585         struct ctxt_priv *priv;
1586         struct sec_flow_context *flc;
1587
1588         PMD_INIT_FUNC_TRACE();
1589
1590         /* For SEC CIPHER only one descriptor is required. */
1591         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1592                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1593                         RTE_CACHE_LINE_SIZE);
1594         if (priv == NULL) {
1595                 DPAA2_SEC_ERR("No Memory for priv CTXT");
1596                 return -1;
1597         }
1598
1599         priv->fle_pool = dev_priv->fle_pool;
1600
1601         flc = &priv->flc_desc[0].flc;
1602
1603         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
1604                         RTE_CACHE_LINE_SIZE);
1605         if (session->cipher_key.data == NULL) {
1606                 DPAA2_SEC_ERR("No Memory for cipher key");
1607                 rte_free(priv);
1608                 return -1;
1609         }
1610         session->cipher_key.length = xform->cipher.key.length;
1611
1612         memcpy(session->cipher_key.data, xform->cipher.key.data,
1613                xform->cipher.key.length);
1614         cipherdata.key = (size_t)session->cipher_key.data;
1615         cipherdata.keylen = session->cipher_key.length;
1616         cipherdata.key_enc_flags = 0;
1617         cipherdata.key_type = RTA_DATA_IMM;
1618
1619         /* Set IV parameters */
1620         session->iv.offset = xform->cipher.iv.offset;
1621         session->iv.length = xform->cipher.iv.length;
1622
1623         switch (xform->cipher.algo) {
1624         case RTE_CRYPTO_CIPHER_AES_CBC:
1625                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1626                 cipherdata.algmode = OP_ALG_AAI_CBC;
1627                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1628                 break;
1629         case RTE_CRYPTO_CIPHER_3DES_CBC:
1630                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1631                 cipherdata.algmode = OP_ALG_AAI_CBC;
1632                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1633                 break;
1634         case RTE_CRYPTO_CIPHER_AES_CTR:
1635                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1636                 cipherdata.algmode = OP_ALG_AAI_CTR;
1637                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1638                 break;
1639         case RTE_CRYPTO_CIPHER_3DES_CTR:
1640         case RTE_CRYPTO_CIPHER_AES_ECB:
1641         case RTE_CRYPTO_CIPHER_3DES_ECB:
1642         case RTE_CRYPTO_CIPHER_AES_XTS:
1643         case RTE_CRYPTO_CIPHER_AES_F8:
1644         case RTE_CRYPTO_CIPHER_ARC4:
1645         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1646         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1647         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
1648         case RTE_CRYPTO_CIPHER_NULL:
1649                 DPAA2_SEC_ERR("Crypto: Unsupported Cipher alg %u",
1650                         xform->cipher.algo);
1651                 goto error_out;
1652         default:
1653                 DPAA2_SEC_ERR("Crypto: Undefined Cipher specified %u",
1654                         xform->cipher.algo);
1655                 goto error_out;
1656         }
1657         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1658                                 DIR_ENC : DIR_DEC;
1659
1660         bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
1661                                         &cipherdata, NULL, session->iv.length,
1662                                         session->dir);
1663         if (bufsize < 0) {
1664                 DPAA2_SEC_ERR("Crypto: Descriptor build failed");
1665                 goto error_out;
1666         }
1667         flc->dhr = 0;
1668         flc->bpv0 = 0x1;
1669         flc->mode_bits = 0x8000;
1670
1671         flc->word1_sdl = (uint8_t)bufsize;
1672         flc->word2_rflc_31_0 = lower_32_bits(
1673                         (size_t)&(((struct dpaa2_sec_qp *)
1674                         dev->data->queue_pairs[0])->rx_vq));
1675         flc->word3_rflc_63_32 = upper_32_bits(
1676                         (size_t)&(((struct dpaa2_sec_qp *)
1677                         dev->data->queue_pairs[0])->rx_vq));
1678         session->ctxt = priv;
1679
1680         for (i = 0; i < bufsize; i++)
1681                 DPAA2_SEC_DEBUG("DESC[%d]:0x%x", i, priv->flc_desc[0].desc[i]);
1682
1683         return 0;
1684
1685 error_out:
1686         rte_free(session->cipher_key.data);
1687         rte_free(priv);
1688         return -1;
1689 }
1690
1691 static int
1692 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
1693                     struct rte_crypto_sym_xform *xform,
1694                     dpaa2_sec_session *session)
1695 {
1696         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1697         struct alginfo authdata;
1698         int bufsize, i;
1699         struct ctxt_priv *priv;
1700         struct sec_flow_context *flc;
1701
1702         PMD_INIT_FUNC_TRACE();
1703
1704         /* For SEC AUTH three descriptors are required for various stages */
1705         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1706                         sizeof(struct ctxt_priv) + 3 *
1707                         sizeof(struct sec_flc_desc),
1708                         RTE_CACHE_LINE_SIZE);
1709         if (priv == NULL) {
1710                 DPAA2_SEC_ERR("No Memory for priv CTXT");
1711                 return -1;
1712         }
1713
1714         priv->fle_pool = dev_priv->fle_pool;
1715         flc = &priv->flc_desc[DESC_INITFINAL].flc;
1716
1717         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1718                         RTE_CACHE_LINE_SIZE);
1719         if (session->auth_key.data == NULL) {
1720                 DPAA2_SEC_ERR("Unable to allocate memory for auth key");
1721                 rte_free(priv);
1722                 return -1;
1723         }
1724         session->auth_key.length = xform->auth.key.length;
1725
1726         memcpy(session->auth_key.data, xform->auth.key.data,
1727                xform->auth.key.length);
1728         authdata.key = (size_t)session->auth_key.data;
1729         authdata.keylen = session->auth_key.length;
1730         authdata.key_enc_flags = 0;
1731         authdata.key_type = RTA_DATA_IMM;
1732
1733         session->digest_length = xform->auth.digest_length;
1734
1735         switch (xform->auth.algo) {
1736         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1737                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1738                 authdata.algmode = OP_ALG_AAI_HMAC;
1739                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1740                 break;
1741         case RTE_CRYPTO_AUTH_MD5_HMAC:
1742                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1743                 authdata.algmode = OP_ALG_AAI_HMAC;
1744                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1745                 break;
1746         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1747                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1748                 authdata.algmode = OP_ALG_AAI_HMAC;
1749                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1750                 break;
1751         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1752                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1753                 authdata.algmode = OP_ALG_AAI_HMAC;
1754                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1755                 break;
1756         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1757                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1758                 authdata.algmode = OP_ALG_AAI_HMAC;
1759                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1760                 break;
1761         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1762                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1763                 authdata.algmode = OP_ALG_AAI_HMAC;
1764                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1765                 break;
1766         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1767         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1768         case RTE_CRYPTO_AUTH_NULL:
1769         case RTE_CRYPTO_AUTH_SHA1:
1770         case RTE_CRYPTO_AUTH_SHA256:
1771         case RTE_CRYPTO_AUTH_SHA512:
1772         case RTE_CRYPTO_AUTH_SHA224:
1773         case RTE_CRYPTO_AUTH_SHA384:
1774         case RTE_CRYPTO_AUTH_MD5:
1775         case RTE_CRYPTO_AUTH_AES_GMAC:
1776         case RTE_CRYPTO_AUTH_KASUMI_F9:
1777         case RTE_CRYPTO_AUTH_AES_CMAC:
1778         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1779         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1780                 DPAA2_SEC_ERR("Crypto: Unsupported auth alg %un",
1781                               xform->auth.algo);
1782                 goto error_out;
1783         default:
1784                 DPAA2_SEC_ERR("Crypto: Undefined Auth specified %u",
1785                               xform->auth.algo);
1786                 goto error_out;
1787         }
1788         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1789                                 DIR_ENC : DIR_DEC;
1790
1791         bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
1792                                    1, 0, &authdata, !session->dir,
1793                                    session->digest_length);
1794         if (bufsize < 0) {
1795                 DPAA2_SEC_ERR("Crypto: Invalid buffer length");
1796                 goto error_out;
1797         }
1798
1799         flc->word1_sdl = (uint8_t)bufsize;
1800         flc->word2_rflc_31_0 = lower_32_bits(
1801                         (size_t)&(((struct dpaa2_sec_qp *)
1802                         dev->data->queue_pairs[0])->rx_vq));
1803         flc->word3_rflc_63_32 = upper_32_bits(
1804                         (size_t)&(((struct dpaa2_sec_qp *)
1805                         dev->data->queue_pairs[0])->rx_vq));
1806         session->ctxt = priv;
1807         for (i = 0; i < bufsize; i++)
1808                 DPAA2_SEC_DEBUG("DESC[%d]:0x%x",
1809                                 i, priv->flc_desc[DESC_INITFINAL].desc[i]);
1810
1811
1812         return 0;
1813
1814 error_out:
1815         rte_free(session->auth_key.data);
1816         rte_free(priv);
1817         return -1;
1818 }
1819
1820 static int
1821 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
1822                     struct rte_crypto_sym_xform *xform,
1823                     dpaa2_sec_session *session)
1824 {
1825         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1826         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1827         struct alginfo aeaddata;
1828         int bufsize, i;
1829         struct ctxt_priv *priv;
1830         struct sec_flow_context *flc;
1831         struct rte_crypto_aead_xform *aead_xform = &xform->aead;
1832         int err;
1833
1834         PMD_INIT_FUNC_TRACE();
1835
1836         /* Set IV parameters */
1837         session->iv.offset = aead_xform->iv.offset;
1838         session->iv.length = aead_xform->iv.length;
1839         session->ctxt_type = DPAA2_SEC_AEAD;
1840
1841         /* For SEC AEAD only one descriptor is required */
1842         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1843                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1844                         RTE_CACHE_LINE_SIZE);
1845         if (priv == NULL) {
1846                 DPAA2_SEC_ERR("No Memory for priv CTXT");
1847                 return -1;
1848         }
1849
1850         priv->fle_pool = dev_priv->fle_pool;
1851         flc = &priv->flc_desc[0].flc;
1852
1853         session->aead_key.data = rte_zmalloc(NULL, aead_xform->key.length,
1854                                                RTE_CACHE_LINE_SIZE);
1855         if (session->aead_key.data == NULL && aead_xform->key.length > 0) {
1856                 DPAA2_SEC_ERR("No Memory for aead key");
1857                 rte_free(priv);
1858                 return -1;
1859         }
1860         memcpy(session->aead_key.data, aead_xform->key.data,
1861                aead_xform->key.length);
1862
1863         session->digest_length = aead_xform->digest_length;
1864         session->aead_key.length = aead_xform->key.length;
1865         ctxt->auth_only_len = aead_xform->aad_length;
1866
1867         aeaddata.key = (size_t)session->aead_key.data;
1868         aeaddata.keylen = session->aead_key.length;
1869         aeaddata.key_enc_flags = 0;
1870         aeaddata.key_type = RTA_DATA_IMM;
1871
1872         switch (aead_xform->algo) {
1873         case RTE_CRYPTO_AEAD_AES_GCM:
1874                 aeaddata.algtype = OP_ALG_ALGSEL_AES;
1875                 aeaddata.algmode = OP_ALG_AAI_GCM;
1876                 session->aead_alg = RTE_CRYPTO_AEAD_AES_GCM;
1877                 break;
1878         case RTE_CRYPTO_AEAD_AES_CCM:
1879                 DPAA2_SEC_ERR("Crypto: Unsupported AEAD alg %u",
1880                               aead_xform->algo);
1881                 goto error_out;
1882         default:
1883                 DPAA2_SEC_ERR("Crypto: Undefined AEAD specified %u",
1884                               aead_xform->algo);
1885                 goto error_out;
1886         }
1887         session->dir = (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1888                                 DIR_ENC : DIR_DEC;
1889
1890         priv->flc_desc[0].desc[0] = aeaddata.keylen;
1891         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1892                                MIN_JOB_DESC_SIZE,
1893                                (unsigned int *)priv->flc_desc[0].desc,
1894                                &priv->flc_desc[0].desc[1], 1);
1895
1896         if (err < 0) {
1897                 DPAA2_SEC_ERR("Crypto: Incorrect key lengths");
1898                 goto error_out;
1899         }
1900         if (priv->flc_desc[0].desc[1] & 1) {
1901                 aeaddata.key_type = RTA_DATA_IMM;
1902         } else {
1903                 aeaddata.key = DPAA2_VADDR_TO_IOVA(aeaddata.key);
1904                 aeaddata.key_type = RTA_DATA_PTR;
1905         }
1906         priv->flc_desc[0].desc[0] = 0;
1907         priv->flc_desc[0].desc[1] = 0;
1908
1909         if (session->dir == DIR_ENC)
1910                 bufsize = cnstr_shdsc_gcm_encap(
1911                                 priv->flc_desc[0].desc, 1, 0,
1912                                 &aeaddata, session->iv.length,
1913                                 session->digest_length);
1914         else
1915                 bufsize = cnstr_shdsc_gcm_decap(
1916                                 priv->flc_desc[0].desc, 1, 0,
1917                                 &aeaddata, session->iv.length,
1918                                 session->digest_length);
1919         if (bufsize < 0) {
1920                 DPAA2_SEC_ERR("Crypto: Invalid buffer length");
1921                 goto error_out;
1922         }
1923
1924         flc->word1_sdl = (uint8_t)bufsize;
1925         flc->word2_rflc_31_0 = lower_32_bits(
1926                         (size_t)&(((struct dpaa2_sec_qp *)
1927                         dev->data->queue_pairs[0])->rx_vq));
1928         flc->word3_rflc_63_32 = upper_32_bits(
1929                         (size_t)&(((struct dpaa2_sec_qp *)
1930                         dev->data->queue_pairs[0])->rx_vq));
1931         session->ctxt = priv;
1932         for (i = 0; i < bufsize; i++)
1933                 DPAA2_SEC_DEBUG("DESC[%d]:0x%x\n",
1934                             i, priv->flc_desc[0].desc[i]);
1935
1936         return 0;
1937
1938 error_out:
1939         rte_free(session->aead_key.data);
1940         rte_free(priv);
1941         return -1;
1942 }
1943
1944
1945 static int
1946 dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
1947                     struct rte_crypto_sym_xform *xform,
1948                     dpaa2_sec_session *session)
1949 {
1950         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1951         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1952         struct alginfo authdata, cipherdata;
1953         int bufsize, i;
1954         struct ctxt_priv *priv;
1955         struct sec_flow_context *flc;
1956         struct rte_crypto_cipher_xform *cipher_xform;
1957         struct rte_crypto_auth_xform *auth_xform;
1958         int err;
1959
1960         PMD_INIT_FUNC_TRACE();
1961
1962         if (session->ext_params.aead_ctxt.auth_cipher_text) {
1963                 cipher_xform = &xform->cipher;
1964                 auth_xform = &xform->next->auth;
1965                 session->ctxt_type =
1966                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1967                         DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1968         } else {
1969                 cipher_xform = &xform->next->cipher;
1970                 auth_xform = &xform->auth;
1971                 session->ctxt_type =
1972                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1973                         DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1974         }
1975
1976         /* Set IV parameters */
1977         session->iv.offset = cipher_xform->iv.offset;
1978         session->iv.length = cipher_xform->iv.length;
1979
1980         /* For SEC AEAD only one descriptor is required */
1981         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1982                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1983                         RTE_CACHE_LINE_SIZE);
1984         if (priv == NULL) {
1985                 DPAA2_SEC_ERR("No Memory for priv CTXT");
1986                 return -1;
1987         }
1988
1989         priv->fle_pool = dev_priv->fle_pool;
1990         flc = &priv->flc_desc[0].flc;
1991
1992         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1993                                                RTE_CACHE_LINE_SIZE);
1994         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1995                 DPAA2_SEC_ERR("No Memory for cipher key");
1996                 rte_free(priv);
1997                 return -1;
1998         }
1999         session->cipher_key.length = cipher_xform->key.length;
2000         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
2001                                              RTE_CACHE_LINE_SIZE);
2002         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
2003                 DPAA2_SEC_ERR("No Memory for auth key");
2004                 rte_free(session->cipher_key.data);
2005                 rte_free(priv);
2006                 return -1;
2007         }
2008         session->auth_key.length = auth_xform->key.length;
2009         memcpy(session->cipher_key.data, cipher_xform->key.data,
2010                cipher_xform->key.length);
2011         memcpy(session->auth_key.data, auth_xform->key.data,
2012                auth_xform->key.length);
2013
2014         authdata.key = (size_t)session->auth_key.data;
2015         authdata.keylen = session->auth_key.length;
2016         authdata.key_enc_flags = 0;
2017         authdata.key_type = RTA_DATA_IMM;
2018
2019         session->digest_length = auth_xform->digest_length;
2020
2021         switch (auth_xform->algo) {
2022         case RTE_CRYPTO_AUTH_SHA1_HMAC:
2023                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
2024                 authdata.algmode = OP_ALG_AAI_HMAC;
2025                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
2026                 break;
2027         case RTE_CRYPTO_AUTH_MD5_HMAC:
2028                 authdata.algtype = OP_ALG_ALGSEL_MD5;
2029                 authdata.algmode = OP_ALG_AAI_HMAC;
2030                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
2031                 break;
2032         case RTE_CRYPTO_AUTH_SHA224_HMAC:
2033                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
2034                 authdata.algmode = OP_ALG_AAI_HMAC;
2035                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
2036                 break;
2037         case RTE_CRYPTO_AUTH_SHA256_HMAC:
2038                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
2039                 authdata.algmode = OP_ALG_AAI_HMAC;
2040                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
2041                 break;
2042         case RTE_CRYPTO_AUTH_SHA384_HMAC:
2043                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
2044                 authdata.algmode = OP_ALG_AAI_HMAC;
2045                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
2046                 break;
2047         case RTE_CRYPTO_AUTH_SHA512_HMAC:
2048                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
2049                 authdata.algmode = OP_ALG_AAI_HMAC;
2050                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
2051                 break;
2052         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
2053         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
2054         case RTE_CRYPTO_AUTH_NULL:
2055         case RTE_CRYPTO_AUTH_SHA1:
2056         case RTE_CRYPTO_AUTH_SHA256:
2057         case RTE_CRYPTO_AUTH_SHA512:
2058         case RTE_CRYPTO_AUTH_SHA224:
2059         case RTE_CRYPTO_AUTH_SHA384:
2060         case RTE_CRYPTO_AUTH_MD5:
2061         case RTE_CRYPTO_AUTH_AES_GMAC:
2062         case RTE_CRYPTO_AUTH_KASUMI_F9:
2063         case RTE_CRYPTO_AUTH_AES_CMAC:
2064         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
2065         case RTE_CRYPTO_AUTH_ZUC_EIA3:
2066                 DPAA2_SEC_ERR("Crypto: Unsupported auth alg %u",
2067                               auth_xform->algo);
2068                 goto error_out;
2069         default:
2070                 DPAA2_SEC_ERR("Crypto: Undefined Auth specified %u",
2071                               auth_xform->algo);
2072                 goto error_out;
2073         }
2074         cipherdata.key = (size_t)session->cipher_key.data;
2075         cipherdata.keylen = session->cipher_key.length;
2076         cipherdata.key_enc_flags = 0;
2077         cipherdata.key_type = RTA_DATA_IMM;
2078
2079         switch (cipher_xform->algo) {
2080         case RTE_CRYPTO_CIPHER_AES_CBC:
2081                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
2082                 cipherdata.algmode = OP_ALG_AAI_CBC;
2083                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
2084                 break;
2085         case RTE_CRYPTO_CIPHER_3DES_CBC:
2086                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
2087                 cipherdata.algmode = OP_ALG_AAI_CBC;
2088                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
2089                 break;
2090         case RTE_CRYPTO_CIPHER_AES_CTR:
2091                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
2092                 cipherdata.algmode = OP_ALG_AAI_CTR;
2093                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
2094                 break;
2095         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
2096         case RTE_CRYPTO_CIPHER_NULL:
2097         case RTE_CRYPTO_CIPHER_3DES_ECB:
2098         case RTE_CRYPTO_CIPHER_AES_ECB:
2099         case RTE_CRYPTO_CIPHER_KASUMI_F8:
2100                 DPAA2_SEC_ERR("Crypto: Unsupported Cipher alg %u",
2101                               cipher_xform->algo);
2102                 goto error_out;
2103         default:
2104                 DPAA2_SEC_ERR("Crypto: Undefined Cipher specified %u",
2105                               cipher_xform->algo);
2106                 goto error_out;
2107         }
2108         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
2109                                 DIR_ENC : DIR_DEC;
2110
2111         priv->flc_desc[0].desc[0] = cipherdata.keylen;
2112         priv->flc_desc[0].desc[1] = authdata.keylen;
2113         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
2114                                MIN_JOB_DESC_SIZE,
2115                                (unsigned int *)priv->flc_desc[0].desc,
2116                                &priv->flc_desc[0].desc[2], 2);
2117
2118         if (err < 0) {
2119                 DPAA2_SEC_ERR("Crypto: Incorrect key lengths");
2120                 goto error_out;
2121         }
2122         if (priv->flc_desc[0].desc[2] & 1) {
2123                 cipherdata.key_type = RTA_DATA_IMM;
2124         } else {
2125                 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
2126                 cipherdata.key_type = RTA_DATA_PTR;
2127         }
2128         if (priv->flc_desc[0].desc[2] & (1 << 1)) {
2129                 authdata.key_type = RTA_DATA_IMM;
2130         } else {
2131                 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
2132                 authdata.key_type = RTA_DATA_PTR;
2133         }
2134         priv->flc_desc[0].desc[0] = 0;
2135         priv->flc_desc[0].desc[1] = 0;
2136         priv->flc_desc[0].desc[2] = 0;
2137
2138         if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
2139                 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
2140                                               0, &cipherdata, &authdata,
2141                                               session->iv.length,
2142                                               ctxt->auth_only_len,
2143                                               session->digest_length,
2144                                               session->dir);
2145                 if (bufsize < 0) {
2146                         DPAA2_SEC_ERR("Crypto: Invalid buffer length");
2147                         goto error_out;
2148                 }
2149         } else {
2150                 DPAA2_SEC_ERR("Hash before cipher not supported");
2151                 goto error_out;
2152         }
2153
2154         flc->word1_sdl = (uint8_t)bufsize;
2155         flc->word2_rflc_31_0 = lower_32_bits(
2156                         (size_t)&(((struct dpaa2_sec_qp *)
2157                         dev->data->queue_pairs[0])->rx_vq));
2158         flc->word3_rflc_63_32 = upper_32_bits(
2159                         (size_t)&(((struct dpaa2_sec_qp *)
2160                         dev->data->queue_pairs[0])->rx_vq));
2161         session->ctxt = priv;
2162         for (i = 0; i < bufsize; i++)
2163                 DPAA2_SEC_DEBUG("DESC[%d]:0x%x",
2164                             i, priv->flc_desc[0].desc[i]);
2165
2166         return 0;
2167
2168 error_out:
2169         rte_free(session->cipher_key.data);
2170         rte_free(session->auth_key.data);
2171         rte_free(priv);
2172         return -1;
2173 }
2174
2175 static int
2176 dpaa2_sec_set_session_parameters(struct rte_cryptodev *dev,
2177                             struct rte_crypto_sym_xform *xform, void *sess)
2178 {
2179         dpaa2_sec_session *session = sess;
2180
2181         PMD_INIT_FUNC_TRACE();
2182
2183         if (unlikely(sess == NULL)) {
2184                 DPAA2_SEC_ERR("Invalid session struct");
2185                 return -1;
2186         }
2187
2188         memset(session, 0, sizeof(dpaa2_sec_session));
2189         /* Default IV length = 0 */
2190         session->iv.length = 0;
2191
2192         /* Cipher Only */
2193         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
2194                 session->ctxt_type = DPAA2_SEC_CIPHER;
2195                 dpaa2_sec_cipher_init(dev, xform, session);
2196
2197         /* Authentication Only */
2198         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
2199                    xform->next == NULL) {
2200                 session->ctxt_type = DPAA2_SEC_AUTH;
2201                 dpaa2_sec_auth_init(dev, xform, session);
2202
2203         /* Cipher then Authenticate */
2204         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
2205                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
2206                 session->ext_params.aead_ctxt.auth_cipher_text = true;
2207                 dpaa2_sec_aead_chain_init(dev, xform, session);
2208
2209         /* Authenticate then Cipher */
2210         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
2211                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
2212                 session->ext_params.aead_ctxt.auth_cipher_text = false;
2213                 dpaa2_sec_aead_chain_init(dev, xform, session);
2214
2215         /* AEAD operation for AES-GCM kind of Algorithms */
2216         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
2217                    xform->next == NULL) {
2218                 dpaa2_sec_aead_init(dev, xform, session);
2219
2220         } else {
2221                 DPAA2_SEC_ERR("Invalid crypto type");
2222                 return -EINVAL;
2223         }
2224
2225         return 0;
2226 }
2227
2228 static int
2229 dpaa2_sec_ipsec_aead_init(struct rte_crypto_aead_xform *aead_xform,
2230                         dpaa2_sec_session *session,
2231                         struct alginfo *aeaddata)
2232 {
2233         PMD_INIT_FUNC_TRACE();
2234
2235         session->aead_key.data = rte_zmalloc(NULL, aead_xform->key.length,
2236                                                RTE_CACHE_LINE_SIZE);
2237         if (session->aead_key.data == NULL && aead_xform->key.length > 0) {
2238                 DPAA2_SEC_ERR("No Memory for aead key");
2239                 return -1;
2240         }
2241         memcpy(session->aead_key.data, aead_xform->key.data,
2242                aead_xform->key.length);
2243
2244         session->digest_length = aead_xform->digest_length;
2245         session->aead_key.length = aead_xform->key.length;
2246
2247         aeaddata->key = (size_t)session->aead_key.data;
2248         aeaddata->keylen = session->aead_key.length;
2249         aeaddata->key_enc_flags = 0;
2250         aeaddata->key_type = RTA_DATA_IMM;
2251
2252         switch (aead_xform->algo) {
2253         case RTE_CRYPTO_AEAD_AES_GCM:
2254                 aeaddata->algtype = OP_ALG_ALGSEL_AES;
2255                 aeaddata->algmode = OP_ALG_AAI_GCM;
2256                 session->aead_alg = RTE_CRYPTO_AEAD_AES_GCM;
2257                 break;
2258         case RTE_CRYPTO_AEAD_AES_CCM:
2259                 aeaddata->algtype = OP_ALG_ALGSEL_AES;
2260                 aeaddata->algmode = OP_ALG_AAI_CCM;
2261                 session->aead_alg = RTE_CRYPTO_AEAD_AES_CCM;
2262                 break;
2263         default:
2264                 DPAA2_SEC_ERR("Crypto: Undefined AEAD specified %u",
2265                               aead_xform->algo);
2266                 return -1;
2267         }
2268         session->dir = (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
2269                                 DIR_ENC : DIR_DEC;
2270
2271         return 0;
2272 }
2273
2274 static int
2275 dpaa2_sec_ipsec_proto_init(struct rte_crypto_cipher_xform *cipher_xform,
2276         struct rte_crypto_auth_xform *auth_xform,
2277         dpaa2_sec_session *session,
2278         struct alginfo *cipherdata,
2279         struct alginfo *authdata)
2280 {
2281         if (cipher_xform) {
2282                 session->cipher_key.data = rte_zmalloc(NULL,
2283                                                        cipher_xform->key.length,
2284                                                        RTE_CACHE_LINE_SIZE);
2285                 if (session->cipher_key.data == NULL &&
2286                                 cipher_xform->key.length > 0) {
2287                         DPAA2_SEC_ERR("No Memory for cipher key");
2288                         return -ENOMEM;
2289                 }
2290
2291                 session->cipher_key.length = cipher_xform->key.length;
2292                 memcpy(session->cipher_key.data, cipher_xform->key.data,
2293                                 cipher_xform->key.length);
2294                 session->cipher_alg = cipher_xform->algo;
2295         } else {
2296                 session->cipher_key.data = NULL;
2297                 session->cipher_key.length = 0;
2298                 session->cipher_alg = RTE_CRYPTO_CIPHER_NULL;
2299         }
2300
2301         if (auth_xform) {
2302                 session->auth_key.data = rte_zmalloc(NULL,
2303                                                 auth_xform->key.length,
2304                                                 RTE_CACHE_LINE_SIZE);
2305                 if (session->auth_key.data == NULL &&
2306                                 auth_xform->key.length > 0) {
2307                         DPAA2_SEC_ERR("No Memory for auth key");
2308                         return -ENOMEM;
2309                 }
2310                 session->auth_key.length = auth_xform->key.length;
2311                 memcpy(session->auth_key.data, auth_xform->key.data,
2312                                 auth_xform->key.length);
2313                 session->auth_alg = auth_xform->algo;
2314         } else {
2315                 session->auth_key.data = NULL;
2316                 session->auth_key.length = 0;
2317                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
2318         }
2319
2320         authdata->key = (size_t)session->auth_key.data;
2321         authdata->keylen = session->auth_key.length;
2322         authdata->key_enc_flags = 0;
2323         authdata->key_type = RTA_DATA_IMM;
2324         switch (session->auth_alg) {
2325         case RTE_CRYPTO_AUTH_SHA1_HMAC:
2326                 authdata->algtype = OP_PCL_IPSEC_HMAC_SHA1_96;
2327                 authdata->algmode = OP_ALG_AAI_HMAC;
2328                 break;
2329         case RTE_CRYPTO_AUTH_MD5_HMAC:
2330                 authdata->algtype = OP_PCL_IPSEC_HMAC_MD5_96;
2331                 authdata->algmode = OP_ALG_AAI_HMAC;
2332                 break;
2333         case RTE_CRYPTO_AUTH_SHA256_HMAC:
2334                 authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_256_128;
2335                 authdata->algmode = OP_ALG_AAI_HMAC;
2336                 break;
2337         case RTE_CRYPTO_AUTH_SHA384_HMAC:
2338                 authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_384_192;
2339                 authdata->algmode = OP_ALG_AAI_HMAC;
2340                 break;
2341         case RTE_CRYPTO_AUTH_SHA512_HMAC:
2342                 authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_512_256;
2343                 authdata->algmode = OP_ALG_AAI_HMAC;
2344                 break;
2345         case RTE_CRYPTO_AUTH_AES_CMAC:
2346                 authdata->algtype = OP_PCL_IPSEC_AES_CMAC_96;
2347                 break;
2348         case RTE_CRYPTO_AUTH_NULL:
2349                 authdata->algtype = OP_PCL_IPSEC_HMAC_NULL;
2350                 break;
2351         case RTE_CRYPTO_AUTH_SHA224_HMAC:
2352         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
2353         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
2354         case RTE_CRYPTO_AUTH_SHA1:
2355         case RTE_CRYPTO_AUTH_SHA256:
2356         case RTE_CRYPTO_AUTH_SHA512:
2357         case RTE_CRYPTO_AUTH_SHA224:
2358         case RTE_CRYPTO_AUTH_SHA384:
2359         case RTE_CRYPTO_AUTH_MD5:
2360         case RTE_CRYPTO_AUTH_AES_GMAC:
2361         case RTE_CRYPTO_AUTH_KASUMI_F9:
2362         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
2363         case RTE_CRYPTO_AUTH_ZUC_EIA3:
2364                 DPAA2_SEC_ERR("Crypto: Unsupported auth alg %u",
2365                               session->auth_alg);
2366                 return -1;
2367         default:
2368                 DPAA2_SEC_ERR("Crypto: Undefined Auth specified %u",
2369                               session->auth_alg);
2370                 return -1;
2371         }
2372         cipherdata->key = (size_t)session->cipher_key.data;
2373         cipherdata->keylen = session->cipher_key.length;
2374         cipherdata->key_enc_flags = 0;
2375         cipherdata->key_type = RTA_DATA_IMM;
2376
2377         switch (session->cipher_alg) {
2378         case RTE_CRYPTO_CIPHER_AES_CBC:
2379                 cipherdata->algtype = OP_PCL_IPSEC_AES_CBC;
2380                 cipherdata->algmode = OP_ALG_AAI_CBC;
2381                 break;
2382         case RTE_CRYPTO_CIPHER_3DES_CBC:
2383                 cipherdata->algtype = OP_PCL_IPSEC_3DES;
2384                 cipherdata->algmode = OP_ALG_AAI_CBC;
2385                 break;
2386         case RTE_CRYPTO_CIPHER_AES_CTR:
2387                 cipherdata->algtype = OP_PCL_IPSEC_AES_CTR;
2388                 cipherdata->algmode = OP_ALG_AAI_CTR;
2389                 break;
2390         case RTE_CRYPTO_CIPHER_NULL:
2391                 cipherdata->algtype = OP_PCL_IPSEC_NULL;
2392                 break;
2393         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
2394         case RTE_CRYPTO_CIPHER_3DES_ECB:
2395         case RTE_CRYPTO_CIPHER_AES_ECB:
2396         case RTE_CRYPTO_CIPHER_KASUMI_F8:
2397                 DPAA2_SEC_ERR("Crypto: Unsupported Cipher alg %u",
2398                               session->cipher_alg);
2399                 return -1;
2400         default:
2401                 DPAA2_SEC_ERR("Crypto: Undefined Cipher specified %u",
2402                               session->cipher_alg);
2403                 return -1;
2404         }
2405
2406         return 0;
2407 }
2408
2409 #ifdef RTE_LIBRTE_SECURITY_TEST
2410 static uint8_t aes_cbc_iv[] = {
2411         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
2412         0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f };
2413 #endif
2414
2415 static int
2416 dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
2417                             struct rte_security_session_conf *conf,
2418                             void *sess)
2419 {
2420         struct rte_security_ipsec_xform *ipsec_xform = &conf->ipsec;
2421         struct rte_crypto_cipher_xform *cipher_xform = NULL;
2422         struct rte_crypto_auth_xform *auth_xform = NULL;
2423         struct rte_crypto_aead_xform *aead_xform = NULL;
2424         dpaa2_sec_session *session = (dpaa2_sec_session *)sess;
2425         struct ctxt_priv *priv;
2426         struct ipsec_encap_pdb encap_pdb;
2427         struct ipsec_decap_pdb decap_pdb;
2428         struct alginfo authdata, cipherdata;
2429         int bufsize;
2430         struct sec_flow_context *flc;
2431         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
2432         int ret = -1;
2433
2434         PMD_INIT_FUNC_TRACE();
2435
2436         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
2437                                 sizeof(struct ctxt_priv) +
2438                                 sizeof(struct sec_flc_desc),
2439                                 RTE_CACHE_LINE_SIZE);
2440
2441         if (priv == NULL) {
2442                 DPAA2_SEC_ERR("No memory for priv CTXT");
2443                 return -ENOMEM;
2444         }
2445
2446         priv->fle_pool = dev_priv->fle_pool;
2447         flc = &priv->flc_desc[0].flc;
2448
2449         memset(session, 0, sizeof(dpaa2_sec_session));
2450
2451         if (conf->crypto_xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
2452                 cipher_xform = &conf->crypto_xform->cipher;
2453                 if (conf->crypto_xform->next)
2454                         auth_xform = &conf->crypto_xform->next->auth;
2455                 ret = dpaa2_sec_ipsec_proto_init(cipher_xform, auth_xform,
2456                                         session, &cipherdata, &authdata);
2457         } else if (conf->crypto_xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
2458                 auth_xform = &conf->crypto_xform->auth;
2459                 if (conf->crypto_xform->next)
2460                         cipher_xform = &conf->crypto_xform->next->cipher;
2461                 ret = dpaa2_sec_ipsec_proto_init(cipher_xform, auth_xform,
2462                                         session, &cipherdata, &authdata);
2463         } else if (conf->crypto_xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
2464                 aead_xform = &conf->crypto_xform->aead;
2465                 ret = dpaa2_sec_ipsec_aead_init(aead_xform,
2466                                         session, &cipherdata);
2467         } else {
2468                 DPAA2_SEC_ERR("XFORM not specified");
2469                 ret = -EINVAL;
2470                 goto out;
2471         }
2472         if (ret) {
2473                 DPAA2_SEC_ERR("Failed to process xform");
2474                 goto out;
2475         }
2476
2477         session->ctxt_type = DPAA2_SEC_IPSEC;
2478         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
2479                 struct ip ip4_hdr;
2480
2481                 flc->dhr = SEC_FLC_DHR_OUTBOUND;
2482                 ip4_hdr.ip_v = IPVERSION;
2483                 ip4_hdr.ip_hl = 5;
2484                 ip4_hdr.ip_len = rte_cpu_to_be_16(sizeof(ip4_hdr));
2485                 ip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;
2486                 ip4_hdr.ip_id = 0;
2487                 ip4_hdr.ip_off = 0;
2488                 ip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;
2489                 ip4_hdr.ip_p = IPPROTO_ESP;
2490                 ip4_hdr.ip_sum = 0;
2491                 ip4_hdr.ip_src = ipsec_xform->tunnel.ipv4.src_ip;
2492                 ip4_hdr.ip_dst = ipsec_xform->tunnel.ipv4.dst_ip;
2493                 ip4_hdr.ip_sum = calc_chksum((uint16_t *)(void *)&ip4_hdr,
2494                         sizeof(struct ip));
2495
2496                 /* For Sec Proto only one descriptor is required. */
2497                 memset(&encap_pdb, 0, sizeof(struct ipsec_encap_pdb));
2498                 encap_pdb.options = (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |
2499                         PDBOPTS_ESP_OIHI_PDB_INL |
2500                         PDBOPTS_ESP_IVSRC |
2501                         PDBHMO_ESP_ENCAP_DTTL |
2502                         PDBHMO_ESP_SNR;
2503                 encap_pdb.spi = ipsec_xform->spi;
2504                 encap_pdb.ip_hdr_len = sizeof(struct ip);
2505
2506                 session->dir = DIR_ENC;
2507                 bufsize = cnstr_shdsc_ipsec_new_encap(priv->flc_desc[0].desc,
2508                                 1, 0, SHR_SERIAL, &encap_pdb,
2509                                 (uint8_t *)&ip4_hdr,
2510                                 &cipherdata, &authdata);
2511         } else if (ipsec_xform->direction ==
2512                         RTE_SECURITY_IPSEC_SA_DIR_INGRESS) {
2513                 flc->dhr = SEC_FLC_DHR_INBOUND;
2514                 memset(&decap_pdb, 0, sizeof(struct ipsec_decap_pdb));
2515                 decap_pdb.options = sizeof(struct ip) << 16;
2516                 session->dir = DIR_DEC;
2517                 bufsize = cnstr_shdsc_ipsec_new_decap(priv->flc_desc[0].desc,
2518                                 1, 0, SHR_SERIAL,
2519                                 &decap_pdb, &cipherdata, &authdata);
2520         } else
2521                 goto out;
2522
2523         if (bufsize < 0) {
2524                 DPAA2_SEC_ERR("Crypto: Invalid buffer length");
2525                 goto out;
2526         }
2527
2528         flc->word1_sdl = (uint8_t)bufsize;
2529
2530         /* Enable the stashing control bit */
2531         DPAA2_SET_FLC_RSC(flc);
2532         flc->word2_rflc_31_0 = lower_32_bits(
2533                         (size_t)&(((struct dpaa2_sec_qp *)
2534                         dev->data->queue_pairs[0])->rx_vq) | 0x14);
2535         flc->word3_rflc_63_32 = upper_32_bits(
2536                         (size_t)&(((struct dpaa2_sec_qp *)
2537                         dev->data->queue_pairs[0])->rx_vq));
2538
2539         /* Set EWS bit i.e. enable write-safe */
2540         DPAA2_SET_FLC_EWS(flc);
2541         /* Set BS = 1 i.e reuse input buffers as output buffers */
2542         DPAA2_SET_FLC_REUSE_BS(flc);
2543         /* Set FF = 10; reuse input buffers if they provide sufficient space */
2544         DPAA2_SET_FLC_REUSE_FF(flc);
2545
2546         session->ctxt = priv;
2547
2548         return 0;
2549 out:
2550         rte_free(session->auth_key.data);
2551         rte_free(session->cipher_key.data);
2552         rte_free(priv);
2553         return ret;
2554 }
2555
2556 static int
2557 dpaa2_sec_security_session_create(void *dev,
2558                                   struct rte_security_session_conf *conf,
2559                                   struct rte_security_session *sess,
2560                                   struct rte_mempool *mempool)
2561 {
2562         void *sess_private_data;
2563         struct rte_cryptodev *cdev = (struct rte_cryptodev *)dev;
2564         int ret;
2565
2566         if (rte_mempool_get(mempool, &sess_private_data)) {
2567                 DPAA2_SEC_ERR("Couldn't get object from session mempool");
2568                 return -ENOMEM;
2569         }
2570
2571         switch (conf->protocol) {
2572         case RTE_SECURITY_PROTOCOL_IPSEC:
2573                 ret = dpaa2_sec_set_ipsec_session(cdev, conf,
2574                                 sess_private_data);
2575                 break;
2576         case RTE_SECURITY_PROTOCOL_MACSEC:
2577                 return -ENOTSUP;
2578         default:
2579                 return -EINVAL;
2580         }
2581         if (ret != 0) {
2582                 DPAA2_SEC_ERR("Failed to configure session parameters");
2583                 /* Return session to mempool */
2584                 rte_mempool_put(mempool, sess_private_data);
2585                 return ret;
2586         }
2587
2588         set_sec_session_private_data(sess, sess_private_data);
2589
2590         return ret;
2591 }
2592
2593 /** Clear the memory of session so it doesn't leave key material behind */
2594 static int
2595 dpaa2_sec_security_session_destroy(void *dev __rte_unused,
2596                 struct rte_security_session *sess)
2597 {
2598         PMD_INIT_FUNC_TRACE();
2599         void *sess_priv = get_sec_session_private_data(sess);
2600
2601         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
2602
2603         if (sess_priv) {
2604                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
2605
2606                 rte_free(s->ctxt);
2607                 rte_free(s->cipher_key.data);
2608                 rte_free(s->auth_key.data);
2609                 memset(sess, 0, sizeof(dpaa2_sec_session));
2610                 set_sec_session_private_data(sess, NULL);
2611                 rte_mempool_put(sess_mp, sess_priv);
2612         }
2613         return 0;
2614 }
2615
2616 static int
2617 dpaa2_sec_sym_session_configure(struct rte_cryptodev *dev,
2618                 struct rte_crypto_sym_xform *xform,
2619                 struct rte_cryptodev_sym_session *sess,
2620                 struct rte_mempool *mempool)
2621 {
2622         void *sess_private_data;
2623         int ret;
2624
2625         if (rte_mempool_get(mempool, &sess_private_data)) {
2626                 DPAA2_SEC_ERR("Couldn't get object from session mempool");
2627                 return -ENOMEM;
2628         }
2629
2630         ret = dpaa2_sec_set_session_parameters(dev, xform, sess_private_data);
2631         if (ret != 0) {
2632                 DPAA2_SEC_ERR("Failed to configure session parameters");
2633                 /* Return session to mempool */
2634                 rte_mempool_put(mempool, sess_private_data);
2635                 return ret;
2636         }
2637
2638         set_sym_session_private_data(sess, dev->driver_id,
2639                 sess_private_data);
2640
2641         return 0;
2642 }
2643
2644 /** Clear the memory of session so it doesn't leave key material behind */
2645 static void
2646 dpaa2_sec_sym_session_clear(struct rte_cryptodev *dev,
2647                 struct rte_cryptodev_sym_session *sess)
2648 {
2649         PMD_INIT_FUNC_TRACE();
2650         uint8_t index = dev->driver_id;
2651         void *sess_priv = get_sym_session_private_data(sess, index);
2652         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
2653
2654         if (sess_priv) {
2655                 rte_free(s->ctxt);
2656                 rte_free(s->cipher_key.data);
2657                 rte_free(s->auth_key.data);
2658                 memset(sess, 0, sizeof(dpaa2_sec_session));
2659                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
2660                 set_sym_session_private_data(sess, index, NULL);
2661                 rte_mempool_put(sess_mp, sess_priv);
2662         }
2663 }
2664
2665 static int
2666 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
2667                         struct rte_cryptodev_config *config __rte_unused)
2668 {
2669         PMD_INIT_FUNC_TRACE();
2670
2671         return 0;
2672 }
2673
2674 static int
2675 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
2676 {
2677         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2678         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2679         struct dpseci_attr attr;
2680         struct dpaa2_queue *dpaa2_q;
2681         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2682                                         dev->data->queue_pairs;
2683         struct dpseci_rx_queue_attr rx_attr;
2684         struct dpseci_tx_queue_attr tx_attr;
2685         int ret, i;
2686
2687         PMD_INIT_FUNC_TRACE();
2688
2689         memset(&attr, 0, sizeof(struct dpseci_attr));
2690
2691         ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
2692         if (ret) {
2693                 DPAA2_SEC_ERR("DPSECI with HW_ID = %d ENABLE FAILED",
2694                               priv->hw_id);
2695                 goto get_attr_failure;
2696         }
2697         ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
2698         if (ret) {
2699                 DPAA2_SEC_ERR("DPSEC ATTRIBUTE READ FAILED, disabling DPSEC");
2700                 goto get_attr_failure;
2701         }
2702         for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
2703                 dpaa2_q = &qp[i]->rx_vq;
2704                 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
2705                                     &rx_attr);
2706                 dpaa2_q->fqid = rx_attr.fqid;
2707                 DPAA2_SEC_DEBUG("rx_fqid: %d", dpaa2_q->fqid);
2708         }
2709         for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
2710                 dpaa2_q = &qp[i]->tx_vq;
2711                 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
2712                                     &tx_attr);
2713                 dpaa2_q->fqid = tx_attr.fqid;
2714                 DPAA2_SEC_DEBUG("tx_fqid: %d", dpaa2_q->fqid);
2715         }
2716
2717         return 0;
2718 get_attr_failure:
2719         dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
2720         return -1;
2721 }
2722
2723 static void
2724 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
2725 {
2726         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2727         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2728         int ret;
2729
2730         PMD_INIT_FUNC_TRACE();
2731
2732         ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
2733         if (ret) {
2734                 DPAA2_SEC_ERR("Failure in disabling dpseci %d device",
2735                              priv->hw_id);
2736                 return;
2737         }
2738
2739         ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
2740         if (ret < 0) {
2741                 DPAA2_SEC_ERR("SEC Device cannot be reset:Error = %0x", ret);
2742                 return;
2743         }
2744 }
2745
2746 static int
2747 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
2748 {
2749         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2750         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2751         int ret;
2752
2753         PMD_INIT_FUNC_TRACE();
2754
2755         /* Function is reverse of dpaa2_sec_dev_init.
2756          * It does the following:
2757          * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
2758          * 2. Close the DPSECI device
2759          * 3. Free the allocated resources.
2760          */
2761
2762         /*Close the device at underlying layer*/
2763         ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
2764         if (ret) {
2765                 DPAA2_SEC_ERR("Failure closing dpseci device: err(%d)", ret);
2766                 return -1;
2767         }
2768
2769         /*Free the allocated memory for ethernet private data and dpseci*/
2770         priv->hw = NULL;
2771         rte_free(dpseci);
2772
2773         return 0;
2774 }
2775
2776 static void
2777 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
2778                         struct rte_cryptodev_info *info)
2779 {
2780         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
2781
2782         PMD_INIT_FUNC_TRACE();
2783         if (info != NULL) {
2784                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
2785                 info->feature_flags = dev->feature_flags;
2786                 info->capabilities = dpaa2_sec_capabilities;
2787                 /* No limit of number of sessions */
2788                 info->sym.max_nb_sessions = 0;
2789                 info->driver_id = cryptodev_driver_id;
2790         }
2791 }
2792
2793 static
2794 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
2795                          struct rte_cryptodev_stats *stats)
2796 {
2797         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2798         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2799         struct dpseci_sec_counters counters = {0};
2800         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2801                                         dev->data->queue_pairs;
2802         int ret, i;
2803
2804         PMD_INIT_FUNC_TRACE();
2805         if (stats == NULL) {
2806                 DPAA2_SEC_ERR("Invalid stats ptr NULL");
2807                 return;
2808         }
2809         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
2810                 if (qp[i] == NULL) {
2811                         DPAA2_SEC_DEBUG("Uninitialised queue pair");
2812                         continue;
2813                 }
2814
2815                 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
2816                 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
2817                 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
2818                 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
2819         }
2820
2821         ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
2822                                       &counters);
2823         if (ret) {
2824                 DPAA2_SEC_ERR("SEC counters failed");
2825         } else {
2826                 DPAA2_SEC_INFO("dpseci hardware stats:"
2827                             "\n\tNum of Requests Dequeued = %" PRIu64
2828                             "\n\tNum of Outbound Encrypt Requests = %" PRIu64
2829                             "\n\tNum of Inbound Decrypt Requests = %" PRIu64
2830                             "\n\tNum of Outbound Bytes Encrypted = %" PRIu64
2831                             "\n\tNum of Outbound Bytes Protected = %" PRIu64
2832                             "\n\tNum of Inbound Bytes Decrypted = %" PRIu64
2833                             "\n\tNum of Inbound Bytes Validated = %" PRIu64,
2834                             counters.dequeued_requests,
2835                             counters.ob_enc_requests,
2836                             counters.ib_dec_requests,
2837                             counters.ob_enc_bytes,
2838                             counters.ob_prot_bytes,
2839                             counters.ib_dec_bytes,
2840                             counters.ib_valid_bytes);
2841         }
2842 }
2843
2844 static
2845 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
2846 {
2847         int i;
2848         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2849                                    (dev->data->queue_pairs);
2850
2851         PMD_INIT_FUNC_TRACE();
2852
2853         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
2854                 if (qp[i] == NULL) {
2855                         DPAA2_SEC_DEBUG("Uninitialised queue pair");
2856                         continue;
2857                 }
2858                 qp[i]->tx_vq.rx_pkts = 0;
2859                 qp[i]->tx_vq.tx_pkts = 0;
2860                 qp[i]->tx_vq.err_pkts = 0;
2861                 qp[i]->rx_vq.rx_pkts = 0;
2862                 qp[i]->rx_vq.tx_pkts = 0;
2863                 qp[i]->rx_vq.err_pkts = 0;
2864         }
2865 }
2866
2867 static void __attribute__((hot))
2868 dpaa2_sec_process_parallel_event(struct qbman_swp *swp,
2869                                  const struct qbman_fd *fd,
2870                                  const struct qbman_result *dq,
2871                                  struct dpaa2_queue *rxq,
2872                                  struct rte_event *ev)
2873 {
2874         /* Prefetching mbuf */
2875         rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-
2876                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size));
2877
2878         /* Prefetching ipsec crypto_op stored in priv data of mbuf */
2879         rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-64));
2880
2881         ev->flow_id = rxq->ev.flow_id;
2882         ev->sub_event_type = rxq->ev.sub_event_type;
2883         ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
2884         ev->op = RTE_EVENT_OP_NEW;
2885         ev->sched_type = rxq->ev.sched_type;
2886         ev->queue_id = rxq->ev.queue_id;
2887         ev->priority = rxq->ev.priority;
2888         ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
2889                                 (rxq->dev))->driver_id);
2890
2891         qbman_swp_dqrr_consume(swp, dq);
2892 }
2893 static void
2894 dpaa2_sec_process_atomic_event(struct qbman_swp *swp __attribute__((unused)),
2895                                  const struct qbman_fd *fd,
2896                                  const struct qbman_result *dq,
2897                                  struct dpaa2_queue *rxq,
2898                                  struct rte_event *ev)
2899 {
2900         uint8_t dqrr_index;
2901         struct rte_crypto_op *crypto_op = (struct rte_crypto_op *)ev->event_ptr;
2902         /* Prefetching mbuf */
2903         rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-
2904                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size));
2905
2906         /* Prefetching ipsec crypto_op stored in priv data of mbuf */
2907         rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-64));
2908
2909         ev->flow_id = rxq->ev.flow_id;
2910         ev->sub_event_type = rxq->ev.sub_event_type;
2911         ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
2912         ev->op = RTE_EVENT_OP_NEW;
2913         ev->sched_type = rxq->ev.sched_type;
2914         ev->queue_id = rxq->ev.queue_id;
2915         ev->priority = rxq->ev.priority;
2916
2917         ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
2918                                 (rxq->dev))->driver_id);
2919         dqrr_index = qbman_get_dqrr_idx(dq);
2920         crypto_op->sym->m_src->seqn = dqrr_index + 1;
2921         DPAA2_PER_LCORE_DQRR_SIZE++;
2922         DPAA2_PER_LCORE_DQRR_HELD |= 1 << dqrr_index;
2923         DPAA2_PER_LCORE_DQRR_MBUF(dqrr_index) = crypto_op->sym->m_src;
2924 }
2925
2926 int
2927 dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
2928                 int qp_id,
2929                 uint16_t dpcon_id,
2930                 const struct rte_event *event)
2931 {
2932         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2933         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2934         struct dpaa2_sec_qp *qp = dev->data->queue_pairs[qp_id];
2935         struct dpseci_rx_queue_cfg cfg;
2936         int ret;
2937
2938         if (event->sched_type == RTE_SCHED_TYPE_PARALLEL)
2939                 qp->rx_vq.cb = dpaa2_sec_process_parallel_event;
2940         else if (event->sched_type == RTE_SCHED_TYPE_ATOMIC)
2941                 qp->rx_vq.cb = dpaa2_sec_process_atomic_event;
2942         else
2943                 return -EINVAL;
2944
2945         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
2946         cfg.options = DPSECI_QUEUE_OPT_DEST;
2947         cfg.dest_cfg.dest_type = DPSECI_DEST_DPCON;
2948         cfg.dest_cfg.dest_id = dpcon_id;
2949         cfg.dest_cfg.priority = event->priority;
2950
2951         cfg.options |= DPSECI_QUEUE_OPT_USER_CTX;
2952         cfg.user_ctx = (size_t)(qp);
2953         if (event->sched_type == RTE_SCHED_TYPE_ATOMIC) {
2954                 cfg.options |= DPSECI_QUEUE_OPT_ORDER_PRESERVATION;
2955                 cfg.order_preservation_en = 1;
2956         }
2957         ret = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
2958                                   qp_id, &cfg);
2959         if (ret) {
2960                 RTE_LOG(ERR, PMD, "Error in dpseci_set_queue: ret: %d\n", ret);
2961                 return ret;
2962         }
2963
2964         memcpy(&qp->rx_vq.ev, event, sizeof(struct rte_event));
2965
2966         return 0;
2967 }
2968
2969 int
2970 dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev,
2971                         int qp_id)
2972 {
2973         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2974         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2975         struct dpseci_rx_queue_cfg cfg;
2976         int ret;
2977
2978         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
2979         cfg.options = DPSECI_QUEUE_OPT_DEST;
2980         cfg.dest_cfg.dest_type = DPSECI_DEST_NONE;
2981
2982         ret = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
2983                                   qp_id, &cfg);
2984         if (ret)
2985                 RTE_LOG(ERR, PMD, "Error in dpseci_set_queue: ret: %d\n", ret);
2986
2987         return ret;
2988 }
2989
2990 static struct rte_cryptodev_ops crypto_ops = {
2991         .dev_configure        = dpaa2_sec_dev_configure,
2992         .dev_start            = dpaa2_sec_dev_start,
2993         .dev_stop             = dpaa2_sec_dev_stop,
2994         .dev_close            = dpaa2_sec_dev_close,
2995         .dev_infos_get        = dpaa2_sec_dev_infos_get,
2996         .stats_get            = dpaa2_sec_stats_get,
2997         .stats_reset          = dpaa2_sec_stats_reset,
2998         .queue_pair_setup     = dpaa2_sec_queue_pair_setup,
2999         .queue_pair_release   = dpaa2_sec_queue_pair_release,
3000         .queue_pair_count     = dpaa2_sec_queue_pair_count,
3001         .sym_session_get_size     = dpaa2_sec_sym_session_get_size,
3002         .sym_session_configure    = dpaa2_sec_sym_session_configure,
3003         .sym_session_clear        = dpaa2_sec_sym_session_clear,
3004 };
3005
3006 static const struct rte_security_capability *
3007 dpaa2_sec_capabilities_get(void *device __rte_unused)
3008 {
3009         return dpaa2_sec_security_cap;
3010 }
3011
3012 struct rte_security_ops dpaa2_sec_security_ops = {
3013         .session_create = dpaa2_sec_security_session_create,
3014         .session_update = NULL,
3015         .session_stats_get = NULL,
3016         .session_destroy = dpaa2_sec_security_session_destroy,
3017         .set_pkt_metadata = NULL,
3018         .capabilities_get = dpaa2_sec_capabilities_get
3019 };
3020
3021 static int
3022 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
3023 {
3024         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
3025
3026         rte_free(dev->security_ctx);
3027
3028         rte_mempool_free(internals->fle_pool);
3029
3030         DPAA2_SEC_INFO("Closing DPAA2_SEC device %s on numa socket %u",
3031                        dev->data->name, rte_socket_id());
3032
3033         return 0;
3034 }
3035
3036 static int
3037 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
3038 {
3039         struct dpaa2_sec_dev_private *internals;
3040         struct rte_device *dev = cryptodev->device;
3041         struct rte_dpaa2_device *dpaa2_dev;
3042         struct rte_security_ctx *security_instance;
3043         struct fsl_mc_io *dpseci;
3044         uint16_t token;
3045         struct dpseci_attr attr;
3046         int retcode, hw_id;
3047         char str[20];
3048
3049         PMD_INIT_FUNC_TRACE();
3050         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
3051         if (dpaa2_dev == NULL) {
3052                 DPAA2_SEC_ERR("DPAA2 SEC device not found");
3053                 return -1;
3054         }
3055         hw_id = dpaa2_dev->object_id;
3056
3057         cryptodev->driver_id = cryptodev_driver_id;
3058         cryptodev->dev_ops = &crypto_ops;
3059
3060         cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
3061         cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
3062         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
3063                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
3064                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
3065                         RTE_CRYPTODEV_FF_SECURITY |
3066                         RTE_CRYPTODEV_FF_IN_PLACE_SGL |
3067                         RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
3068                         RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
3069                         RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT |
3070                         RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
3071
3072         internals = cryptodev->data->dev_private;
3073
3074         /*
3075          * For secondary processes, we don't initialise any further as primary
3076          * has already done this work. Only check we don't need a different
3077          * RX function
3078          */
3079         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
3080                 DPAA2_SEC_DEBUG("Device already init by primary process");
3081                 return 0;
3082         }
3083
3084         /* Initialize security_ctx only for primary process*/
3085         security_instance = rte_malloc("rte_security_instances_ops",
3086                                 sizeof(struct rte_security_ctx), 0);
3087         if (security_instance == NULL)
3088                 return -ENOMEM;
3089         security_instance->device = (void *)cryptodev;
3090         security_instance->ops = &dpaa2_sec_security_ops;
3091         security_instance->sess_cnt = 0;
3092         cryptodev->security_ctx = security_instance;
3093
3094         /*Open the rte device via MC and save the handle for further use*/
3095         dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
3096                                 sizeof(struct fsl_mc_io), 0);
3097         if (!dpseci) {
3098                 DPAA2_SEC_ERR(
3099                         "Error in allocating the memory for dpsec object");
3100                 return -1;
3101         }
3102         dpseci->regs = rte_mcp_ptr_list[0];
3103
3104         retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
3105         if (retcode != 0) {
3106                 DPAA2_SEC_ERR("Cannot open the dpsec device: Error = %x",
3107                               retcode);
3108                 goto init_error;
3109         }
3110         retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
3111         if (retcode != 0) {
3112                 DPAA2_SEC_ERR(
3113                              "Cannot get dpsec device attributed: Error = %x",
3114                              retcode);
3115                 goto init_error;
3116         }
3117         sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
3118
3119         internals->max_nb_queue_pairs = attr.num_tx_queues;
3120         cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
3121         internals->hw = dpseci;
3122         internals->token = token;
3123
3124         sprintf(str, "fle_pool_%d", cryptodev->data->dev_id);
3125         internals->fle_pool = rte_mempool_create((const char *)str,
3126                         FLE_POOL_NUM_BUFS,
3127                         FLE_POOL_BUF_SIZE,
3128                         FLE_POOL_CACHE_SIZE, 0,
3129                         NULL, NULL, NULL, NULL,
3130                         SOCKET_ID_ANY, 0);
3131         if (!internals->fle_pool) {
3132                 DPAA2_SEC_ERR("Mempool (%s) creation failed", str);
3133                 goto init_error;
3134         }
3135
3136         DPAA2_SEC_INFO("driver %s: created", cryptodev->data->name);
3137         return 0;
3138
3139 init_error:
3140         DPAA2_SEC_ERR("driver %s: create failed", cryptodev->data->name);
3141
3142         /* dpaa2_sec_uninit(crypto_dev_name); */
3143         return -EFAULT;
3144 }
3145
3146 static int
3147 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
3148                           struct rte_dpaa2_device *dpaa2_dev)
3149 {
3150         struct rte_cryptodev *cryptodev;
3151         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
3152
3153         int retval;
3154
3155         sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
3156
3157         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
3158         if (cryptodev == NULL)
3159                 return -ENOMEM;
3160
3161         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3162                 cryptodev->data->dev_private = rte_zmalloc_socket(
3163                                         "cryptodev private structure",
3164                                         sizeof(struct dpaa2_sec_dev_private),
3165                                         RTE_CACHE_LINE_SIZE,
3166                                         rte_socket_id());
3167
3168                 if (cryptodev->data->dev_private == NULL)
3169                         rte_panic("Cannot allocate memzone for private "
3170                                   "device data");
3171         }
3172
3173         dpaa2_dev->cryptodev = cryptodev;
3174         cryptodev->device = &dpaa2_dev->device;
3175
3176         /* init user callbacks */
3177         TAILQ_INIT(&(cryptodev->link_intr_cbs));
3178
3179         /* Invoke PMD device initialization function */
3180         retval = dpaa2_sec_dev_init(cryptodev);
3181         if (retval == 0)
3182                 return 0;
3183
3184         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3185                 rte_free(cryptodev->data->dev_private);
3186
3187         cryptodev->attached = RTE_CRYPTODEV_DETACHED;
3188
3189         return -ENXIO;
3190 }
3191
3192 static int
3193 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
3194 {
3195         struct rte_cryptodev *cryptodev;
3196         int ret;
3197
3198         cryptodev = dpaa2_dev->cryptodev;
3199         if (cryptodev == NULL)
3200                 return -ENODEV;
3201
3202         ret = dpaa2_sec_uninit(cryptodev);
3203         if (ret)
3204                 return ret;
3205
3206         return rte_cryptodev_pmd_destroy(cryptodev);
3207 }
3208
3209 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
3210         .drv_flags = RTE_DPAA2_DRV_IOVA_AS_VA,
3211         .drv_type = DPAA2_CRYPTO,
3212         .driver = {
3213                 .name = "DPAA2 SEC PMD"
3214         },
3215         .probe = cryptodev_dpaa2_sec_probe,
3216         .remove = cryptodev_dpaa2_sec_remove,
3217 };
3218
3219 static struct cryptodev_driver dpaa2_sec_crypto_drv;
3220
3221 RTE_PMD_REGISTER_DPAA2(CRYPTODEV_NAME_DPAA2_SEC_PMD, rte_dpaa2_sec_driver);
3222 RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa2_sec_crypto_drv,
3223                 rte_dpaa2_sec_driver.driver, cryptodev_driver_id);
3224
3225 RTE_INIT(dpaa2_sec_init_log)
3226 {
3227         /* Bus level logs */
3228         dpaa2_logtype_sec = rte_log_register("pmd.crypto.dpaa2");
3229         if (dpaa2_logtype_sec >= 0)
3230                 rte_log_set_level(dpaa2_logtype_sec, RTE_LOG_NOTICE);
3231 }