4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #ifndef _RTE_DPAA2_SEC_PMD_PRIVATE_H_
35 #define _RTE_DPAA2_SEC_PMD_PRIVATE_H_
37 /** private data structure for each DPAA2_SEC device */
38 struct dpaa2_sec_dev_private {
39 void *mc_portal; /**< MC Portal for configuring this device */
40 void *hw; /**< Hardware handle for this device.Used by NADK framework */
41 int32_t hw_id; /**< An unique ID of this device instance */
42 int32_t vfio_fd; /**< File descriptor received via VFIO */
43 uint16_t token; /**< Token required by DPxxx objects */
44 unsigned int max_nb_queue_pairs;
45 /**< Max number of queue pairs supported by device */
46 unsigned int max_nb_sessions;
47 /**< Max number of sessions supported by device */
51 struct dpaa2_queue rx_vq;
52 struct dpaa2_queue tx_vq;
55 static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
57 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
59 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
61 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
78 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
80 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
82 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
99 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
101 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
103 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
120 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
122 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
124 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
141 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
143 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
145 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
162 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
164 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
166 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
183 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
185 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
187 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
203 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
205 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
207 .algo = RTE_CRYPTO_CIPHER_3DES_CBC,
223 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
225 #endif /* _RTE_DPAA2_SEC_PMD_PRIVATE_H_ */