drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9
  10 #include "otx2_cryptodev.h"
  11 #include "otx2_cryptodev_capabilities.h"
  12 #include "otx2_cryptodev_hw_access.h"
  13 #include "otx2_cryptodev_mbox.h"
  14 #include "otx2_cryptodev_ops.h"
  15 #include "otx2_mbox.h"
  16
  17 #include "cpt_hw_types.h"
  18 #include "cpt_pmd_logs.h"
  19 #include "cpt_pmd_ops_helper.h"
  20 #include "cpt_ucode.h"
  21 #include "cpt_ucode_asym.h"
  22
  23 #define METABUF_POOL_CACHE_SIZE 512
  24
  25 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  26
  27 /* Forward declarations */
  28
  29 static int
  30 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  31
  32 static void
  33 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  34 {
  35         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  36 }
  37
  38 static int
  39 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  40                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  41                                 int nb_elements)
  42 {
  43         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  44         struct cpt_qp_meta_info *meta_info;
  45         struct rte_mempool *pool;
  46         int ret, max_mlen;
  47         int asym_mlen = 0;
  48         int lb_mlen = 0;
  49         int sg_mlen = 0;
  50
  51         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  52
  53                 /* Get meta len for scatter gather mode */
  54                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  55
  56                 /* Extra 32B saved for future considerations */
  57                 sg_mlen += 4 * sizeof(uint64_t);
  58
  59                 /* Get meta len for linear buffer (direct) mode */
  60                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  61
  62                 /* Extra 32B saved for future considerations */
  63                 lb_mlen += 4 * sizeof(uint64_t);
  64         }
  65
  66         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  67
  68                 /* Get meta len required for asymmetric operations */
  69                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  70         }
  71
  72         /*
  73          * Check max requirement for meta buffer to
  74          * support crypto op of any type (sym/asym).
  75          */
  76         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  77
  78         /* Allocate mempool */
  79
  80         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  81                  dev->data->dev_id, qp_id);
  82
  83         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  84                                         METABUF_POOL_CACHE_SIZE, 0,
  85                                         rte_socket_id(), 0);
  86
  87         if (pool == NULL) {
  88                 CPT_LOG_ERR("Could not create mempool for metabuf");
  89                 return rte_errno;
  90         }
  91
  92         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
  93                                          NULL);
  94         if (ret) {
  95                 CPT_LOG_ERR("Could not set mempool ops");
  96                 goto mempool_free;
  97         }
  98
  99         ret = rte_mempool_populate_default(pool);
 100         if (ret <= 0) {
 101                 CPT_LOG_ERR("Could not populate metabuf pool");
 102                 goto mempool_free;
 103         }
 104
 105         meta_info = &qp->meta_info;
 106
 107         meta_info->pool = pool;
 108         meta_info->lb_mlen = lb_mlen;
 109         meta_info->sg_mlen = sg_mlen;
 110
 111         return 0;
 112
 113 mempool_free:
 114         rte_mempool_free(pool);
 115         return ret;
 116 }
 117
 118 static void
 119 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 120 {
 121         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 122
 123         rte_mempool_free(meta_info->pool);
 124
 125         meta_info->pool = NULL;
 126         meta_info->lb_mlen = 0;
 127         meta_info->sg_mlen = 0;
 128 }
 129
 130 static struct otx2_cpt_qp *
 131 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 132                    uint8_t group)
 133 {
 134         struct otx2_cpt_vf *vf = dev->data->dev_private;
 135         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 136         const struct rte_memzone *lf_mem;
 137         uint32_t len, iq_len, size_div40;
 138         char name[RTE_MEMZONE_NAMESIZE];
 139         uint64_t used_len, iova;
 140         struct otx2_cpt_qp *qp;
 141         uint64_t lmtline;
 142         uint8_t *va;
 143         int ret;
 144
 145         /* Allocate queue pair */
 146         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 147                                 OTX2_ALIGN, 0);
 148         if (qp == NULL) {
 149                 CPT_LOG_ERR("Could not allocate queue pair");
 150                 return NULL;
 151         }
 152
 153         iq_len = OTX2_CPT_IQ_LEN;
 154
 155         /*
 156          * Queue size must be a multiple of 40 and effective queue size to
 157          * software is (size_div40 - 1) * 40
 158          */
 159         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 160
 161         /* For pending queue */
 162         len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 163
 164         /* Space for instruction group memory */
 165         len += size_div40 * 16;
 166
 167         /* So that instruction queues start as pg size aligned */
 168         len = RTE_ALIGN(len, pg_sz);
 169
 170         /* For instruction queues */
 171         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 172
 173         /* Wastage after instruction queues */
 174         len = RTE_ALIGN(len, pg_sz);
 175
 176         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 177                             qp_id);
 178
 179         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 180                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 181                         RTE_CACHE_LINE_SIZE);
 182         if (lf_mem == NULL) {
 183                 CPT_LOG_ERR("Could not allocate reserved memzone");
 184                 goto qp_free;
 185         }
 186
 187         va = lf_mem->addr;
 188         iova = lf_mem->iova;
 189
 190         memset(va, 0, len);
 191
 192         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 193         if (ret) {
 194                 CPT_LOG_ERR("Could not create mempool for metabuf");
 195                 goto lf_mem_free;
 196         }
 197
 198         /* Initialize pending queue */
 199         qp->pend_q.rid_queue = (struct rid *)va;
 200         qp->pend_q.enq_tail = 0;
 201         qp->pend_q.deq_head = 0;
 202         qp->pend_q.pending_count = 0;
 203
 204         used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 205         used_len += size_div40 * 16;
 206         used_len = RTE_ALIGN(used_len, pg_sz);
 207         iova += used_len;
 208
 209         qp->iq_dma_addr = iova;
 210         qp->id = qp_id;
 211         qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
 212
 213         lmtline = vf->otx2_dev.bar2 +
 214                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 215                   OTX2_LMT_LF_LMTLINE(0);
 216
 217         qp->lmtline = (void *)lmtline;
 218
 219         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 220
 221         otx2_cpt_iq_disable(qp);
 222
 223         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 224                                  size_div40);
 225         if (ret) {
 226                 CPT_LOG_ERR("Could not enable instruction queue");
 227                 goto mempool_destroy;
 228         }
 229
 230         return qp;
 231
 232 mempool_destroy:
 233         otx2_cpt_metabuf_mempool_destroy(qp);
 234 lf_mem_free:
 235         rte_memzone_free(lf_mem);
 236 qp_free:
 237         rte_free(qp);
 238         return NULL;
 239 }
 240
 241 static int
 242 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 243 {
 244         const struct rte_memzone *lf_mem;
 245         char name[RTE_MEMZONE_NAMESIZE];
 246         int ret;
 247
 248         otx2_cpt_iq_disable(qp);
 249
 250         otx2_cpt_metabuf_mempool_destroy(qp);
 251
 252         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 253                             qp->id);
 254
 255         lf_mem = rte_memzone_lookup(name);
 256
 257         ret = rte_memzone_free(lf_mem);
 258         if (ret)
 259                 return ret;
 260
 261         rte_free(qp);
 262
 263         return 0;
 264 }
 265
 266 static int
 267 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 268                       struct rte_cryptodev_sym_session *sess,
 269                       struct rte_mempool *pool)
 270 {
 271         struct cpt_sess_misc *misc;
 272         void *priv;
 273         int ret;
 274
 275         if (unlikely(cpt_is_algo_supported(xform))) {
 276                 CPT_LOG_ERR("Crypto xform not supported");
 277                 return -ENOTSUP;
 278         }
 279
 280         if (unlikely(rte_mempool_get(pool, &priv))) {
 281                 CPT_LOG_ERR("Could not allocate session private data");
 282                 return -ENOMEM;
 283         }
 284
 285         misc = priv;
 286
 287         for ( ; xform != NULL; xform = xform->next) {
 288                 switch (xform->type) {
 289                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 290                         ret = fill_sess_aead(xform, misc);
 291                         break;
 292                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 293                         ret = fill_sess_cipher(xform, misc);
 294                         break;
 295                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 296                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 297                                 ret = fill_sess_gmac(xform, misc);
 298                         else
 299                                 ret = fill_sess_auth(xform, misc);
 300                         break;
 301                 default:
 302                         ret = -1;
 303                 }
 304
 305                 if (ret)
 306                         goto priv_put;
 307         }
 308
 309         set_sym_session_private_data(sess, driver_id, misc);
 310
 311         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 312                              sizeof(struct cpt_sess_misc);
 313
 314         /*
 315          * IE engines support IPsec operations
 316          * SE engines support IPsec operations and Air-Crypto operations
 317          */
 318         if (misc->zsk_flag)
 319                 misc->egrp = OTX2_CPT_EGRP_SE;
 320         else
 321                 misc->egrp = OTX2_CPT_EGRP_SE_IE;
 322
 323         return 0;
 324
 325 priv_put:
 326         rte_mempool_put(pool, priv);
 327
 328         CPT_LOG_ERR("Crypto xform not supported");
 329         return -ENOTSUP;
 330 }
 331
 332 static void
 333 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
 334 {
 335         void *priv = get_sym_session_private_data(sess, driver_id);
 336         struct rte_mempool *pool;
 337
 338         if (priv == NULL)
 339                 return;
 340
 341         memset(priv, 0, cpt_get_session_size());
 342
 343         pool = rte_mempool_from_obj(priv);
 344
 345         set_sym_session_private_data(sess, driver_id, NULL);
 346
 347         rte_mempool_put(pool, priv);
 348 }
 349
 350 static __rte_always_inline int32_t __hot
 351 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 352                      struct pending_queue *pend_q,
 353                      struct cpt_request_info *req)
 354 {
 355         void *lmtline = qp->lmtline;
 356         union cpt_inst_s inst;
 357         uint64_t lmt_status;
 358
 359         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 360                 return -EAGAIN;
 361
 362         inst.u[0] = 0;
 363         inst.s9x.res_addr = req->comp_baddr;
 364         inst.u[2] = 0;
 365         inst.u[3] = 0;
 366
 367         inst.s9x.ei0 = req->ist.ei0;
 368         inst.s9x.ei1 = req->ist.ei1;
 369         inst.s9x.ei2 = req->ist.ei2;
 370         inst.s9x.ei3 = req->ist.ei3;
 371
 372         req->time_out = rte_get_timer_cycles() +
 373                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 374
 375         do {
 376                 /* Copy CPT command to LMTLINE */
 377                 memcpy(lmtline, &inst, sizeof(inst));
 378
 379                 /*
 380                  * Make sure compiler does not reorder memcpy and ldeor.
 381                  * LMTST transactions are always flushed from the write
 382                  * buffer immediately, a DMB is not required to push out
 383                  * LMTSTs.
 384                  */
 385                 rte_cio_wmb();
 386                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 387         } while (lmt_status == 0);
 388
 389         pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
 390
 391         /* We will use soft queue length here to limit requests */
 392         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 393         pend_q->pending_count += 1;
 394
 395         return 0;
 396 }
 397
 398 static __rte_always_inline int32_t __hot
 399 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 400                       struct rte_crypto_op *op,
 401                       struct pending_queue *pend_q)
 402 {
 403         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 404         struct rte_crypto_asym_op *asym_op = op->asym;
 405         struct asym_op_params params = {0};
 406         struct cpt_asym_sess_misc *sess;
 407         vq_cmd_word3_t *w3;
 408         uintptr_t *cop;
 409         void *mdata;
 410         int ret;
 411
 412         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 413                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 414                 return -ENOMEM;
 415         }
 416
 417         sess = get_asym_session_private_data(asym_op->session,
 418                                              otx2_cryptodev_driver_id);
 419
 420         /* Store IO address of the mdata to meta_buf */
 421         params.meta_buf = rte_mempool_virt2iova(mdata);
 422
 423         cop = mdata;
 424         cop[0] = (uintptr_t)mdata;
 425         cop[1] = (uintptr_t)op;
 426         cop[2] = cop[3] = 0ULL;
 427
 428         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 429         params.req->op = cop;
 430
 431         /* Adjust meta_buf to point to end of cpt_request_info structure */
 432         params.meta_buf += (4 * sizeof(uintptr_t)) +
 433                             sizeof(struct cpt_request_info);
 434         switch (sess->xfrm_type) {
 435         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 436                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 437                 if (unlikely(ret))
 438                         goto req_fail;
 439                 break;
 440         case RTE_CRYPTO_ASYM_XFORM_RSA:
 441                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 442                 if (unlikely(ret))
 443                         goto req_fail;
 444                 break;
 445         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 446                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 447                 if (unlikely(ret))
 448                         goto req_fail;
 449                 break;
 450         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 451                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 452                                     sess->ec_ctx.curveid);
 453                 if (unlikely(ret))
 454                         goto req_fail;
 455                 break;
 456         default:
 457                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 458                 ret = -EINVAL;
 459                 goto req_fail;
 460         }
 461
 462         /* Set engine group of AE */
 463         w3 = (vq_cmd_word3_t *)&params.req->ist.ei3;
 464         w3->s.grp = OTX2_CPT_EGRP_AE;
 465
 466         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req);
 467
 468         if (unlikely(ret)) {
 469                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 470                 goto req_fail;
 471         }
 472
 473         return 0;
 474
 475 req_fail:
 476         free_op_meta(mdata, minfo->pool);
 477
 478         return ret;
 479 }
 480
 481 static __rte_always_inline int __hot
 482 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 483                      struct pending_queue *pend_q)
 484 {
 485         struct rte_crypto_sym_op *sym_op = op->sym;
 486         struct cpt_request_info *req;
 487         struct cpt_sess_misc *sess;
 488         vq_cmd_word3_t *w3;
 489         uint64_t cpt_op;
 490         void *mdata;
 491         int ret;
 492
 493         sess = get_sym_session_private_data(sym_op->session,
 494                                             otx2_cryptodev_driver_id);
 495
 496         cpt_op = sess->cpt_op;
 497
 498         if (cpt_op & CPT_OP_CIPHER_MASK)
 499                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 500                                      (void **)&req);
 501         else
 502                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 503                                          (void **)&req);
 504
 505         if (unlikely(ret)) {
 506                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 507                                 op, (unsigned int)cpt_op, ret);
 508                 return ret;
 509         }
 510
 511         w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
 512         w3->s.grp = sess->egrp;
 513
 514         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 515
 516         if (unlikely(ret)) {
 517                 /* Free buffer allocated by fill params routines */
 518                 free_op_meta(mdata, qp->meta_info.pool);
 519         }
 520
 521         return ret;
 522 }
 523
 524 static __rte_always_inline int __hot
 525 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 526                               struct pending_queue *pend_q)
 527 {
 528         const int driver_id = otx2_cryptodev_driver_id;
 529         struct rte_crypto_sym_op *sym_op = op->sym;
 530         struct rte_cryptodev_sym_session *sess;
 531         int ret;
 532
 533         /* Create temporary session */
 534
 535         if (rte_mempool_get(qp->sess_mp, (void **)&sess))
 536                 return -ENOMEM;
 537
 538         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 539                                     qp->sess_mp_priv);
 540         if (ret)
 541                 goto sess_put;
 542
 543         sym_op->session = sess;
 544
 545         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 546
 547         if (unlikely(ret))
 548                 goto priv_put;
 549
 550         return 0;
 551
 552 priv_put:
 553         sym_session_clear(driver_id, sess);
 554 sess_put:
 555         rte_mempool_put(qp->sess_mp, sess);
 556         return ret;
 557 }
 558
 559 static uint16_t
 560 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 561 {
 562         uint16_t nb_allowed, count = 0;
 563         struct otx2_cpt_qp *qp = qptr;
 564         struct pending_queue *pend_q;
 565         struct rte_crypto_op *op;
 566         int ret;
 567
 568         pend_q = &qp->pend_q;
 569
 570         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 571         if (nb_ops > nb_allowed)
 572                 nb_ops = nb_allowed;
 573
 574         for (count = 0; count < nb_ops; count++) {
 575                 op = ops[count];
 576                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 577                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 578                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 579                         else
 580                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 581                                                                     pend_q);
 582                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 583                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 584                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 585                         else
 586                                 break;
 587                 } else
 588                         break;
 589
 590                 if (unlikely(ret))
 591                         break;
 592         }
 593
 594         return count;
 595 }
 596
 597 static __rte_always_inline void
 598 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 599                      struct rte_crypto_rsa_xform *rsa_ctx)
 600 {
 601         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 602
 603         switch (rsa->op_type) {
 604         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 605                 rsa->cipher.length = rsa_ctx->n.length;
 606                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 607                 break;
 608         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 609                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 610                         rsa->message.length = rsa_ctx->n.length;
 611                         memcpy(rsa->message.data, req->rptr,
 612                                rsa->message.length);
 613                 } else {
 614                         /* Get length of decrypted output */
 615                         rsa->message.length = rte_cpu_to_be_16
 616                                              (*((uint16_t *)req->rptr));
 617                         /*
 618                          * Offset output data pointer by length field
 619                          * (2 bytes) and copy decrypted data.
 620                          */
 621                         memcpy(rsa->message.data, req->rptr + 2,
 622                                rsa->message.length);
 623                 }
 624                 break;
 625         case RTE_CRYPTO_ASYM_OP_SIGN:
 626                 rsa->sign.length = rsa_ctx->n.length;
 627                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 628                 break;
 629         case RTE_CRYPTO_ASYM_OP_VERIFY:
 630                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 631                         rsa->sign.length = rsa_ctx->n.length;
 632                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 633                 } else {
 634                         /* Get length of signed output */
 635                         rsa->sign.length = rte_cpu_to_be_16
 636                                           (*((uint16_t *)req->rptr));
 637                         /*
 638                          * Offset output data pointer by length field
 639                          * (2 bytes) and copy signed data.
 640                          */
 641                         memcpy(rsa->sign.data, req->rptr + 2,
 642                                rsa->sign.length);
 643                 }
 644                 if (memcmp(rsa->sign.data, rsa->message.data,
 645                            rsa->message.length)) {
 646                         CPT_LOG_DP_ERR("RSA verification failed");
 647                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 648                 }
 649                 break;
 650         default:
 651                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 652                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 653                 break;
 654         }
 655 }
 656
 657 static __rte_always_inline void
 658 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 659                                struct cpt_request_info *req,
 660                                struct cpt_asym_ec_ctx *ec)
 661 {
 662         int prime_len = ec_grp[ec->curveid].prime.length;
 663
 664         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 665                 return;
 666
 667         /* Separate out sign r and s components */
 668         memcpy(ecdsa->r.data, req->rptr, prime_len);
 669         memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 670         ecdsa->r.length = prime_len;
 671         ecdsa->s.length = prime_len;
 672 }
 673
 674 static __rte_always_inline void
 675 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 676                              struct cpt_request_info *req,
 677                              struct cpt_asym_ec_ctx *ec)
 678 {
 679         int prime_len = ec_grp[ec->curveid].prime.length;
 680
 681         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 682         memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 683         ecpm->r.x.length = prime_len;
 684         ecpm->r.y.length = prime_len;
 685 }
 686
 687 static void
 688 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 689                            struct cpt_request_info *req)
 690 {
 691         struct rte_crypto_asym_op *op = cop->asym;
 692         struct cpt_asym_sess_misc *sess;
 693
 694         sess = get_asym_session_private_data(op->session,
 695                                              otx2_cryptodev_driver_id);
 696
 697         switch (sess->xfrm_type) {
 698         case RTE_CRYPTO_ASYM_XFORM_RSA:
 699                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 700                 break;
 701         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 702                 op->modex.result.length = sess->mod_ctx.modulus.length;
 703                 memcpy(op->modex.result.data, req->rptr,
 704                        op->modex.result.length);
 705                 break;
 706         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 707                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 708                 break;
 709         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 710                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 711                 break;
 712         default:
 713                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 714                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 715                 break;
 716         }
 717 }
 718
 719 static inline void
 720 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 721                               uintptr_t *rsp, uint8_t cc)
 722 {
 723         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 724                 if (likely(cc == NO_ERR)) {
 725                         /* Verify authentication data if required */
 726                         if (unlikely(rsp[2]))
 727                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
 728                                                  rsp[3]);
 729                         else
 730                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 731                 } else {
 732                         if (cc == ERR_GC_ICV_MISCOMPARE)
 733                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 734                         else
 735                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 736                 }
 737
 738                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 739                         sym_session_clear(otx2_cryptodev_driver_id,
 740                                           cop->sym->session);
 741                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 742                         cop->sym->session = NULL;
 743                 }
 744         }
 745
 746         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 747                 if (likely(cc == NO_ERR)) {
 748                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 749                         /*
 750                          * Pass cpt_req_info stored in metabuf during
 751                          * enqueue.
 752                          */
 753                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
 754                         otx2_cpt_asym_post_process(cop,
 755                                         (struct cpt_request_info *)rsp);
 756                 } else
 757                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 758         }
 759 }
 760
 761 static __rte_always_inline uint8_t
 762 otx2_cpt_compcode_get(struct cpt_request_info *req)
 763 {
 764         volatile struct cpt_res_s_9s *res;
 765         uint8_t ret;
 766
 767         res = (volatile struct cpt_res_s_9s *)req->completion_addr;
 768
 769         if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
 770                 if (rte_get_timer_cycles() < req->time_out)
 771                         return ERR_REQ_PENDING;
 772
 773                 CPT_LOG_DP_ERR("Request timed out");
 774                 return ERR_REQ_TIMEOUT;
 775         }
 776
 777         if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
 778                 ret = NO_ERR;
 779                 if (unlikely(res->uc_compcode)) {
 780                         ret = res->uc_compcode;
 781                         CPT_LOG_DP_DEBUG("Request failed with microcode error");
 782                         CPT_LOG_DP_DEBUG("MC completion code 0x%x",
 783                                          res->uc_compcode);
 784                 }
 785         } else {
 786                 CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
 787
 788                 ret = res->compcode;
 789                 switch (res->compcode) {
 790                 case CPT_9X_COMP_E_INSTERR:
 791                         CPT_LOG_DP_ERR("Request failed with instruction error");
 792                         break;
 793                 case CPT_9X_COMP_E_FAULT:
 794                         CPT_LOG_DP_ERR("Request failed with DMA fault");
 795                         break;
 796                 case CPT_9X_COMP_E_HWERR:
 797                         CPT_LOG_DP_ERR("Request failed with hardware error");
 798                         break;
 799                 default:
 800                         CPT_LOG_DP_ERR("Request failed with unknown completion code");
 801                 }
 802         }
 803
 804         return ret;
 805 }
 806
 807 static uint16_t
 808 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 809 {
 810         int i, nb_pending, nb_completed;
 811         struct otx2_cpt_qp *qp = qptr;
 812         struct pending_queue *pend_q;
 813         struct cpt_request_info *req;
 814         struct rte_crypto_op *cop;
 815         uint8_t cc[nb_ops];
 816         struct rid *rid;
 817         uintptr_t *rsp;
 818         void *metabuf;
 819
 820         pend_q = &qp->pend_q;
 821
 822         nb_pending = pend_q->pending_count;
 823
 824         if (nb_ops > nb_pending)
 825                 nb_ops = nb_pending;
 826
 827         for (i = 0; i < nb_ops; i++) {
 828                 rid = &pend_q->rid_queue[pend_q->deq_head];
 829                 req = (struct cpt_request_info *)(rid->rid);
 830
 831                 cc[i] = otx2_cpt_compcode_get(req);
 832
 833                 if (unlikely(cc[i] == ERR_REQ_PENDING))
 834                         break;
 835
 836                 ops[i] = req->op;
 837
 838                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
 839                 pend_q->pending_count -= 1;
 840         }
 841
 842         nb_completed = i;
 843
 844         for (i = 0; i < nb_completed; i++) {
 845                 rsp = (void *)ops[i];
 846
 847                 metabuf = (void *)rsp[0];
 848                 cop = (void *)rsp[1];
 849
 850                 ops[i] = cop;
 851
 852                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
 853
 854                 free_op_meta(metabuf, qp->meta_info.pool);
 855         }
 856
 857         return nb_completed;
 858 }
 859
 860 /* PMD ops */
 861
 862 static int
 863 otx2_cpt_dev_config(struct rte_cryptodev *dev,
 864                     struct rte_cryptodev_config *conf)
 865 {
 866         struct otx2_cpt_vf *vf = dev->data->dev_private;
 867         int ret;
 868
 869         if (conf->nb_queue_pairs > vf->max_queues) {
 870                 CPT_LOG_ERR("Invalid number of queue pairs requested");
 871                 return -EINVAL;
 872         }
 873
 874         dev->feature_flags &= ~conf->ff_disable;
 875
 876         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
 877                 /* Initialize shared FPM table */
 878                 ret = cpt_fpm_init(otx2_fpm_iova);
 879                 if (ret)
 880                         return ret;
 881         }
 882
 883         /* Unregister error interrupts */
 884         if (vf->err_intr_registered)
 885                 otx2_cpt_err_intr_unregister(dev);
 886
 887         /* Detach queues */
 888         if (vf->nb_queues) {
 889                 ret = otx2_cpt_queues_detach(dev);
 890                 if (ret) {
 891                         CPT_LOG_ERR("Could not detach CPT queues");
 892                         return ret;
 893                 }
 894         }
 895
 896         /* Attach queues */
 897         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
 898         if (ret) {
 899                 CPT_LOG_ERR("Could not attach CPT queues");
 900                 return -ENODEV;
 901         }
 902
 903         ret = otx2_cpt_msix_offsets_get(dev);
 904         if (ret) {
 905                 CPT_LOG_ERR("Could not get MSI-X offsets");
 906                 goto queues_detach;
 907         }
 908
 909         /* Register error interrupts */
 910         ret = otx2_cpt_err_intr_register(dev);
 911         if (ret) {
 912                 CPT_LOG_ERR("Could not register error interrupts");
 913                 goto queues_detach;
 914         }
 915
 916         dev->enqueue_burst = otx2_cpt_enqueue_burst;
 917         dev->dequeue_burst = otx2_cpt_dequeue_burst;
 918
 919         rte_mb();
 920         return 0;
 921
 922 queues_detach:
 923         otx2_cpt_queues_detach(dev);
 924         return ret;
 925 }
 926
 927 static int
 928 otx2_cpt_dev_start(struct rte_cryptodev *dev)
 929 {
 930         RTE_SET_USED(dev);
 931
 932         CPT_PMD_INIT_FUNC_TRACE();
 933
 934         return 0;
 935 }
 936
 937 static void
 938 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
 939 {
 940         CPT_PMD_INIT_FUNC_TRACE();
 941
 942         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
 943                 cpt_fpm_clear();
 944 }
 945
 946 static int
 947 otx2_cpt_dev_close(struct rte_cryptodev *dev)
 948 {
 949         struct otx2_cpt_vf *vf = dev->data->dev_private;
 950         int i, ret = 0;
 951
 952         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 953                 ret = otx2_cpt_queue_pair_release(dev, i);
 954                 if (ret)
 955                         return ret;
 956         }
 957
 958         /* Unregister error interrupts */
 959         if (vf->err_intr_registered)
 960                 otx2_cpt_err_intr_unregister(dev);
 961
 962         /* Detach queues */
 963         if (vf->nb_queues) {
 964                 ret = otx2_cpt_queues_detach(dev);
 965                 if (ret)
 966                         CPT_LOG_ERR("Could not detach CPT queues");
 967         }
 968
 969         return ret;
 970 }
 971
 972 static void
 973 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
 974                       struct rte_cryptodev_info *info)
 975 {
 976         struct otx2_cpt_vf *vf = dev->data->dev_private;
 977
 978         if (info != NULL) {
 979                 info->max_nb_queue_pairs = vf->max_queues;
 980                 info->feature_flags = dev->feature_flags;
 981                 info->capabilities = otx2_cpt_capabilities_get();
 982                 info->sym.max_nb_sessions = 0;
 983                 info->driver_id = otx2_cryptodev_driver_id;
 984                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
 985                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
 986         }
 987 }
 988
 989 static int
 990 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 991                           const struct rte_cryptodev_qp_conf *conf,
 992                           int socket_id __rte_unused)
 993 {
 994         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
 995         struct rte_pci_device *pci_dev;
 996         struct otx2_cpt_qp *qp;
 997
 998         CPT_PMD_INIT_FUNC_TRACE();
 999
1000         if (dev->data->queue_pairs[qp_id] != NULL)
1001                 otx2_cpt_queue_pair_release(dev, qp_id);
1002
1003         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1004                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1005                             conf->nb_descriptors);
1006                 return -EINVAL;
1007         }
1008
1009         pci_dev = RTE_DEV_TO_PCI(dev->device);
1010
1011         if (pci_dev->mem_resource[2].addr == NULL) {
1012                 CPT_LOG_ERR("Invalid PCI mem address");
1013                 return -EIO;
1014         }
1015
1016         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1017         if (qp == NULL) {
1018                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1019                 return -ENOMEM;
1020         }
1021
1022         qp->sess_mp = conf->mp_session;
1023         qp->sess_mp_priv = conf->mp_session_private;
1024         dev->data->queue_pairs[qp_id] = qp;
1025
1026         return 0;
1027 }
1028
1029 static int
1030 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1031 {
1032         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1033         int ret;
1034
1035         CPT_PMD_INIT_FUNC_TRACE();
1036
1037         if (qp == NULL)
1038                 return -EINVAL;
1039
1040         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1041
1042         ret = otx2_cpt_qp_destroy(dev, qp);
1043         if (ret) {
1044                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1045                 return ret;
1046         }
1047
1048         dev->data->queue_pairs[qp_id] = NULL;
1049
1050         return 0;
1051 }
1052
1053 static unsigned int
1054 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1055 {
1056         return cpt_get_session_size();
1057 }
1058
1059 static int
1060 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1061                                struct rte_crypto_sym_xform *xform,
1062                                struct rte_cryptodev_sym_session *sess,
1063                                struct rte_mempool *pool)
1064 {
1065         CPT_PMD_INIT_FUNC_TRACE();
1066
1067         return sym_session_configure(dev->driver_id, xform, sess, pool);
1068 }
1069
1070 static void
1071 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1072                            struct rte_cryptodev_sym_session *sess)
1073 {
1074         CPT_PMD_INIT_FUNC_TRACE();
1075
1076         return sym_session_clear(dev->driver_id, sess);
1077 }
1078
1079 static unsigned int
1080 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1081 {
1082         return sizeof(struct cpt_asym_sess_misc);
1083 }
1084
1085 static int
1086 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1087                           struct rte_crypto_asym_xform *xform,
1088                           struct rte_cryptodev_asym_session *sess,
1089                           struct rte_mempool *pool)
1090 {
1091         struct cpt_asym_sess_misc *priv;
1092         int ret;
1093
1094         CPT_PMD_INIT_FUNC_TRACE();
1095
1096         if (rte_mempool_get(pool, (void **)&priv)) {
1097                 CPT_LOG_ERR("Could not allocate session_private_data");
1098                 return -ENOMEM;
1099         }
1100
1101         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1102
1103         ret = cpt_fill_asym_session_parameters(priv, xform);
1104         if (ret) {
1105                 CPT_LOG_ERR("Could not configure session parameters");
1106
1107                 /* Return session to mempool */
1108                 rte_mempool_put(pool, priv);
1109                 return ret;
1110         }
1111
1112         set_asym_session_private_data(sess, dev->driver_id, priv);
1113         return 0;
1114 }
1115
1116 static void
1117 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1118                             struct rte_cryptodev_asym_session *sess)
1119 {
1120         struct cpt_asym_sess_misc *priv;
1121         struct rte_mempool *sess_mp;
1122
1123         CPT_PMD_INIT_FUNC_TRACE();
1124
1125         priv = get_asym_session_private_data(sess, dev->driver_id);
1126         if (priv == NULL)
1127                 return;
1128
1129         /* Free resources allocated in session_cfg */
1130         cpt_free_asym_session_parameters(priv);
1131
1132         /* Reset and free object back to pool */
1133         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1134         sess_mp = rte_mempool_from_obj(priv);
1135         set_asym_session_private_data(sess, dev->driver_id, NULL);
1136         rte_mempool_put(sess_mp, priv);
1137 }
1138
1139 struct rte_cryptodev_ops otx2_cpt_ops = {
1140         /* Device control ops */
1141         .dev_configure = otx2_cpt_dev_config,
1142         .dev_start = otx2_cpt_dev_start,
1143         .dev_stop = otx2_cpt_dev_stop,
1144         .dev_close = otx2_cpt_dev_close,
1145         .dev_infos_get = otx2_cpt_dev_info_get,
1146
1147         .stats_get = NULL,
1148         .stats_reset = NULL,
1149         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1150         .queue_pair_release = otx2_cpt_queue_pair_release,
1151         .queue_pair_count = NULL,
1152
1153         /* Symmetric crypto ops */
1154         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1155         .sym_session_configure = otx2_cpt_sym_session_configure,
1156         .sym_session_clear = otx2_cpt_sym_session_clear,
1157
1158         /* Asymmetric crypto ops */
1159         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1160         .asym_session_configure = otx2_cpt_asym_session_cfg,
1161         .asym_session_clear = otx2_cpt_asym_session_clear,
1162
1163 };