drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_mempool.h>
  58 #include <rte_mbuf.h>
  59 #include <rte_string_fns.h>
  60 #include <rte_spinlock.h>
  61 #include <rte_hexdump.h>
  62 #include <rte_crypto_sym.h>
  63 #include <openssl/evp.h>
  64
  65 #include "qat_logs.h"
  66 #include "qat_algs.h"
  67 #include "qat_crypto.h"
  68 #include "adf_transport_access_macros.h"
  69
  70 #define BYTE_LENGTH    8
  71
  72 static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
  73         {       /* SHA1 HMAC */
  74                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  75                 {.sym = {
  76                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  77                         {.auth = {
  78                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  79                                 .block_size = 64,
  80                                 .key_size = {
  81                                         .min = 64,
  82                                         .max = 64,
  83                                         .increment = 0
  84                                 },
  85                                 .digest_size = {
  86                                         .min = 20,
  87                                         .max = 20,
  88                                         .increment = 0
  89                                 },
  90                                 .aad_size = { 0 }
  91                         }, }
  92                 }, }
  93         },
  94         {       /* SHA224 HMAC */
  95                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  96                 {.sym = {
  97                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  98                         {.auth = {
  99                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
 100                                 .block_size = 64,
 101                                         .key_size = {
 102                                         .min = 64,
 103                                         .max = 64,
 104                                         .increment = 0
 105                                 },
 106                                 .digest_size = {
 107                                         .min = 28,
 108                                         .max = 28,
 109                                         .increment = 0
 110                                 },
 111                                 .aad_size = { 0 }
 112                         }, }
 113                 }, }
 114         },
 115         {       /* SHA256 HMAC */
 116                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 117                 {.sym = {
 118                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 119                         {.auth = {
 120                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 121                                 .block_size = 64,
 122                                 .key_size = {
 123                                         .min = 64,
 124                                         .max = 64,
 125                                         .increment = 0
 126                                 },
 127                                 .digest_size = {
 128                                         .min = 32,
 129                                         .max = 32,
 130                                         .increment = 0
 131                                 },
 132                                 .aad_size = { 0 }
 133                         }, }
 134                 }, }
 135         },
 136         {       /* SHA384 HMAC */
 137                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 138                 {.sym = {
 139                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 140                         {.auth = {
 141                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 142                                 .block_size = 64,
 143                                 .key_size = {
 144                                         .min = 128,
 145                                         .max = 128,
 146                                         .increment = 0
 147                                 },
 148                                 .digest_size = {
 149                                         .min = 48,
 150                                         .max = 48,
 151                                         .increment = 0
 152                                         },
 153                                 .aad_size = { 0 }
 154                         }, }
 155                 }, }
 156         },
 157         {       /* SHA512 HMAC */
 158                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 159                 {.sym = {
 160                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 161                         {.auth = {
 162                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 163                                 .block_size = 128,
 164                                 .key_size = {
 165                                         .min = 128,
 166                                         .max = 128,
 167                                         .increment = 0
 168                                 },
 169                                 .digest_size = {
 170                                         .min = 64,
 171                                         .max = 64,
 172                                         .increment = 0
 173                                 },
 174                                 .aad_size = { 0 }
 175                         }, }
 176                 }, }
 177         },
 178         {       /* MD5 HMAC */
 179                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 180                 {.sym = {
 181                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 182                         {.auth = {
 183                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
 184                                 .block_size = 64,
 185                                 .key_size = {
 186                                         .min = 8,
 187                                         .max = 64,
 188                                         .increment = 8
 189                                 },
 190                                 .digest_size = {
 191                                         .min = 16,
 192                                         .max = 16,
 193                                         .increment = 0
 194                                 },
 195                                 .aad_size = { 0 }
 196                         }, }
 197                 }, }
 198         },
 199         {       /* AES XCBC MAC */
 200                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 201                 {.sym = {
 202                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 203                         {.auth = {
 204                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 205                                 .block_size = 16,
 206                                 .key_size = {
 207                                         .min = 16,
 208                                         .max = 16,
 209                                         .increment = 0
 210                                 },
 211                                 .digest_size = {
 212                                         .min = 16,
 213                                         .max = 16,
 214                                         .increment = 0
 215                                 },
 216                                 .aad_size = { 0 }
 217                         }, }
 218                 }, }
 219         },
 220         {       /* AES GCM (AUTH) */
 221                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 222                 {.sym = {
 223                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 224                         {.auth = {
 225                                 .algo = RTE_CRYPTO_AUTH_AES_GCM,
 226                                 .block_size = 16,
 227                                 .key_size = {
 228                                         .min = 16,
 229                                         .max = 32,
 230                                         .increment = 8
 231                                 },
 232                                 .digest_size = {
 233                                         .min = 8,
 234                                         .max = 16,
 235                                         .increment = 4
 236                                 },
 237                                 .aad_size = {
 238                                         .min = 8,
 239                                         .max = 12,
 240                                         .increment = 4
 241                                 }
 242                         }, }
 243                 }, }
 244         },
 245         {       /* AES GMAC (AUTH) */
 246                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 247                 {.sym = {
 248                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 249                         {.auth = {
 250                                 .algo = RTE_CRYPTO_AUTH_AES_GMAC,
 251                                 .block_size = 16,
 252                                 .key_size = {
 253                                         .min = 16,
 254                                         .max = 32,
 255                                         .increment = 8
 256                                 },
 257                                 .digest_size = {
 258                                         .min = 8,
 259                                         .max = 16,
 260                                         .increment = 4
 261                                 },
 262                                 .aad_size = {
 263                                         .min = 1,
 264                                         .max = 65535,
 265                                         .increment = 1
 266                                 }
 267                         }, }
 268                 }, }
 269         },
 270         {       /* SNOW 3G (UIA2) */
 271                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 272                 {.sym = {
 273                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 274                         {.auth = {
 275                                 .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
 276                                 .block_size = 16,
 277                                 .key_size = {
 278                                         .min = 16,
 279                                         .max = 16,
 280                                         .increment = 0
 281                                 },
 282                                 .digest_size = {
 283                                         .min = 4,
 284                                         .max = 4,
 285                                         .increment = 0
 286                                 },
 287                                 .aad_size = {
 288                                         .min = 16,
 289                                         .max = 16,
 290                                         .increment = 0
 291                                 }
 292                         }, }
 293                 }, }
 294         },
 295         {       /* AES GCM (CIPHER) */
 296                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 297                 {.sym = {
 298                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 299                         {.cipher = {
 300                                 .algo = RTE_CRYPTO_CIPHER_AES_GCM,
 301                                 .block_size = 16,
 302                                 .key_size = {
 303                                         .min = 16,
 304                                         .max = 32,
 305                                         .increment = 8
 306                                 },
 307                                 .iv_size = {
 308                                         .min = 12,
 309                                         .max = 12,
 310                                         .increment = 0
 311                                 }
 312                         }, }
 313                 }, }
 314         },
 315         {       /* AES CBC */
 316                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 317                 {.sym = {
 318                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 319                         {.cipher = {
 320                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 321                                 .block_size = 16,
 322                                 .key_size = {
 323                                         .min = 16,
 324                                         .max = 32,
 325                                         .increment = 8
 326                                 },
 327                                 .iv_size = {
 328                                         .min = 16,
 329                                         .max = 16,
 330                                         .increment = 0
 331                                 }
 332                         }, }
 333                 }, }
 334         },
 335         {       /* AES DOCSISBPI */
 336                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 337                 {.sym = {
 338                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 339                         {.cipher = {
 340                                 .algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,
 341                                 .block_size = 16,
 342                                 .key_size = {
 343                                         .min = 16,
 344                                         .max = 16,
 345                                         .increment = 0
 346                                 },
 347                                 .iv_size = {
 348                                         .min = 16,
 349                                         .max = 16,
 350                                         .increment = 0
 351                                 }
 352                         }, }
 353                 }, }
 354         },
 355         {       /* SNOW 3G (UEA2) */
 356                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 357                 {.sym = {
 358                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 359                         {.cipher = {
 360                                 .algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
 361                                 .block_size = 16,
 362                                 .key_size = {
 363                                         .min = 16,
 364                                         .max = 16,
 365                                         .increment = 0
 366                                 },
 367                                 .iv_size = {
 368                                         .min = 16,
 369                                         .max = 16,
 370                                         .increment = 0
 371                                 }
 372                         }, }
 373                 }, }
 374         },
 375         {       /* AES CTR */
 376                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 377                 {.sym = {
 378                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 379                         {.cipher = {
 380                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 381                                 .block_size = 16,
 382                                 .key_size = {
 383                                         .min = 16,
 384                                         .max = 32,
 385                                         .increment = 8
 386                                 },
 387                                 .iv_size = {
 388                                         .min = 16,
 389                                         .max = 16,
 390                                         .increment = 0
 391                                 }
 392                         }, }
 393                 }, }
 394         },
 395         {       /* NULL (AUTH) */
 396                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 397                 {.sym = {
 398                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 399                         {.auth = {
 400                                 .algo = RTE_CRYPTO_AUTH_NULL,
 401                                 .block_size = 1,
 402                                 .key_size = {
 403                                         .min = 0,
 404                                         .max = 0,
 405                                         .increment = 0
 406                                 },
 407                                 .digest_size = {
 408                                         .min = 0,
 409                                         .max = 0,
 410                                         .increment = 0
 411                                 },
 412                                 .aad_size = { 0 }
 413                         }, },
 414                 }, },
 415         },
 416         {       /* NULL (CIPHER) */
 417                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 418                 {.sym = {
 419                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 420                         {.cipher = {
 421                                 .algo = RTE_CRYPTO_CIPHER_NULL,
 422                                 .block_size = 1,
 423                                 .key_size = {
 424                                         .min = 0,
 425                                         .max = 0,
 426                                         .increment = 0
 427                                 },
 428                                 .iv_size = {
 429                                         .min = 0,
 430                                         .max = 0,
 431                                         .increment = 0
 432                                 }
 433                         }, },
 434                 }, }
 435         },
 436         {       /* KASUMI (F8) */
 437                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 438                 {.sym = {
 439                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 440                         {.cipher = {
 441                                 .algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
 442                                 .block_size = 8,
 443                                 .key_size = {
 444                                         .min = 16,
 445                                         .max = 16,
 446                                         .increment = 0
 447                                 },
 448                                 .iv_size = {
 449                                         .min = 8,
 450                                         .max = 8,
 451                                         .increment = 0
 452                                 }
 453                         }, }
 454                 }, }
 455         },
 456         {       /* KASUMI (F9) */
 457                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 458                 {.sym = {
 459                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 460                         {.auth = {
 461                                 .algo = RTE_CRYPTO_AUTH_KASUMI_F9,
 462                                 .block_size = 8,
 463                                 .key_size = {
 464                                         .min = 16,
 465                                         .max = 16,
 466                                         .increment = 0
 467                                 },
 468                                 .digest_size = {
 469                                         .min = 4,
 470                                         .max = 4,
 471                                         .increment = 0
 472                                 },
 473                                 .aad_size = {
 474                                         .min = 8,
 475                                         .max = 8,
 476                                         .increment = 0
 477                                 }
 478                         }, }
 479                 }, }
 480         },
 481         {       /* 3DES CBC */
 482                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 483                 {.sym = {
 484                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 485                         {.cipher = {
 486                                 .algo = RTE_CRYPTO_CIPHER_3DES_CBC,
 487                                 .block_size = 8,
 488                                 .key_size = {
 489                                         .min = 16,
 490                                         .max = 24,
 491                                         .increment = 8
 492                                 },
 493                                 .iv_size = {
 494                                         .min = 8,
 495                                         .max = 8,
 496                                         .increment = 0
 497                                 }
 498                         }, }
 499                 }, }
 500         },
 501         {       /* 3DES CTR */
 502                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 503                 {.sym = {
 504                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 505                         {.cipher = {
 506                                 .algo = RTE_CRYPTO_CIPHER_3DES_CTR,
 507                                 .block_size = 8,
 508                                 .key_size = {
 509                                         .min = 16,
 510                                         .max = 24,
 511                                         .increment = 8
 512                                 },
 513                                 .iv_size = {
 514                                         .min = 8,
 515                                         .max = 8,
 516                                         .increment = 0
 517                                 }
 518                         }, }
 519                 }, }
 520         },
 521         {       /* DES CBC */
 522                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 523                 {.sym = {
 524                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 525                         {.cipher = {
 526                                 .algo = RTE_CRYPTO_CIPHER_DES_CBC,
 527                                 .block_size = 8,
 528                                 .key_size = {
 529                                         .min = 8,
 530                                         .max = 8,
 531                                         .increment = 0
 532                                 },
 533                                 .iv_size = {
 534                                         .min = 8,
 535                                         .max = 8,
 536                                         .increment = 0
 537                                 }
 538                         }, }
 539                 }, }
 540         },
 541         {       /* DES DOCSISBPI */
 542                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 543                 {.sym = {
 544                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 545                         {.cipher = {
 546                                 .algo = RTE_CRYPTO_CIPHER_DES_DOCSISBPI,
 547                                 .block_size = 8,
 548                                 .key_size = {
 549                                         .min = 8,
 550                                         .max = 8,
 551                                         .increment = 0
 552                                 },
 553                                 .iv_size = {
 554                                         .min = 8,
 555                                         .max = 8,
 556                                         .increment = 0
 557                                 }
 558                         }, }
 559                 }, }
 560         },
 561         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 562 };
 563
 564 /** Encrypt a single partial block
 565  *  Depends on openssl libcrypto
 566  *  Uses ECB+XOR to do CFB encryption, same result, more performant
 567  */
 568 static inline int
 569 bpi_cipher_encrypt(uint8_t *src, uint8_t *dst,
 570                 uint8_t *iv, int ivlen, int srclen,
 571                 void *bpi_ctx)
 572 {
 573         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
 574         int encrypted_ivlen;
 575         uint8_t encrypted_iv[16];
 576         int i;
 577
 578         /* ECB method: encrypt the IV, then XOR this with plaintext */
 579         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
 580                                                                 <= 0)
 581                 goto cipher_encrypt_err;
 582
 583         for (i = 0; i < srclen; i++)
 584                 *(dst+i) = *(src+i)^(encrypted_iv[i]);
 585
 586         return 0;
 587
 588 cipher_encrypt_err:
 589         PMD_DRV_LOG(ERR, "libcrypto ECB cipher encrypt failed");
 590         return -EINVAL;
 591 }
 592
 593 /** Decrypt a single partial block
 594  *  Depends on openssl libcrypto
 595  *  Uses ECB+XOR to do CFB encryption, same result, more performant
 596  */
 597 static inline int
 598 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
 599                 uint8_t *iv, int ivlen, int srclen,
 600                 void *bpi_ctx)
 601 {
 602         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
 603         int encrypted_ivlen;
 604         uint8_t encrypted_iv[16];
 605         int i;
 606
 607         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
 608         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
 609                                                                 <= 0)
 610                 goto cipher_decrypt_err;
 611
 612         for (i = 0; i < srclen; i++)
 613                 *(dst+i) = *(src+i)^(encrypted_iv[i]);
 614
 615         return 0;
 616
 617 cipher_decrypt_err:
 618         PMD_DRV_LOG(ERR, "libcrypto ECB cipher encrypt for BPI IV failed");
 619         return -EINVAL;
 620 }
 621
 622 /** Creates a context in either AES or DES in ECB mode
 623  *  Depends on openssl libcrypto
 624  */
 625 static void *
 626 bpi_cipher_ctx_init(enum rte_crypto_cipher_algorithm cryptodev_algo,
 627                 enum rte_crypto_cipher_operation direction __rte_unused,
 628                                         uint8_t *key)
 629 {
 630         const EVP_CIPHER *algo = NULL;
 631         EVP_CIPHER_CTX *ctx = EVP_CIPHER_CTX_new();
 632
 633         if (ctx == NULL)
 634                 goto ctx_init_err;
 635
 636         if (cryptodev_algo == RTE_CRYPTO_CIPHER_DES_DOCSISBPI)
 637                 algo = EVP_des_ecb();
 638         else
 639                 algo = EVP_aes_128_ecb();
 640
 641         /* IV will be ECB encrypted whether direction is encrypt or decrypt*/
 642         if (EVP_EncryptInit_ex(ctx, algo, NULL, key, 0) != 1)
 643                 goto ctx_init_err;
 644
 645         return ctx;
 646
 647 ctx_init_err:
 648         if (ctx != NULL)
 649                 EVP_CIPHER_CTX_free(ctx);
 650         return NULL;
 651 }
 652
 653 /** Frees a context previously created
 654  *  Depends on openssl libcrypto
 655  */
 656 static void
 657 bpi_cipher_ctx_free(void *bpi_ctx)
 658 {
 659         if (bpi_ctx != NULL)
 660                 EVP_CIPHER_CTX_free((EVP_CIPHER_CTX *)bpi_ctx);
 661 }
 662
 663 static inline uint32_t
 664 adf_modulo(uint32_t data, uint32_t shift);
 665
 666 static inline int
 667 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,
 668                 struct qat_crypto_op_cookie *qat_op_cookie);
 669
 670 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
 671                 void *session)
 672 {
 673         struct qat_session *sess = session;
 674         phys_addr_t cd_paddr;
 675
 676         PMD_INIT_FUNC_TRACE();
 677         if (sess) {
 678                 if (sess->bpi_ctx) {
 679                         bpi_cipher_ctx_free(sess->bpi_ctx);
 680                         sess->bpi_ctx = NULL;
 681                 }
 682                 cd_paddr = sess->cd_paddr;
 683                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
 684                 sess->cd_paddr = cd_paddr;
 685         } else
 686                 PMD_DRV_LOG(ERR, "NULL session");
 687 }
 688
 689 static int
 690 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
 691 {
 692         /* Cipher Only */
 693         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
 694                 return ICP_QAT_FW_LA_CMD_CIPHER;
 695
 696         /* Authentication Only */
 697         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 698                 return ICP_QAT_FW_LA_CMD_AUTH;
 699
 700         if (xform->next == NULL)
 701                 return -1;
 702
 703         /* Cipher then Authenticate */
 704         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 705                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 706                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 707
 708         /* Authenticate then Cipher */
 709         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 710                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 711                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 712
 713         return -1;
 714 }
 715
 716 static struct rte_crypto_auth_xform *
 717 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 718 {
 719         do {
 720                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 721                         return &xform->auth;
 722
 723                 xform = xform->next;
 724         } while (xform);
 725
 726         return NULL;
 727 }
 728
 729 static struct rte_crypto_cipher_xform *
 730 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 731 {
 732         do {
 733                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 734                         return &xform->cipher;
 735
 736                 xform = xform->next;
 737         } while (xform);
 738
 739         return NULL;
 740 }
 741 void *
 742 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev __rte_unused,
 743                 struct rte_crypto_sym_xform *xform, void *session_private)
 744 {
 745         struct qat_session *session = session_private;
 746
 747         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 748
 749         /* Get cipher xform from crypto xform chain */
 750         cipher_xform = qat_get_cipher_xform(xform);
 751
 752         switch (cipher_xform->algo) {
 753         case RTE_CRYPTO_CIPHER_AES_CBC:
 754                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 755                                 &session->qat_cipher_alg) != 0) {
 756                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 757                         goto error_out;
 758                 }
 759                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 760                 break;
 761         case RTE_CRYPTO_CIPHER_AES_GCM:
 762                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 763                                 &session->qat_cipher_alg) != 0) {
 764                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 765                         goto error_out;
 766                 }
 767                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 768                 break;
 769         case RTE_CRYPTO_CIPHER_AES_CTR:
 770                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 771                                 &session->qat_cipher_alg) != 0) {
 772                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 773                         goto error_out;
 774                 }
 775                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 776                 break;
 777         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 778                 if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
 779                                         &session->qat_cipher_alg) != 0) {
 780                         PMD_DRV_LOG(ERR, "Invalid SNOW 3G cipher key size");
 781                         goto error_out;
 782                 }
 783                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 784                 break;
 785         case RTE_CRYPTO_CIPHER_NULL:
 786                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 787                 break;
 788         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 789                 if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
 790                                         &session->qat_cipher_alg) != 0) {
 791                         PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
 792                         goto error_out;
 793                 }
 794                 session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
 795                 break;
 796         case RTE_CRYPTO_CIPHER_3DES_CBC:
 797                 if (qat_alg_validate_3des_key(cipher_xform->key.length,
 798                                 &session->qat_cipher_alg) != 0) {
 799                         PMD_DRV_LOG(ERR, "Invalid 3DES cipher key size");
 800                         goto error_out;
 801                 }
 802                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 803                 break;
 804         case RTE_CRYPTO_CIPHER_DES_CBC:
 805                 if (qat_alg_validate_des_key(cipher_xform->key.length,
 806                                 &session->qat_cipher_alg) != 0) {
 807                         PMD_DRV_LOG(ERR, "Invalid DES cipher key size");
 808                         goto error_out;
 809                 }
 810                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 811                 break;
 812         case RTE_CRYPTO_CIPHER_3DES_CTR:
 813                 if (qat_alg_validate_3des_key(cipher_xform->key.length,
 814                                 &session->qat_cipher_alg) != 0) {
 815                         PMD_DRV_LOG(ERR, "Invalid 3DES cipher key size");
 816                         goto error_out;
 817                 }
 818                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 819                 break;
 820         case RTE_CRYPTO_CIPHER_DES_DOCSISBPI:
 821                 session->bpi_ctx = bpi_cipher_ctx_init(
 822                                         cipher_xform->algo,
 823                                         cipher_xform->op,
 824                                         cipher_xform->key.data);
 825                 if (session->bpi_ctx == NULL) {
 826                         PMD_DRV_LOG(ERR, "failed to create DES BPI ctx");
 827                         goto error_out;
 828                 }
 829                 if (qat_alg_validate_des_key(cipher_xform->key.length,
 830                                 &session->qat_cipher_alg) != 0) {
 831                         PMD_DRV_LOG(ERR, "Invalid DES cipher key size");
 832                         goto error_out;
 833                 }
 834                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 835                 break;
 836         case RTE_CRYPTO_CIPHER_AES_DOCSISBPI:
 837                 session->bpi_ctx = bpi_cipher_ctx_init(
 838                                         cipher_xform->algo,
 839                                         cipher_xform->op,
 840                                         cipher_xform->key.data);
 841                 if (session->bpi_ctx == NULL) {
 842                         PMD_DRV_LOG(ERR, "failed to create AES BPI ctx");
 843                         goto error_out;
 844                 }
 845                 if (qat_alg_validate_aes_docsisbpi_key(cipher_xform->key.length,
 846                                 &session->qat_cipher_alg) != 0) {
 847                         PMD_DRV_LOG(ERR, "Invalid AES DOCSISBPI key size");
 848                         goto error_out;
 849                 }
 850                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 851                 break;
 852         case RTE_CRYPTO_CIPHER_3DES_ECB:
 853         case RTE_CRYPTO_CIPHER_AES_ECB:
 854         case RTE_CRYPTO_CIPHER_AES_CCM:
 855         case RTE_CRYPTO_CIPHER_AES_F8:
 856         case RTE_CRYPTO_CIPHER_AES_XTS:
 857         case RTE_CRYPTO_CIPHER_ARC4:
 858         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 859                 PMD_DRV_LOG(ERR, "Crypto QAT PMD: Unsupported Cipher alg %u",
 860                                 cipher_xform->algo);
 861                 goto error_out;
 862         default:
 863                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 864                                 cipher_xform->algo);
 865                 goto error_out;
 866         }
 867
 868         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 869                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 870         else
 871                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 872
 873         if (qat_alg_aead_session_create_content_desc_cipher(session,
 874                                                 cipher_xform->key.data,
 875                                                 cipher_xform->key.length))
 876                 goto error_out;
 877
 878         return session;
 879
 880 error_out:
 881         if (session->bpi_ctx) {
 882                 bpi_cipher_ctx_free(session->bpi_ctx);
 883                 session->bpi_ctx = NULL;
 884         }
 885         return NULL;
 886 }
 887
 888
 889 void *
 890 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 891                 struct rte_crypto_sym_xform *xform, void *session_private)
 892 {
 893         struct qat_session *session = session_private;
 894
 895         int qat_cmd_id;
 896         PMD_INIT_FUNC_TRACE();
 897
 898         /* Get requested QAT command id */
 899         qat_cmd_id = qat_get_cmd_id(xform);
 900         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 901                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 902                 goto error_out;
 903         }
 904         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 905         switch (session->qat_cmd) {
 906         case ICP_QAT_FW_LA_CMD_CIPHER:
 907         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 908                 break;
 909         case ICP_QAT_FW_LA_CMD_AUTH:
 910         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 911                 break;
 912         case ICP_QAT_FW_LA_CMD_CIPHER_HASH:
 913         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 914         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 915                 break;
 916         case ICP_QAT_FW_LA_CMD_HASH_CIPHER:
 917         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 918         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 919                 break;
 920         case ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM:
 921         case ICP_QAT_FW_LA_CMD_TRNG_TEST:
 922         case ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE:
 923         case ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE:
 924         case ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE:
 925         case ICP_QAT_FW_LA_CMD_MGF1:
 926         case ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP:
 927         case ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP:
 928         case ICP_QAT_FW_LA_CMD_DELIMITER:
 929         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 930                 session->qat_cmd);
 931                 goto error_out;
 932         default:
 933         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 934                 session->qat_cmd);
 935                 goto error_out;
 936         }
 937
 938         return session;
 939
 940 error_out:
 941         return NULL;
 942 }
 943
 944 struct qat_session *
 945 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev __rte_unused,
 946                                 struct rte_crypto_sym_xform *xform,
 947                                 struct qat_session *session_private)
 948 {
 949
 950         struct qat_session *session = session_private;
 951         struct rte_crypto_auth_xform *auth_xform = NULL;
 952         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 953         auth_xform = qat_get_auth_xform(xform);
 954
 955         switch (auth_xform->algo) {
 956         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 957                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 958                 break;
 959         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 960                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
 961                 break;
 962         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 963                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 964                 break;
 965         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 966                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA384;
 967                 break;
 968         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 969                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 970                 break;
 971         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 972                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 973                 break;
 974         case RTE_CRYPTO_AUTH_AES_GCM:
 975                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 976                 break;
 977         case RTE_CRYPTO_AUTH_AES_GMAC:
 978                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 979                 break;
 980         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 981                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 982                 break;
 983         case RTE_CRYPTO_AUTH_MD5_HMAC:
 984                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
 985                 break;
 986         case RTE_CRYPTO_AUTH_NULL:
 987                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 988                 break;
 989         case RTE_CRYPTO_AUTH_KASUMI_F9:
 990                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
 991                 break;
 992         case RTE_CRYPTO_AUTH_SHA1:
 993         case RTE_CRYPTO_AUTH_SHA256:
 994         case RTE_CRYPTO_AUTH_SHA512:
 995         case RTE_CRYPTO_AUTH_SHA224:
 996         case RTE_CRYPTO_AUTH_SHA384:
 997         case RTE_CRYPTO_AUTH_MD5:
 998         case RTE_CRYPTO_AUTH_AES_CCM:
 999         case RTE_CRYPTO_AUTH_AES_CMAC:
1000         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1001         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1002                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
1003                                 auth_xform->algo);
1004                 goto error_out;
1005         default:
1006                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
1007                                 auth_xform->algo);
1008                 goto error_out;
1009         }
1010         cipher_xform = qat_get_cipher_xform(xform);
1011
1012         if ((session->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128) ||
1013                         (session->qat_hash_alg ==
1014                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_64))  {
1015                 if (qat_alg_aead_session_create_content_desc_auth(session,
1016                                 cipher_xform->key.data,
1017                                 cipher_xform->key.length,
1018                                 auth_xform->add_auth_data_length,
1019                                 auth_xform->digest_length,
1020                                 auth_xform->op))
1021                         goto error_out;
1022         } else {
1023                 if (qat_alg_aead_session_create_content_desc_auth(session,
1024                                 auth_xform->key.data,
1025                                 auth_xform->key.length,
1026                                 auth_xform->add_auth_data_length,
1027                                 auth_xform->digest_length,
1028                                 auth_xform->op))
1029                         goto error_out;
1030         }
1031         return session;
1032
1033 error_out:
1034         return NULL;
1035 }
1036
1037 unsigned qat_crypto_sym_get_session_private_size(
1038                 struct rte_cryptodev *dev __rte_unused)
1039 {
1040         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
1041 }
1042
1043 static inline uint32_t
1044 qat_bpicipher_preprocess(struct qat_session *ctx,
1045                                 struct rte_crypto_op *op)
1046 {
1047         uint8_t block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
1048         struct rte_crypto_sym_op *sym_op = op->sym;
1049         uint8_t last_block_len = sym_op->cipher.data.length % block_len;
1050
1051         if (last_block_len &&
1052                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
1053
1054                 /* Decrypt last block */
1055                 uint8_t *last_block, *dst, *iv;
1056                 uint32_t last_block_offset = sym_op->cipher.data.offset +
1057                                 sym_op->cipher.data.length - last_block_len;
1058                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
1059                                 uint8_t *, last_block_offset);
1060
1061                 if (unlikely(sym_op->m_dst != NULL))
1062                         /* out-of-place operation (OOP) */
1063                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
1064                                                 uint8_t *, last_block_offset);
1065                 else
1066                         dst = last_block;
1067
1068                 if (last_block_len < sym_op->cipher.data.length)
1069                         /* use previous block ciphertext as IV */
1070                         iv = last_block - block_len;
1071                 else
1072                         /* runt block, i.e. less than one full block */
1073                         iv = sym_op->cipher.iv.data;
1074
1075 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1076                 rte_hexdump(stdout, "BPI: src before pre-process:", last_block,
1077                         last_block_len);
1078                 if (sym_op->m_dst != NULL)
1079                         rte_hexdump(stdout, "BPI: dst before pre-process:", dst,
1080                                 last_block_len);
1081 #endif
1082                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
1083                                 last_block_len, ctx->bpi_ctx);
1084 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1085                 rte_hexdump(stdout, "BPI: src after pre-process:", last_block,
1086                         last_block_len);
1087                 if (sym_op->m_dst != NULL)
1088                         rte_hexdump(stdout, "BPI: dst after pre-process:", dst,
1089                                 last_block_len);
1090 #endif
1091         }
1092
1093         return sym_op->cipher.data.length - last_block_len;
1094 }
1095
1096 static inline uint32_t
1097 qat_bpicipher_postprocess(struct qat_session *ctx,
1098                                 struct rte_crypto_op *op)
1099 {
1100         uint8_t block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
1101         struct rte_crypto_sym_op *sym_op = op->sym;
1102         uint8_t last_block_len = sym_op->cipher.data.length % block_len;
1103
1104         if (last_block_len > 0 &&
1105                         ctx->qat_dir == ICP_QAT_HW_CIPHER_ENCRYPT) {
1106
1107                 /* Encrypt last block */
1108                 uint8_t *last_block, *dst, *iv;
1109                 uint32_t last_block_offset;
1110
1111                 last_block_offset = sym_op->cipher.data.offset +
1112                                 sym_op->cipher.data.length - last_block_len;
1113                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
1114                                 uint8_t *, last_block_offset);
1115
1116                 if (unlikely(sym_op->m_dst != NULL))
1117                         /* out-of-place operation (OOP) */
1118                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
1119                                                 uint8_t *, last_block_offset);
1120                 else
1121                         dst = last_block;
1122
1123                 if (last_block_len < sym_op->cipher.data.length)
1124                         /* use previous block ciphertext as IV */
1125                         iv = dst - block_len;
1126                 else
1127                         /* runt block, i.e. less than one full block */
1128                         iv = sym_op->cipher.iv.data;
1129
1130 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
1131                 rte_hexdump(stdout, "BPI: src before post-process:", last_block,
1132                         last_block_len);
1133                 if (sym_op->m_dst != NULL)
1134                         rte_hexdump(stdout, "BPI: dst before post-process:",
1135                                         dst, last_block_len);
1136 #endif
1137                 bpi_cipher_encrypt(last_block, dst, iv, block_len,
1138                                 last_block_len, ctx->bpi_ctx);
1139 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
1140                 rte_hexdump(stdout, "BPI: src after post-process:", last_block,
1141                         last_block_len);
1142                 if (sym_op->m_dst != NULL)
1143                         rte_hexdump(stdout, "BPI: dst after post-process:", dst,
1144                                 last_block_len);
1145 #endif
1146         }
1147         return sym_op->cipher.data.length - last_block_len;
1148 }
1149
1150 uint16_t
1151 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
1152                 uint16_t nb_ops)
1153 {
1154         register struct qat_queue *queue;
1155         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
1156         register uint32_t nb_ops_sent = 0;
1157         register struct rte_crypto_op **cur_op = ops;
1158         register int ret;
1159         uint16_t nb_ops_possible = nb_ops;
1160         register uint8_t *base_addr;
1161         register uint32_t tail;
1162         int overflow;
1163
1164         if (unlikely(nb_ops == 0))
1165                 return 0;
1166
1167         /* read params used a lot in main loop into registers */
1168         queue = &(tmp_qp->tx_q);
1169         base_addr = (uint8_t *)queue->base_addr;
1170         tail = queue->tail;
1171
1172         /* Find how many can actually fit on the ring */
1173         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
1174                                 - queue->max_inflights;
1175         if (overflow > 0) {
1176                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
1177                 nb_ops_possible = nb_ops - overflow;
1178                 if (nb_ops_possible == 0)
1179                         return 0;
1180         }
1181
1182         while (nb_ops_sent != nb_ops_possible) {
1183                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail,
1184                                 tmp_qp->op_cookies[tail / queue->msg_size]);
1185                 if (ret != 0) {
1186                         tmp_qp->stats.enqueue_err_count++;
1187                         /*
1188                          * This message cannot be enqueued,
1189                          * decrease number of ops that wasnt sent
1190                          */
1191                         rte_atomic16_sub(&tmp_qp->inflights16,
1192                                         nb_ops_possible - nb_ops_sent);
1193                         if (nb_ops_sent == 0)
1194                                 return 0;
1195                         goto kick_tail;
1196                 }
1197
1198                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
1199                 nb_ops_sent++;
1200                 cur_op++;
1201         }
1202 kick_tail:
1203         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
1204                         queue->hw_queue_number, tail);
1205         queue->tail = tail;
1206         tmp_qp->stats.enqueued_count += nb_ops_sent;
1207         return nb_ops_sent;
1208 }
1209
1210 uint16_t
1211 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
1212                 uint16_t nb_ops)
1213 {
1214         struct qat_queue *queue;
1215         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
1216         uint32_t msg_counter = 0;
1217         struct rte_crypto_op *rx_op;
1218         struct icp_qat_fw_comn_resp *resp_msg;
1219
1220         queue = &(tmp_qp->rx_q);
1221         resp_msg = (struct icp_qat_fw_comn_resp *)
1222                         ((uint8_t *)queue->base_addr + queue->head);
1223
1224         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
1225                         msg_counter != nb_ops) {
1226                 rx_op = (struct rte_crypto_op *)(uintptr_t)
1227                                 (resp_msg->opaque_data);
1228
1229 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
1230                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
1231                         sizeof(struct icp_qat_fw_comn_resp));
1232 #endif
1233                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
1234                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
1235                                         resp_msg->comn_hdr.comn_status)) {
1236                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
1237                 } else {
1238                         struct qat_session *sess = (struct qat_session *)
1239                                                 (rx_op->sym->session->_private);
1240                         if (sess->bpi_ctx)
1241                                 qat_bpicipher_postprocess(sess, rx_op);
1242                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1243                 }
1244
1245                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
1246                 queue->head = adf_modulo(queue->head +
1247                                 queue->msg_size,
1248                                 ADF_RING_SIZE_MODULO(queue->queue_size));
1249                 resp_msg = (struct icp_qat_fw_comn_resp *)
1250                                         ((uint8_t *)queue->base_addr +
1251                                                         queue->head);
1252                 *ops = rx_op;
1253                 ops++;
1254                 msg_counter++;
1255         }
1256         if (msg_counter > 0) {
1257                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
1258                                         queue->hw_bundle_number,
1259                                         queue->hw_queue_number, queue->head);
1260                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
1261                 tmp_qp->stats.dequeued_count += msg_counter;
1262         }
1263         return msg_counter;
1264 }
1265
1266 static inline int
1267 qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buff_start,
1268                 struct qat_alg_buf_list *list, uint32_t data_len)
1269 {
1270         int nr = 1;
1271
1272         uint32_t buf_len = rte_pktmbuf_mtophys(buf) -
1273                         buff_start + rte_pktmbuf_data_len(buf);
1274
1275         list->bufers[0].addr = buff_start;
1276         list->bufers[0].resrvd = 0;
1277         list->bufers[0].len = buf_len;
1278
1279         if (data_len <= buf_len) {
1280                 list->num_bufs = nr;
1281                 list->bufers[0].len = data_len;
1282                 return 0;
1283         }
1284
1285         buf = buf->next;
1286         while (buf) {
1287                 if (unlikely(nr == QAT_SGL_MAX_NUMBER)) {
1288                         PMD_DRV_LOG(ERR, "QAT PMD exceeded size of QAT SGL"
1289                                         " entry(%u)",
1290                                         QAT_SGL_MAX_NUMBER);
1291                         return -EINVAL;
1292                 }
1293
1294                 list->bufers[nr].len = rte_pktmbuf_data_len(buf);
1295                 list->bufers[nr].resrvd = 0;
1296                 list->bufers[nr].addr = rte_pktmbuf_mtophys(buf);
1297
1298                 buf_len += list->bufers[nr].len;
1299                 buf = buf->next;
1300
1301                 if (buf_len > data_len) {
1302                         list->bufers[nr].len -=
1303                                 buf_len - data_len;
1304                         buf = NULL;
1305                 }
1306                 ++nr;
1307         }
1308         list->num_bufs = nr;
1309
1310         return 0;
1311 }
1312
1313 static inline int
1314 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,
1315                 struct qat_crypto_op_cookie *qat_op_cookie)
1316 {
1317         int ret = 0;
1318         struct qat_session *ctx;
1319         struct icp_qat_fw_la_cipher_req_params *cipher_param;
1320         struct icp_qat_fw_la_auth_req_params *auth_param;
1321         register struct icp_qat_fw_la_bulk_req *qat_req;
1322         uint8_t do_auth = 0, do_cipher = 0;
1323         uint32_t cipher_len = 0, cipher_ofs = 0;
1324         uint32_t auth_len = 0, auth_ofs = 0;
1325         uint32_t min_ofs = 0;
1326         uint64_t src_buf_start = 0, dst_buf_start = 0;
1327         uint8_t do_sgl = 0;
1328
1329
1330 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1331         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
1332                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
1333                                 "operation requests, op (%p) is not a "
1334                                 "symmetric operation.", op);
1335                 return -EINVAL;
1336         }
1337 #endif
1338         if (unlikely(op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
1339                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
1340                                 " requests, op (%p) is sessionless.", op);
1341                 return -EINVAL;
1342         }
1343
1344         if (unlikely(op->sym->session->dev_type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
1345                 PMD_DRV_LOG(ERR, "Session was not created for this device");
1346                 return -EINVAL;
1347         }
1348
1349         ctx = (struct qat_session *)op->sym->session->_private;
1350         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
1351         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
1352         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
1353         cipher_param = (void *)&qat_req->serv_specif_rqpars;
1354         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
1355
1356         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
1357                 ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
1358                 do_auth = 1;
1359                 do_cipher = 1;
1360         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
1361                 do_auth = 1;
1362                 do_cipher = 0;
1363         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
1364                 do_auth = 0;
1365                 do_cipher = 1;
1366         }
1367
1368         if (do_cipher) {
1369
1370                 if (ctx->qat_cipher_alg ==
1371                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
1372                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
1373
1374                         if (unlikely(
1375                                 (cipher_param->cipher_length % BYTE_LENGTH != 0)
1376                                  || (cipher_param->cipher_offset
1377                                                         % BYTE_LENGTH != 0))) {
1378                                 PMD_DRV_LOG(ERR,
1379                   "SNOW3G/KASUMI in QAT PMD only supports byte aligned values");
1380                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
1381                                 return -EINVAL;
1382                         }
1383                         cipher_len = op->sym->cipher.data.length >> 3;
1384                         cipher_ofs = op->sym->cipher.data.offset >> 3;
1385
1386                 } else if (ctx->bpi_ctx) {
1387                         /* DOCSIS - only send complete blocks to device
1388                          * Process any partial block using CFB mode.
1389                          * Even if 0 complete blocks, still send this to device
1390                          * to get into rx queue for post-process and dequeuing
1391                          */
1392                         cipher_len = qat_bpicipher_preprocess(ctx, op);
1393                         cipher_ofs = op->sym->cipher.data.offset;
1394                 } else {
1395                         cipher_len = op->sym->cipher.data.length;
1396                         cipher_ofs = op->sym->cipher.data.offset;
1397                 }
1398
1399                 /* copy IV into request if it fits */
1400                 if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
1401                                 sizeof(cipher_param->u.cipher_IV_array))) {
1402                         rte_memcpy(cipher_param->u.cipher_IV_array,
1403                                         op->sym->cipher.iv.data,
1404                                         op->sym->cipher.iv.length);
1405                 } else {
1406                         ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
1407                                         qat_req->comn_hdr.serv_specif_flags,
1408                                         ICP_QAT_FW_CIPH_IV_64BIT_PTR);
1409                         cipher_param->u.s.cipher_IV_ptr =
1410                                         op->sym->cipher.iv.phys_addr;
1411                 }
1412                 min_ofs = cipher_ofs;
1413         }
1414
1415         if (do_auth) {
1416
1417                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
1418                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
1419                         if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0)
1420                                 || (auth_param->auth_len % BYTE_LENGTH != 0))) {
1421                                 PMD_DRV_LOG(ERR,
1422                 "For SNOW3G/KASUMI, QAT PMD only supports byte aligned values");
1423                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
1424                                 return -EINVAL;
1425                         }
1426                         auth_ofs = op->sym->auth.data.offset >> 3;
1427                         auth_len = op->sym->auth.data.length >> 3;
1428
1429                         if (ctx->qat_hash_alg ==
1430                                         ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
1431                                 if (do_cipher) {
1432                                         auth_len = auth_len + auth_ofs + 1 -
1433                                                 ICP_QAT_HW_KASUMI_BLK_SZ;
1434                                         auth_ofs = ICP_QAT_HW_KASUMI_BLK_SZ;
1435                                 } else {
1436                                         auth_len = auth_len + auth_ofs + 1;
1437                                         auth_ofs = 0;
1438                                 }
1439                         }
1440
1441                 } else {
1442                         auth_ofs = op->sym->auth.data.offset;
1443                         auth_len = op->sym->auth.data.length;
1444                 }
1445                 min_ofs = auth_ofs;
1446
1447                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
1448
1449                 auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
1450
1451         }
1452
1453         if (op->sym->m_src->next || (op->sym->m_dst && op->sym->m_dst->next))
1454                 do_sgl = 1;
1455
1456         /* adjust for chain case */
1457         if (do_cipher && do_auth)
1458                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
1459
1460         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
1461                 min_ofs = 0;
1462
1463         if (unlikely(op->sym->m_dst != NULL)) {
1464                 /* Out-of-place operation (OOP)
1465                  * Don't align DMA start. DMA the minimum data-set
1466                  * so as not to overwrite data in dest buffer
1467                  */
1468                 src_buf_start =
1469                         rte_pktmbuf_mtophys_offset(op->sym->m_src, min_ofs);
1470                 dst_buf_start =
1471                         rte_pktmbuf_mtophys_offset(op->sym->m_dst, min_ofs);
1472
1473         } else {
1474                 /* In-place operation
1475                  * Start DMA at nearest aligned address below min_ofs
1476                  */
1477                 src_buf_start =
1478                         rte_pktmbuf_mtophys_offset(op->sym->m_src, min_ofs)
1479                                                 & QAT_64_BTYE_ALIGN_MASK;
1480
1481                 if (unlikely((rte_pktmbuf_mtophys(op->sym->m_src) -
1482                                         rte_pktmbuf_headroom(op->sym->m_src))
1483                                                         > src_buf_start)) {
1484                         /* alignment has pushed addr ahead of start of mbuf
1485                          * so revert and take the performance hit
1486                          */
1487                         src_buf_start =
1488                                 rte_pktmbuf_mtophys_offset(op->sym->m_src,
1489                                                                 min_ofs);
1490                 }
1491                 dst_buf_start = src_buf_start;
1492         }
1493
1494         if (do_cipher) {
1495                 cipher_param->cipher_offset =
1496                                 (uint32_t)rte_pktmbuf_mtophys_offset(
1497                                 op->sym->m_src, cipher_ofs) - src_buf_start;
1498                 cipher_param->cipher_length = cipher_len;
1499         } else {
1500                 cipher_param->cipher_offset = 0;
1501                 cipher_param->cipher_length = 0;
1502         }
1503         if (do_auth) {
1504                 auth_param->auth_off = (uint32_t)rte_pktmbuf_mtophys_offset(
1505                                 op->sym->m_src, auth_ofs) - src_buf_start;
1506                 auth_param->auth_len = auth_len;
1507         } else {
1508                 auth_param->auth_off = 0;
1509                 auth_param->auth_len = 0;
1510         }
1511         qat_req->comn_mid.dst_length =
1512                 qat_req->comn_mid.src_length =
1513                 (cipher_param->cipher_offset + cipher_param->cipher_length)
1514                 > (auth_param->auth_off + auth_param->auth_len) ?
1515                 (cipher_param->cipher_offset + cipher_param->cipher_length)
1516                 : (auth_param->auth_off + auth_param->auth_len);
1517
1518         if (do_sgl) {
1519
1520                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
1521                                 QAT_COMN_PTR_TYPE_SGL);
1522                 ret = qat_sgl_fill_array(op->sym->m_src, src_buf_start,
1523                                 &qat_op_cookie->qat_sgl_list_src,
1524                                 qat_req->comn_mid.src_length);
1525                 if (ret) {
1526                         PMD_DRV_LOG(ERR, "QAT PMD Cannot fill sgl array");
1527                         return ret;
1528                 }
1529
1530                 if (likely(op->sym->m_dst == NULL))
1531                         qat_req->comn_mid.dest_data_addr =
1532                                 qat_req->comn_mid.src_data_addr =
1533                                 qat_op_cookie->qat_sgl_src_phys_addr;
1534                 else {
1535                         ret = qat_sgl_fill_array(op->sym->m_dst,
1536                                         dst_buf_start,
1537                                         &qat_op_cookie->qat_sgl_list_dst,
1538                                                 qat_req->comn_mid.dst_length);
1539
1540                         if (ret) {
1541                                 PMD_DRV_LOG(ERR, "QAT PMD Cannot "
1542                                                 "fill sgl array");
1543                                 return ret;
1544                         }
1545
1546                         qat_req->comn_mid.src_data_addr =
1547                                 qat_op_cookie->qat_sgl_src_phys_addr;
1548                         qat_req->comn_mid.dest_data_addr =
1549                                         qat_op_cookie->qat_sgl_dst_phys_addr;
1550                 }
1551         } else {
1552                 qat_req->comn_mid.src_data_addr = src_buf_start;
1553                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
1554         }
1555
1556         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
1557                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
1558                 if (op->sym->cipher.iv.length == 12) {
1559                         /*
1560                          * For GCM a 12 bit IV is allowed,
1561                          * but we need to inform the f/w
1562                          */
1563                         ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
1564                                 qat_req->comn_hdr.serv_specif_flags,
1565                                 ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
1566                 }
1567                 if (op->sym->cipher.data.length == 0) {
1568                         /*
1569                          * GMAC
1570                          */
1571                         qat_req->comn_mid.dest_data_addr =
1572                                 qat_req->comn_mid.src_data_addr =
1573                                                 op->sym->auth.aad.phys_addr;
1574                         qat_req->comn_mid.dst_length =
1575                                 qat_req->comn_mid.src_length =
1576                                         rte_pktmbuf_data_len(op->sym->m_src);
1577                         cipher_param->cipher_length = 0;
1578                         cipher_param->cipher_offset = 0;
1579                         auth_param->u1.aad_adr = 0;
1580                         auth_param->auth_len = op->sym->auth.aad.length;
1581                         auth_param->auth_off = op->sym->auth.data.offset;
1582                         auth_param->u2.aad_sz = 0;
1583                 }
1584         }
1585
1586 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1587         rte_hexdump(stdout, "qat_req:", qat_req,
1588                         sizeof(struct icp_qat_fw_la_bulk_req));
1589         rte_hexdump(stdout, "src_data:",
1590                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
1591                         rte_pktmbuf_data_len(op->sym->m_src));
1592         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
1593                         op->sym->cipher.iv.length);
1594         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
1595                         op->sym->auth.digest.length);
1596         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
1597                         op->sym->auth.aad.length);
1598 #endif
1599         return 0;
1600 }
1601
1602 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
1603 {
1604         uint32_t div = data >> shift;
1605         uint32_t mult = div << shift;
1606
1607         return data - mult;
1608 }
1609
1610 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *sym_sess)
1611 {
1612         struct rte_cryptodev_sym_session *sess = sym_sess;
1613         struct qat_session *s = (void *)sess->_private;
1614
1615         PMD_INIT_FUNC_TRACE();
1616         s->cd_paddr = rte_mempool_virt2phy(mp, sess) +
1617                 offsetof(struct qat_session, cd) +
1618                 offsetof(struct rte_cryptodev_sym_session, _private);
1619 }
1620
1621 int qat_dev_config(__rte_unused struct rte_cryptodev *dev,
1622                 __rte_unused struct rte_cryptodev_config *config)
1623 {
1624         PMD_INIT_FUNC_TRACE();
1625         return 0;
1626 }
1627
1628 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
1629 {
1630         PMD_INIT_FUNC_TRACE();
1631         return 0;
1632 }
1633
1634 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
1635 {
1636         PMD_INIT_FUNC_TRACE();
1637 }
1638
1639 int qat_dev_close(struct rte_cryptodev *dev)
1640 {
1641         int i, ret;
1642
1643         PMD_INIT_FUNC_TRACE();
1644
1645         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1646                 ret = qat_crypto_sym_qp_release(dev, i);
1647                 if (ret < 0)
1648                         return ret;
1649         }
1650
1651         return 0;
1652 }
1653
1654 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
1655                                 struct rte_cryptodev_info *info)
1656 {
1657         struct qat_pmd_private *internals = dev->data->dev_private;
1658
1659         PMD_INIT_FUNC_TRACE();
1660         if (info != NULL) {
1661                 info->max_nb_queue_pairs =
1662                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
1663                                 ADF_NUM_BUNDLES_PER_DEV;
1664                 info->feature_flags = dev->feature_flags;
1665                 info->capabilities = qat_pmd_capabilities;
1666                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1667                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
1668         }
1669 }
1670
1671 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
1672                 struct rte_cryptodev_stats *stats)
1673 {
1674         int i;
1675         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1676
1677         PMD_INIT_FUNC_TRACE();
1678         if (stats == NULL) {
1679                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1680                 return;
1681         }
1682         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1683                 if (qp[i] == NULL) {
1684                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1685                         continue;
1686                 }
1687
1688                 stats->enqueued_count += qp[i]->stats.enqueued_count;
1689                 stats->dequeued_count += qp[i]->stats.enqueued_count;
1690                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
1691                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
1692         }
1693 }
1694
1695 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
1696 {
1697         int i;
1698         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1699
1700         PMD_INIT_FUNC_TRACE();
1701         for (i = 0; i < dev->data->nb_queue_pairs; i++)
1702                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
1703         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
1704 }