drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_mempool.h>
  58 #include <rte_mbuf.h>
  59 #include <rte_string_fns.h>
  60 #include <rte_spinlock.h>
  61 #include <rte_hexdump.h>
  62
  63 #include "qat_logs.h"
  64 #include "qat_algs.h"
  65 #include "qat_crypto.h"
  66 #include "adf_transport_access_macros.h"
  67
  68 #define BYTE_LENGTH    8
  69
  70 static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
  71         {       /* SHA1 HMAC */
  72                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  73                 {.sym = {
  74                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  75                         {.auth = {
  76                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  77                                 .block_size = 64,
  78                                 .key_size = {
  79                                         .min = 64,
  80                                         .max = 64,
  81                                         .increment = 0
  82                                 },
  83                                 .digest_size = {
  84                                         .min = 20,
  85                                         .max = 20,
  86                                         .increment = 0
  87                                 },
  88                                 .aad_size = { 0 }
  89                         }, }
  90                 }, }
  91         },
  92         {       /* SHA224 HMAC */
  93                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  94                 {.sym = {
  95                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  96                         {.auth = {
  97                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  98                                 .block_size = 64,
  99                                         .key_size = {
 100                                         .min = 64,
 101                                         .max = 64,
 102                                         .increment = 0
 103                                 },
 104                                 .digest_size = {
 105                                         .min = 28,
 106                                         .max = 28,
 107                                         .increment = 0
 108                                 },
 109                                 .aad_size = { 0 }
 110                         }, }
 111                 }, }
 112         },
 113         {       /* SHA256 HMAC */
 114                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 115                 {.sym = {
 116                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 117                         {.auth = {
 118                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 119                                 .block_size = 64,
 120                                 .key_size = {
 121                                         .min = 64,
 122                                         .max = 64,
 123                                         .increment = 0
 124                                 },
 125                                 .digest_size = {
 126                                         .min = 32,
 127                                         .max = 32,
 128                                         .increment = 0
 129                                 },
 130                                 .aad_size = { 0 }
 131                         }, }
 132                 }, }
 133         },
 134         {       /* SHA384 HMAC */
 135                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 136                 {.sym = {
 137                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 138                         {.auth = {
 139                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 140                                 .block_size = 64,
 141                                 .key_size = {
 142                                         .min = 128,
 143                                         .max = 128,
 144                                         .increment = 0
 145                                 },
 146                                 .digest_size = {
 147                                         .min = 48,
 148                                         .max = 48,
 149                                         .increment = 0
 150                                         },
 151                                 .aad_size = { 0 }
 152                         }, }
 153                 }, }
 154         },
 155         {       /* SHA512 HMAC */
 156                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 157                 {.sym = {
 158                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 159                         {.auth = {
 160                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 161                                 .block_size = 128,
 162                                 .key_size = {
 163                                         .min = 128,
 164                                         .max = 128,
 165                                         .increment = 0
 166                                 },
 167                                 .digest_size = {
 168                                         .min = 64,
 169                                         .max = 64,
 170                                         .increment = 0
 171                                 },
 172                                 .aad_size = { 0 }
 173                         }, }
 174                 }, }
 175         },
 176         {       /* MD5 HMAC */
 177                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 178                 {.sym = {
 179                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 180                         {.auth = {
 181                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
 182                                 .block_size = 64,
 183                                 .key_size = {
 184                                         .min = 8,
 185                                         .max = 64,
 186                                         .increment = 8
 187                                 },
 188                                 .digest_size = {
 189                                         .min = 16,
 190                                         .max = 16,
 191                                         .increment = 0
 192                                 },
 193                                 .aad_size = { 0 }
 194                         }, }
 195                 }, }
 196         },
 197         {       /* AES XCBC MAC */
 198                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 199                 {.sym = {
 200                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 201                         {.auth = {
 202                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 203                                 .block_size = 16,
 204                                 .key_size = {
 205                                         .min = 16,
 206                                         .max = 16,
 207                                         .increment = 0
 208                                 },
 209                                 .digest_size = {
 210                                         .min = 16,
 211                                         .max = 16,
 212                                         .increment = 0
 213                                 },
 214                                 .aad_size = { 0 }
 215                         }, }
 216                 }, }
 217         },
 218         {       /* AES GCM (AUTH) */
 219                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 220                 {.sym = {
 221                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 222                         {.auth = {
 223                                 .algo = RTE_CRYPTO_AUTH_AES_GCM,
 224                                 .block_size = 16,
 225                                 .key_size = {
 226                                         .min = 16,
 227                                         .max = 32,
 228                                         .increment = 8
 229                                 },
 230                                 .digest_size = {
 231                                         .min = 8,
 232                                         .max = 16,
 233                                         .increment = 4
 234                                 },
 235                                 .aad_size = {
 236                                         .min = 8,
 237                                         .max = 12,
 238                                         .increment = 4
 239                                 }
 240                         }, }
 241                 }, }
 242         },
 243         {       /* AES GMAC (AUTH) */
 244                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 245                 {.sym = {
 246                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 247                         {.auth = {
 248                                 .algo = RTE_CRYPTO_AUTH_AES_GMAC,
 249                                 .block_size = 16,
 250                                 .key_size = {
 251                                         .min = 16,
 252                                         .max = 32,
 253                                         .increment = 8
 254                                 },
 255                                 .digest_size = {
 256                                         .min = 8,
 257                                         .max = 16,
 258                                         .increment = 4
 259                                 },
 260                                 .aad_size = {
 261                                         .min = 1,
 262                                         .max = 65535,
 263                                         .increment = 1
 264                                 }
 265                         }, }
 266                 }, }
 267         },
 268         {       /* SNOW 3G (UIA2) */
 269                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 270                 {.sym = {
 271                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 272                         {.auth = {
 273                                 .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
 274                                 .block_size = 16,
 275                                 .key_size = {
 276                                         .min = 16,
 277                                         .max = 16,
 278                                         .increment = 0
 279                                 },
 280                                 .digest_size = {
 281                                         .min = 4,
 282                                         .max = 4,
 283                                         .increment = 0
 284                                 },
 285                                 .aad_size = {
 286                                         .min = 16,
 287                                         .max = 16,
 288                                         .increment = 0
 289                                 }
 290                         }, }
 291                 }, }
 292         },
 293         {       /* AES GCM (CIPHER) */
 294                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 295                 {.sym = {
 296                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 297                         {.cipher = {
 298                                 .algo = RTE_CRYPTO_CIPHER_AES_GCM,
 299                                 .block_size = 16,
 300                                 .key_size = {
 301                                         .min = 16,
 302                                         .max = 32,
 303                                         .increment = 8
 304                                 },
 305                                 .iv_size = {
 306                                         .min = 16,
 307                                         .max = 16,
 308                                         .increment = 0
 309                                 }
 310                         }, }
 311                 }, }
 312         },
 313         {       /* AES CBC */
 314                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 315                 {.sym = {
 316                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 317                         {.cipher = {
 318                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 319                                 .block_size = 16,
 320                                 .key_size = {
 321                                         .min = 16,
 322                                         .max = 32,
 323                                         .increment = 8
 324                                 },
 325                                 .iv_size = {
 326                                         .min = 16,
 327                                         .max = 16,
 328                                         .increment = 0
 329                                 }
 330                         }, }
 331                 }, }
 332         },
 333         {       /* SNOW 3G (UEA2) */
 334                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 335                 {.sym = {
 336                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 337                         {.cipher = {
 338                                 .algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
 339                                 .block_size = 16,
 340                                 .key_size = {
 341                                         .min = 16,
 342                                         .max = 16,
 343                                         .increment = 0
 344                                 },
 345                                 .iv_size = {
 346                                         .min = 16,
 347                                         .max = 16,
 348                                         .increment = 0
 349                                 }
 350                         }, }
 351                 }, }
 352         },
 353         {       /* AES CTR */
 354                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 355                 {.sym = {
 356                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 357                         {.cipher = {
 358                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 359                                 .block_size = 16,
 360                                 .key_size = {
 361                                         .min = 16,
 362                                         .max = 32,
 363                                         .increment = 8
 364                                 },
 365                                 .iv_size = {
 366                                         .min = 16,
 367                                         .max = 16,
 368                                         .increment = 0
 369                                 }
 370                         }, }
 371                 }, }
 372         },
 373         {       /* NULL (AUTH) */
 374                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 375                 {.sym = {
 376                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 377                         {.auth = {
 378                                 .algo = RTE_CRYPTO_AUTH_NULL,
 379                                 .block_size = 1,
 380                                 .key_size = {
 381                                         .min = 0,
 382                                         .max = 0,
 383                                         .increment = 0
 384                                 },
 385                                 .digest_size = {
 386                                         .min = 0,
 387                                         .max = 0,
 388                                         .increment = 0
 389                                 },
 390                                 .aad_size = { 0 }
 391                         }, },
 392                 }, },
 393         },
 394         {       /* NULL (CIPHER) */
 395                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 396                 {.sym = {
 397                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 398                         {.cipher = {
 399                                 .algo = RTE_CRYPTO_CIPHER_NULL,
 400                                 .block_size = 1,
 401                                 .key_size = {
 402                                         .min = 0,
 403                                         .max = 0,
 404                                         .increment = 0
 405                                 },
 406                                 .iv_size = {
 407                                         .min = 0,
 408                                         .max = 0,
 409                                         .increment = 0
 410                                 }
 411                         }, },
 412                 }, }
 413         },
 414         {       /* KASUMI (F8) */
 415                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 416                 {.sym = {
 417                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 418                         {.cipher = {
 419                                 .algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
 420                                 .block_size = 8,
 421                                 .key_size = {
 422                                         .min = 16,
 423                                         .max = 16,
 424                                         .increment = 0
 425                                 },
 426                                 .iv_size = {
 427                                         .min = 8,
 428                                         .max = 8,
 429                                         .increment = 0
 430                                 }
 431                         }, }
 432                 }, }
 433         },
 434         {       /* KASUMI (F9) */
 435                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 436                 {.sym = {
 437                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 438                         {.auth = {
 439                                 .algo = RTE_CRYPTO_AUTH_KASUMI_F9,
 440                                 .block_size = 8,
 441                                 .key_size = {
 442                                         .min = 16,
 443                                         .max = 16,
 444                                         .increment = 0
 445                                 },
 446                                 .digest_size = {
 447                                         .min = 4,
 448                                         .max = 4,
 449                                         .increment = 0
 450                                 },
 451                                 .aad_size = {
 452                                         .min = 8,
 453                                         .max = 8,
 454                                         .increment = 0
 455                                 }
 456                         }, }
 457                 }, }
 458         },
 459         {       /* 3DES CBC */
 460                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 461                 {.sym = {
 462                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 463                         {.cipher = {
 464                                 .algo = RTE_CRYPTO_CIPHER_3DES_CBC,
 465                                 .block_size = 8,
 466                                 .key_size = {
 467                                         .min = 16,
 468                                         .max = 24,
 469                                         .increment = 8
 470                                 },
 471                                 .iv_size = {
 472                                         .min = 8,
 473                                         .max = 8,
 474                                         .increment = 0
 475                                 }
 476                         }, }
 477                 }, }
 478         },
 479         {       /* 3DES CTR */
 480                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 481                 {.sym = {
 482                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 483                         {.cipher = {
 484                                 .algo = RTE_CRYPTO_CIPHER_3DES_CTR,
 485                                 .block_size = 8,
 486                                 .key_size = {
 487                                         .min = 16,
 488                                         .max = 24,
 489                                         .increment = 8
 490                                 },
 491                                 .iv_size = {
 492                                         .min = 8,
 493                                         .max = 8,
 494                                         .increment = 0
 495                                 }
 496                         }, }
 497                 }, }
 498         },
 499         {       /* DES CBC */
 500                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 501                 {.sym = {
 502                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 503                         {.cipher = {
 504                                 .algo = RTE_CRYPTO_CIPHER_DES_CBC,
 505                                 .block_size = 8,
 506                                 .key_size = {
 507                                         .min = 8,
 508                                         .max = 8,
 509                                         .increment = 0
 510                                 },
 511                                 .iv_size = {
 512                                         .min = 8,
 513                                         .max = 8,
 514                                         .increment = 0
 515                                 }
 516                         }, }
 517                 }, }
 518         },
 519         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 520 };
 521
 522 static inline uint32_t
 523 adf_modulo(uint32_t data, uint32_t shift);
 524
 525 static inline int
 526 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
 527
 528 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
 529                 void *session)
 530 {
 531         struct qat_session *sess = session;
 532         phys_addr_t cd_paddr;
 533
 534         PMD_INIT_FUNC_TRACE();
 535         if (session) {
 536                 cd_paddr = sess->cd_paddr;
 537                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
 538                 sess->cd_paddr = cd_paddr;
 539         } else
 540                 PMD_DRV_LOG(ERR, "NULL session");
 541 }
 542
 543 static int
 544 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
 545 {
 546         /* Cipher Only */
 547         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
 548                 return ICP_QAT_FW_LA_CMD_CIPHER;
 549
 550         /* Authentication Only */
 551         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 552                 return ICP_QAT_FW_LA_CMD_AUTH;
 553
 554         if (xform->next == NULL)
 555                 return -1;
 556
 557         /* Cipher then Authenticate */
 558         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 559                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 560                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 561
 562         /* Authenticate then Cipher */
 563         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 564                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 565                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 566
 567         return -1;
 568 }
 569
 570 static struct rte_crypto_auth_xform *
 571 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 572 {
 573         do {
 574                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 575                         return &xform->auth;
 576
 577                 xform = xform->next;
 578         } while (xform);
 579
 580         return NULL;
 581 }
 582
 583 static struct rte_crypto_cipher_xform *
 584 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 585 {
 586         do {
 587                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 588                         return &xform->cipher;
 589
 590                 xform = xform->next;
 591         } while (xform);
 592
 593         return NULL;
 594 }
 595 void *
 596 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 597                 struct rte_crypto_sym_xform *xform, void *session_private)
 598 {
 599         struct qat_pmd_private *internals = dev->data->dev_private;
 600
 601         struct qat_session *session = session_private;
 602
 603         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 604
 605         /* Get cipher xform from crypto xform chain */
 606         cipher_xform = qat_get_cipher_xform(xform);
 607
 608         switch (cipher_xform->algo) {
 609         case RTE_CRYPTO_CIPHER_AES_CBC:
 610                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 611                                 &session->qat_cipher_alg) != 0) {
 612                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 613                         goto error_out;
 614                 }
 615                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 616                 break;
 617         case RTE_CRYPTO_CIPHER_AES_GCM:
 618                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 619                                 &session->qat_cipher_alg) != 0) {
 620                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 621                         goto error_out;
 622                 }
 623                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 624                 break;
 625         case RTE_CRYPTO_CIPHER_AES_CTR:
 626                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 627                                 &session->qat_cipher_alg) != 0) {
 628                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 629                         goto error_out;
 630                 }
 631                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 632                 break;
 633         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 634                 if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
 635                                         &session->qat_cipher_alg) != 0) {
 636                         PMD_DRV_LOG(ERR, "Invalid SNOW 3G cipher key size");
 637                         goto error_out;
 638                 }
 639                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 640                 break;
 641         case RTE_CRYPTO_CIPHER_NULL:
 642                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 643                 break;
 644         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 645                 if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
 646                                         &session->qat_cipher_alg) != 0) {
 647                         PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
 648                         goto error_out;
 649                 }
 650                 session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
 651                 break;
 652         case RTE_CRYPTO_CIPHER_3DES_CBC:
 653                 if (qat_alg_validate_3des_key(cipher_xform->key.length,
 654                                 &session->qat_cipher_alg) != 0) {
 655                         PMD_DRV_LOG(ERR, "Invalid 3DES cipher key size");
 656                         goto error_out;
 657                 }
 658                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 659                 break;
 660         case RTE_CRYPTO_CIPHER_DES_CBC:
 661                 if (qat_alg_validate_des_key(cipher_xform->key.length,
 662                                 &session->qat_cipher_alg) != 0) {
 663                         PMD_DRV_LOG(ERR, "Invalid DES cipher key size");
 664                         goto error_out;
 665                 }
 666                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 667                 break;
 668         case RTE_CRYPTO_CIPHER_3DES_CTR:
 669                 if (qat_alg_validate_3des_key(cipher_xform->key.length,
 670                                 &session->qat_cipher_alg) != 0) {
 671                         PMD_DRV_LOG(ERR, "Invalid 3DES cipher key size");
 672                         goto error_out;
 673                 }
 674                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 675                 break;
 676         case RTE_CRYPTO_CIPHER_3DES_ECB:
 677         case RTE_CRYPTO_CIPHER_AES_ECB:
 678         case RTE_CRYPTO_CIPHER_AES_CCM:
 679         case RTE_CRYPTO_CIPHER_AES_F8:
 680         case RTE_CRYPTO_CIPHER_AES_XTS:
 681         case RTE_CRYPTO_CIPHER_ARC4:
 682         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 683                 PMD_DRV_LOG(ERR, "Crypto QAT PMD: Unsupported Cipher alg %u",
 684                                 cipher_xform->algo);
 685                 goto error_out;
 686         default:
 687                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 688                                 cipher_xform->algo);
 689                 goto error_out;
 690         }
 691
 692         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 693                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 694         else
 695                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 696
 697         if (qat_alg_aead_session_create_content_desc_cipher(session,
 698                                                 cipher_xform->key.data,
 699                                                 cipher_xform->key.length))
 700                 goto error_out;
 701
 702         return session;
 703
 704 error_out:
 705         rte_mempool_put(internals->sess_mp, session);
 706         return NULL;
 707 }
 708
 709
 710 void *
 711 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 712                 struct rte_crypto_sym_xform *xform, void *session_private)
 713 {
 714         struct qat_pmd_private *internals = dev->data->dev_private;
 715
 716         struct qat_session *session = session_private;
 717
 718         int qat_cmd_id;
 719
 720         PMD_INIT_FUNC_TRACE();
 721
 722         /* Get requested QAT command id */
 723         qat_cmd_id = qat_get_cmd_id(xform);
 724         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 725                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 726                 goto error_out;
 727         }
 728         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 729         switch (session->qat_cmd) {
 730         case ICP_QAT_FW_LA_CMD_CIPHER:
 731         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 732                 break;
 733         case ICP_QAT_FW_LA_CMD_AUTH:
 734         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 735                 break;
 736         case ICP_QAT_FW_LA_CMD_CIPHER_HASH:
 737         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 738         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 739                 break;
 740         case ICP_QAT_FW_LA_CMD_HASH_CIPHER:
 741         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 742         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 743                 break;
 744         case ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM:
 745         case ICP_QAT_FW_LA_CMD_TRNG_TEST:
 746         case ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE:
 747         case ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE:
 748         case ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE:
 749         case ICP_QAT_FW_LA_CMD_MGF1:
 750         case ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP:
 751         case ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP:
 752         case ICP_QAT_FW_LA_CMD_DELIMITER:
 753         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 754                 session->qat_cmd);
 755                 goto error_out;
 756         default:
 757         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 758                 session->qat_cmd);
 759                 goto error_out;
 760         }
 761         return session;
 762
 763 error_out:
 764         rte_mempool_put(internals->sess_mp, session);
 765         return NULL;
 766 }
 767
 768 struct qat_session *
 769 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 770                                 struct rte_crypto_sym_xform *xform,
 771                                 struct qat_session *session_private)
 772 {
 773
 774         struct qat_pmd_private *internals = dev->data->dev_private;
 775         struct qat_session *session = session_private;
 776         struct rte_crypto_auth_xform *auth_xform = NULL;
 777         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 778         auth_xform = qat_get_auth_xform(xform);
 779
 780         switch (auth_xform->algo) {
 781         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 782                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 783                 break;
 784         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 785                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
 786                 break;
 787         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 788                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 789                 break;
 790         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 791                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA384;
 792                 break;
 793         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 794                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 795                 break;
 796         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 797                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 798                 break;
 799         case RTE_CRYPTO_AUTH_AES_GCM:
 800                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 801                 break;
 802         case RTE_CRYPTO_AUTH_AES_GMAC:
 803                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 804                 break;
 805         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 806                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 807                 break;
 808         case RTE_CRYPTO_AUTH_MD5_HMAC:
 809                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
 810                 break;
 811         case RTE_CRYPTO_AUTH_NULL:
 812                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 813                 break;
 814         case RTE_CRYPTO_AUTH_KASUMI_F9:
 815                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
 816                 break;
 817         case RTE_CRYPTO_AUTH_SHA1:
 818         case RTE_CRYPTO_AUTH_SHA256:
 819         case RTE_CRYPTO_AUTH_SHA512:
 820         case RTE_CRYPTO_AUTH_SHA224:
 821         case RTE_CRYPTO_AUTH_SHA384:
 822         case RTE_CRYPTO_AUTH_MD5:
 823         case RTE_CRYPTO_AUTH_AES_CCM:
 824         case RTE_CRYPTO_AUTH_AES_CMAC:
 825         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 826         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 827                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 828                                 auth_xform->algo);
 829                 goto error_out;
 830         default:
 831                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 832                                 auth_xform->algo);
 833                 goto error_out;
 834         }
 835         cipher_xform = qat_get_cipher_xform(xform);
 836
 837         if ((session->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128) ||
 838                         (session->qat_hash_alg ==
 839                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_64))  {
 840                 if (qat_alg_aead_session_create_content_desc_auth(session,
 841                                 cipher_xform->key.data,
 842                                 cipher_xform->key.length,
 843                                 auth_xform->add_auth_data_length,
 844                                 auth_xform->digest_length,
 845                                 auth_xform->op))
 846                         goto error_out;
 847         } else {
 848                 if (qat_alg_aead_session_create_content_desc_auth(session,
 849                                 auth_xform->key.data,
 850                                 auth_xform->key.length,
 851                                 auth_xform->add_auth_data_length,
 852                                 auth_xform->digest_length,
 853                                 auth_xform->op))
 854                         goto error_out;
 855         }
 856         return session;
 857
 858 error_out:
 859         if (internals->sess_mp != NULL)
 860                 rte_mempool_put(internals->sess_mp, session);
 861         return NULL;
 862 }
 863
 864 unsigned qat_crypto_sym_get_session_private_size(
 865                 struct rte_cryptodev *dev __rte_unused)
 866 {
 867         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 868 }
 869
 870 uint16_t
 871 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 872                 uint16_t nb_ops)
 873 {
 874         register struct qat_queue *queue;
 875         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 876         register uint32_t nb_ops_sent = 0;
 877         register struct rte_crypto_op **cur_op = ops;
 878         register int ret;
 879         uint16_t nb_ops_possible = nb_ops;
 880         register uint8_t *base_addr;
 881         register uint32_t tail;
 882         int overflow;
 883
 884         if (unlikely(nb_ops == 0))
 885                 return 0;
 886
 887         /* read params used a lot in main loop into registers */
 888         queue = &(tmp_qp->tx_q);
 889         base_addr = (uint8_t *)queue->base_addr;
 890         tail = queue->tail;
 891
 892         /* Find how many can actually fit on the ring */
 893         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 894                                 - queue->max_inflights;
 895         if (overflow > 0) {
 896                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 897                 nb_ops_possible = nb_ops - overflow;
 898                 if (nb_ops_possible == 0)
 899                         return 0;
 900         }
 901
 902         while (nb_ops_sent != nb_ops_possible) {
 903                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 904                 if (ret != 0) {
 905                         tmp_qp->stats.enqueue_err_count++;
 906                         if (nb_ops_sent == 0)
 907                                 return 0;
 908                         goto kick_tail;
 909                 }
 910
 911                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 912                 nb_ops_sent++;
 913                 cur_op++;
 914         }
 915 kick_tail:
 916         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 917                         queue->hw_queue_number, tail);
 918         queue->tail = tail;
 919         tmp_qp->stats.enqueued_count += nb_ops_sent;
 920         return nb_ops_sent;
 921 }
 922
 923 uint16_t
 924 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 925                 uint16_t nb_ops)
 926 {
 927         struct qat_queue *queue;
 928         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 929         uint32_t msg_counter = 0;
 930         struct rte_crypto_op *rx_op;
 931         struct icp_qat_fw_comn_resp *resp_msg;
 932
 933         queue = &(tmp_qp->rx_q);
 934         resp_msg = (struct icp_qat_fw_comn_resp *)
 935                         ((uint8_t *)queue->base_addr + queue->head);
 936
 937         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 938                         msg_counter != nb_ops) {
 939                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 940                                 (resp_msg->opaque_data);
 941
 942 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 943                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 944                                 sizeof(struct icp_qat_fw_comn_resp));
 945 #endif
 946                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 947                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 948                                         resp_msg->comn_hdr.comn_status)) {
 949                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 950                 } else {
 951                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 952                 }
 953                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 954                 queue->head = adf_modulo(queue->head +
 955                                 queue->msg_size,
 956                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 957                 resp_msg = (struct icp_qat_fw_comn_resp *)
 958                                         ((uint8_t *)queue->base_addr +
 959                                                         queue->head);
 960                 *ops = rx_op;
 961                 ops++;
 962                 msg_counter++;
 963         }
 964         if (msg_counter > 0) {
 965                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 966                                         queue->hw_bundle_number,
 967                                         queue->hw_queue_number, queue->head);
 968                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 969                 tmp_qp->stats.dequeued_count += msg_counter;
 970         }
 971         return msg_counter;
 972 }
 973
 974 static inline int
 975 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 976 {
 977         struct qat_session *ctx;
 978         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 979         struct icp_qat_fw_la_auth_req_params *auth_param;
 980         register struct icp_qat_fw_la_bulk_req *qat_req;
 981         uint8_t do_auth = 0, do_cipher = 0;
 982         uint32_t cipher_len = 0, cipher_ofs = 0;
 983         uint32_t auth_len = 0, auth_ofs = 0;
 984         uint32_t min_ofs = 0;
 985         uint64_t src_buf_start = 0, dst_buf_start = 0;
 986
 987
 988 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 989         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 990                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 991                                 "operation requests, op (%p) is not a "
 992                                 "symmetric operation.", op);
 993                 return -EINVAL;
 994         }
 995 #endif
 996         if (unlikely(op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 997                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 998                                 " requests, op (%p) is sessionless.", op);
 999                 return -EINVAL;
1000         }
1001
1002         if (unlikely(op->sym->session->dev_type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
1003                 PMD_DRV_LOG(ERR, "Session was not created for this device");
1004                 return -EINVAL;
1005         }
1006
1007         ctx = (struct qat_session *)op->sym->session->_private;
1008         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
1009         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
1010         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
1011         cipher_param = (void *)&qat_req->serv_specif_rqpars;
1012         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
1013
1014         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
1015                 ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
1016                 do_auth = 1;
1017                 do_cipher = 1;
1018         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
1019                 do_auth = 1;
1020                 do_cipher = 0;
1021         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
1022                 do_auth = 0;
1023                 do_cipher = 1;
1024         }
1025
1026         if (do_cipher) {
1027
1028                 if (ctx->qat_cipher_alg ==
1029                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
1030                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
1031
1032                         if (unlikely(
1033                                 (cipher_param->cipher_length % BYTE_LENGTH != 0)
1034                                  || (cipher_param->cipher_offset
1035                                                         % BYTE_LENGTH != 0))) {
1036                                 PMD_DRV_LOG(ERR,
1037                   "SNOW3G/KASUMI in QAT PMD only supports byte aligned values");
1038                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
1039                                 return -EINVAL;
1040                         }
1041                         cipher_len = op->sym->cipher.data.length >> 3;
1042                         cipher_ofs = op->sym->cipher.data.offset >> 3;
1043
1044                 } else {
1045                         cipher_len = op->sym->cipher.data.length;
1046                         cipher_ofs = op->sym->cipher.data.offset;
1047                 }
1048
1049                 /* copy IV into request if it fits */
1050                 if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
1051                                 sizeof(cipher_param->u.cipher_IV_array))) {
1052                         rte_memcpy(cipher_param->u.cipher_IV_array,
1053                                         op->sym->cipher.iv.data,
1054                                         op->sym->cipher.iv.length);
1055                 } else {
1056                         ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
1057                                         qat_req->comn_hdr.serv_specif_flags,
1058                                         ICP_QAT_FW_CIPH_IV_64BIT_PTR);
1059                         cipher_param->u.s.cipher_IV_ptr =
1060                                         op->sym->cipher.iv.phys_addr;
1061                 }
1062                 min_ofs = cipher_ofs;
1063         }
1064
1065         if (do_auth) {
1066
1067                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
1068                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
1069                         if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0)
1070                                 || (auth_param->auth_len % BYTE_LENGTH != 0))) {
1071                                 PMD_DRV_LOG(ERR,
1072                 "For SNOW3G/KASUMI, QAT PMD only supports byte aligned values");
1073                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
1074                                 return -EINVAL;
1075                         }
1076                         auth_ofs = op->sym->auth.data.offset >> 3;
1077                         auth_len = op->sym->auth.data.length >> 3;
1078
1079                         if (ctx->qat_hash_alg ==
1080                                         ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
1081                                 if (do_cipher) {
1082                                         auth_len = auth_len + auth_ofs + 1 -
1083                                                 ICP_QAT_HW_KASUMI_BLK_SZ;
1084                                         auth_ofs = ICP_QAT_HW_KASUMI_BLK_SZ;
1085                                 } else {
1086                                         auth_len = auth_len + auth_ofs + 1;
1087                                         auth_ofs = 0;
1088                                 }
1089                         }
1090
1091                 } else {
1092                         auth_ofs = op->sym->auth.data.offset;
1093                         auth_len = op->sym->auth.data.length;
1094                 }
1095                 min_ofs = auth_ofs;
1096
1097                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
1098
1099                 auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
1100
1101         }
1102
1103         /* adjust for chain case */
1104         if (do_cipher && do_auth)
1105                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
1106
1107         if (unlikely(op->sym->m_dst != NULL)) {
1108                 /* Out-of-place operation (OOP)
1109                  * Don't align DMA start. DMA the minimum data-set
1110                  * so as not to overwrite data in dest buffer
1111                  */
1112                 src_buf_start =
1113                         rte_pktmbuf_mtophys_offset(op->sym->m_src, min_ofs);
1114                 dst_buf_start =
1115                         rte_pktmbuf_mtophys_offset(op->sym->m_dst, min_ofs);
1116         } else {
1117                 /* In-place operation
1118                  * Start DMA at nearest aligned address below min_ofs
1119                  */
1120                 src_buf_start =
1121                         rte_pktmbuf_mtophys_offset(op->sym->m_src, min_ofs)
1122                                                 & QAT_64_BTYE_ALIGN_MASK;
1123
1124                 if (unlikely((rte_pktmbuf_mtophys(op->sym->m_src) -
1125                                         rte_pktmbuf_headroom(op->sym->m_src))
1126                                                         > src_buf_start)) {
1127                         /* alignment has pushed addr ahead of start of mbuf
1128                          * so revert and take the performance hit
1129                          */
1130                         src_buf_start =
1131                                 rte_pktmbuf_mtophys_offset(op->sym->m_src,
1132                                                                 min_ofs);
1133                 }
1134                 dst_buf_start = src_buf_start;
1135         }
1136
1137         if (do_cipher) {
1138                 cipher_param->cipher_offset =
1139                                 (uint32_t)rte_pktmbuf_mtophys_offset(
1140                                 op->sym->m_src, cipher_ofs) - src_buf_start;
1141                 cipher_param->cipher_length = cipher_len;
1142         } else {
1143                 cipher_param->cipher_offset = 0;
1144                 cipher_param->cipher_length = 0;
1145         }
1146         if (do_auth) {
1147                 auth_param->auth_off = (uint32_t)rte_pktmbuf_mtophys_offset(
1148                                 op->sym->m_src, auth_ofs) - src_buf_start;
1149                 auth_param->auth_len = auth_len;
1150         } else {
1151                 auth_param->auth_off = 0;
1152                 auth_param->auth_len = 0;
1153         }
1154         qat_req->comn_mid.dst_length =
1155                 qat_req->comn_mid.src_length =
1156                 (cipher_param->cipher_offset + cipher_param->cipher_length)
1157                 > (auth_param->auth_off + auth_param->auth_len) ?
1158                 (cipher_param->cipher_offset + cipher_param->cipher_length)
1159                 : (auth_param->auth_off + auth_param->auth_len);
1160
1161         qat_req->comn_mid.src_data_addr = src_buf_start;
1162         qat_req->comn_mid.dest_data_addr = dst_buf_start;
1163
1164         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
1165                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
1166                 if (op->sym->cipher.iv.length == 12) {
1167                         /*
1168                          * For GCM a 12 bit IV is allowed,
1169                          * but we need to inform the f/w
1170                          */
1171                         ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
1172                                 qat_req->comn_hdr.serv_specif_flags,
1173                                 ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
1174                 }
1175                 if (op->sym->cipher.data.length == 0) {
1176                         /*
1177                          * GMAC
1178                          */
1179                         qat_req->comn_mid.dest_data_addr =
1180                                 qat_req->comn_mid.src_data_addr =
1181                                                 op->sym->auth.aad.phys_addr;
1182                         qat_req->comn_mid.dst_length =
1183                                 qat_req->comn_mid.src_length =
1184                                         rte_pktmbuf_data_len(op->sym->m_src);
1185                         cipher_param->cipher_length = 0;
1186                         cipher_param->cipher_offset = 0;
1187                         auth_param->u1.aad_adr = 0;
1188                         auth_param->auth_len = op->sym->auth.aad.length;
1189                         auth_param->auth_off = op->sym->auth.data.offset;
1190                         auth_param->u2.aad_sz = 0;
1191                 }
1192         }
1193
1194
1195 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1196         rte_hexdump(stdout, "qat_req:", qat_req,
1197                         sizeof(struct icp_qat_fw_la_bulk_req));
1198         rte_hexdump(stdout, "src_data:",
1199                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
1200                         rte_pktmbuf_data_len(op->sym->m_src));
1201         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
1202                         op->sym->cipher.iv.length);
1203         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
1204                         op->sym->auth.digest.length);
1205         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
1206                         op->sym->auth.aad.length);
1207 #endif
1208         return 0;
1209 }
1210
1211 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
1212 {
1213         uint32_t div = data >> shift;
1214         uint32_t mult = div << shift;
1215
1216         return data - mult;
1217 }
1218
1219 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *sym_sess)
1220 {
1221         struct rte_cryptodev_sym_session *sess = sym_sess;
1222         struct qat_session *s = (void *)sess->_private;
1223
1224         PMD_INIT_FUNC_TRACE();
1225         s->cd_paddr = rte_mempool_virt2phy(mp, sess) +
1226                 offsetof(struct qat_session, cd) +
1227                 offsetof(struct rte_cryptodev_sym_session, _private);
1228 }
1229
1230 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
1231 {
1232         PMD_INIT_FUNC_TRACE();
1233         return -ENOTSUP;
1234 }
1235
1236 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
1237 {
1238         PMD_INIT_FUNC_TRACE();
1239         return 0;
1240 }
1241
1242 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
1243 {
1244         PMD_INIT_FUNC_TRACE();
1245 }
1246
1247 int qat_dev_close(struct rte_cryptodev *dev)
1248 {
1249         int i, ret;
1250
1251         PMD_INIT_FUNC_TRACE();
1252
1253         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1254                 ret = qat_crypto_sym_qp_release(dev, i);
1255                 if (ret < 0)
1256                         return ret;
1257         }
1258
1259         return 0;
1260 }
1261
1262 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
1263                                 struct rte_cryptodev_info *info)
1264 {
1265         struct qat_pmd_private *internals = dev->data->dev_private;
1266
1267         PMD_INIT_FUNC_TRACE();
1268         if (info != NULL) {
1269                 info->max_nb_queue_pairs =
1270                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
1271                                 ADF_NUM_BUNDLES_PER_DEV;
1272                 info->feature_flags = dev->feature_flags;
1273                 info->capabilities = qat_pmd_capabilities;
1274                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1275                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
1276         }
1277 }
1278
1279 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
1280                 struct rte_cryptodev_stats *stats)
1281 {
1282         int i;
1283         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1284
1285         PMD_INIT_FUNC_TRACE();
1286         if (stats == NULL) {
1287                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1288                 return;
1289         }
1290         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1291                 if (qp[i] == NULL) {
1292                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1293                         continue;
1294                 }
1295
1296                 stats->enqueued_count += qp[i]->stats.enqueued_count;
1297                 stats->dequeued_count += qp[i]->stats.enqueued_count;
1298                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
1299                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
1300         }
1301 }
1302
1303 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
1304 {
1305         int i;
1306         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1307
1308         PMD_INIT_FUNC_TRACE();
1309         for (i = 0; i < dev->data->nb_queue_pairs; i++)
1310                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
1311         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
1312 }