1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015-2018 Intel Corporation
5 #include <rte_bus_pci.h>
6 #include <rte_common.h>
8 #include <rte_malloc.h>
10 #include <rte_cryptodev_pmd.h>
11 #ifdef RTE_LIBRTE_SECURITY
12 #include <rte_security_driver.h>
17 #include "qat_sym_session.h"
18 #include "qat_sym_pmd.h"
20 #define MIXED_CRYPTO_MIN_FW_VER 0x04090000
22 uint8_t qat_sym_driver_id;
24 static const struct rte_cryptodev_capabilities qat_gen1_sym_capabilities[] = {
25 QAT_BASE_GEN1_SYM_CAPABILITIES,
26 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
29 static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {
30 QAT_BASE_GEN1_SYM_CAPABILITIES,
31 QAT_EXTRA_GEN2_SYM_CAPABILITIES,
32 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
35 static const struct rte_cryptodev_capabilities qat_gen3_sym_capabilities[] = {
36 QAT_BASE_GEN1_SYM_CAPABILITIES,
37 QAT_EXTRA_GEN2_SYM_CAPABILITIES,
38 QAT_EXTRA_GEN3_SYM_CAPABILITIES,
39 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
42 #ifdef RTE_LIBRTE_SECURITY
43 static const struct rte_cryptodev_capabilities
44 qat_security_sym_capabilities[] = {
45 QAT_SECURITY_SYM_CAPABILITIES,
46 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
49 static const struct rte_security_capability qat_security_capabilities[] = {
50 QAT_SECURITY_CAPABILITIES(qat_security_sym_capabilities),
52 .action = RTE_SECURITY_ACTION_TYPE_NONE
57 static int qat_sym_qp_release(struct rte_cryptodev *dev,
58 uint16_t queue_pair_id);
60 static int qat_sym_dev_config(__rte_unused struct rte_cryptodev *dev,
61 __rte_unused struct rte_cryptodev_config *config)
66 static int qat_sym_dev_start(__rte_unused struct rte_cryptodev *dev)
71 static void qat_sym_dev_stop(__rte_unused struct rte_cryptodev *dev)
76 static int qat_sym_dev_close(struct rte_cryptodev *dev)
80 for (i = 0; i < dev->data->nb_queue_pairs; i++) {
81 ret = qat_sym_qp_release(dev, i);
89 static void qat_sym_dev_info_get(struct rte_cryptodev *dev,
90 struct rte_cryptodev_info *info)
92 struct qat_sym_dev_private *internals = dev->data->dev_private;
93 const struct qat_qp_hw_data *sym_hw_qps =
94 qat_gen_config[internals->qat_dev->qat_dev_gen]
95 .qp_hw_data[QAT_SERVICE_SYMMETRIC];
98 info->max_nb_queue_pairs =
99 qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);
100 info->feature_flags = dev->feature_flags;
101 info->capabilities = internals->qat_dev_capabilities;
102 info->driver_id = qat_sym_driver_id;
103 /* No limit of number of sessions */
104 info->sym.max_nb_sessions = 0;
108 static void qat_sym_stats_get(struct rte_cryptodev *dev,
109 struct rte_cryptodev_stats *stats)
111 struct qat_common_stats qat_stats = {0};
112 struct qat_sym_dev_private *qat_priv;
114 if (stats == NULL || dev == NULL) {
115 QAT_LOG(ERR, "invalid ptr: stats %p, dev %p", stats, dev);
118 qat_priv = dev->data->dev_private;
120 qat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_SYMMETRIC);
121 stats->enqueued_count = qat_stats.enqueued_count;
122 stats->dequeued_count = qat_stats.dequeued_count;
123 stats->enqueue_err_count = qat_stats.enqueue_err_count;
124 stats->dequeue_err_count = qat_stats.dequeue_err_count;
127 static void qat_sym_stats_reset(struct rte_cryptodev *dev)
129 struct qat_sym_dev_private *qat_priv;
132 QAT_LOG(ERR, "invalid cryptodev ptr %p", dev);
135 qat_priv = dev->data->dev_private;
137 qat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_SYMMETRIC);
141 static int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
143 struct qat_sym_dev_private *qat_private = dev->data->dev_private;
145 QAT_LOG(DEBUG, "Release sym qp %u on device %d",
146 queue_pair_id, dev->data->dev_id);
148 qat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][queue_pair_id]
151 return qat_qp_release((struct qat_qp **)
152 &(dev->data->queue_pairs[queue_pair_id]));
155 static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
156 const struct rte_cryptodev_qp_conf *qp_conf,
162 struct qat_qp_config qat_qp_conf;
164 struct qat_qp **qp_addr =
165 (struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
166 struct qat_sym_dev_private *qat_private = dev->data->dev_private;
167 const struct qat_qp_hw_data *sym_hw_qps =
168 qat_gen_config[qat_private->qat_dev->qat_dev_gen]
169 .qp_hw_data[QAT_SERVICE_SYMMETRIC];
170 const struct qat_qp_hw_data *qp_hw_data = sym_hw_qps + qp_id;
172 /* If qp is already in use free ring memory and qp metadata. */
173 if (*qp_addr != NULL) {
174 ret = qat_sym_qp_release(dev, qp_id);
178 if (qp_id >= qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC)) {
179 QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
183 qat_qp_conf.hw = qp_hw_data;
184 qat_qp_conf.build_request = qat_sym_build_request;
185 qat_qp_conf.cookie_size = sizeof(struct qat_sym_op_cookie);
186 qat_qp_conf.nb_descriptors = qp_conf->nb_descriptors;
187 qat_qp_conf.socket_id = socket_id;
188 qat_qp_conf.service_str = "sym";
190 ret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf);
194 /* store a link to the qp in the qat_pci_device */
195 qat_private->qat_dev->qps_in_use[QAT_SERVICE_SYMMETRIC][qp_id]
198 qp = (struct qat_qp *)*qp_addr;
199 qp->min_enq_burst_threshold = qat_private->min_enq_burst_threshold;
201 for (i = 0; i < qp->nb_descriptors; i++) {
203 struct qat_sym_op_cookie *cookie =
206 cookie->qat_sgl_src_phys_addr =
207 rte_mempool_virt2iova(cookie) +
208 offsetof(struct qat_sym_op_cookie,
211 cookie->qat_sgl_dst_phys_addr =
212 rte_mempool_virt2iova(cookie) +
213 offsetof(struct qat_sym_op_cookie,
217 /* Get fw version from QAT (GEN2), skip if we've got it already */
218 if (qp->qat_dev_gen == QAT_GEN2 && !(qat_private->internal_capabilities
219 & QAT_SYM_CAP_VALID)) {
220 ret = qat_cq_get_fw_version(qp);
223 qat_sym_qp_release(dev, qp_id);
228 QAT_LOG(DEBUG, "QAT firmware version: %d.%d.%d",
233 QAT_LOG(DEBUG, "unknown QAT firmware version");
235 /* set capabilities based on the fw version */
236 qat_private->internal_capabilities = QAT_SYM_CAP_VALID |
237 ((ret >= MIXED_CRYPTO_MIN_FW_VER) ?
238 QAT_SYM_CAP_MIXED_CRYPTO : 0);
245 static struct rte_cryptodev_ops crypto_qat_ops = {
247 /* Device related operations */
248 .dev_configure = qat_sym_dev_config,
249 .dev_start = qat_sym_dev_start,
250 .dev_stop = qat_sym_dev_stop,
251 .dev_close = qat_sym_dev_close,
252 .dev_infos_get = qat_sym_dev_info_get,
254 .stats_get = qat_sym_stats_get,
255 .stats_reset = qat_sym_stats_reset,
256 .queue_pair_setup = qat_sym_qp_setup,
257 .queue_pair_release = qat_sym_qp_release,
259 /* Crypto related operations */
260 .sym_session_get_size = qat_sym_session_get_private_size,
261 .sym_session_configure = qat_sym_session_configure,
262 .sym_session_clear = qat_sym_session_clear
265 #ifdef RTE_LIBRTE_SECURITY
266 static const struct rte_security_capability *
267 qat_security_cap_get(void *device __rte_unused)
269 return qat_security_capabilities;
272 static struct rte_security_ops security_qat_ops = {
274 .session_create = qat_security_session_create,
275 .session_update = NULL,
276 .session_stats_get = NULL,
277 .session_destroy = qat_security_session_destroy,
278 .set_pkt_metadata = NULL,
279 .capabilities_get = qat_security_cap_get
284 qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
287 return qat_enqueue_op_burst(qp, (void **)ops, nb_ops);
291 qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
294 return qat_dequeue_op_burst(qp, (void **)ops, nb_ops);
297 /* An rte_driver is needed in the registration of both the device and the driver
299 * The actual qat pci's rte_driver can't be used as its name represents
300 * the whole pci device with all services. Think of this as a holder for a name
301 * for the crypto part of the pci device.
303 static const char qat_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_SYM_PMD);
304 static const struct rte_driver cryptodev_qat_sym_driver = {
305 .name = qat_sym_drv_name,
306 .alias = qat_sym_drv_name
310 qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
311 struct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)
314 struct qat_device_info *qat_dev_instance =
315 &qat_pci_devs[qat_pci_dev->qat_dev_id];
317 struct rte_cryptodev_pmd_init_params init_params = {
320 qat_dev_instance->pci_dev->device.numa_node,
321 .private_data_size = sizeof(struct qat_sym_dev_private)
323 char name[RTE_CRYPTODEV_NAME_MAX_LEN];
324 char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
325 struct rte_cryptodev *cryptodev;
326 struct qat_sym_dev_private *internals;
327 const struct rte_cryptodev_capabilities *capabilities;
331 * All processes must use same driver id so they can share sessions.
332 * Store driver_id so we can validate that all processes have the same
333 * value, typically they have, but could differ if binaries built
336 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
337 qat_pci_dev->qat_sym_driver_id =
339 } else if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
340 if (qat_pci_dev->qat_sym_driver_id !=
343 "Device %s have different driver id than corresponding device in primary process",
349 #ifdef RTE_LIBRTE_SECURITY
350 struct rte_security_ctx *security_instance;
353 snprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, "%s_%s",
354 qat_pci_dev->name, "sym");
355 QAT_LOG(DEBUG, "Creating QAT SYM device %s", name);
357 /* Populate subset device to use in cryptodev device creation */
358 qat_dev_instance->sym_rte_dev.driver = &cryptodev_qat_sym_driver;
359 qat_dev_instance->sym_rte_dev.numa_node =
360 qat_dev_instance->pci_dev->device.numa_node;
361 qat_dev_instance->sym_rte_dev.devargs = NULL;
363 cryptodev = rte_cryptodev_pmd_create(name,
364 &(qat_dev_instance->sym_rte_dev), &init_params);
366 if (cryptodev == NULL)
369 qat_dev_instance->sym_rte_dev.name = cryptodev->data->name;
370 cryptodev->driver_id = qat_sym_driver_id;
371 cryptodev->dev_ops = &crypto_qat_ops;
373 cryptodev->enqueue_burst = qat_sym_pmd_enqueue_op_burst;
374 cryptodev->dequeue_burst = qat_sym_pmd_dequeue_op_burst;
376 cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
377 RTE_CRYPTODEV_FF_HW_ACCELERATED |
378 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
379 RTE_CRYPTODEV_FF_IN_PLACE_SGL |
380 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
381 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
382 RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT |
383 RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
384 RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED |
385 RTE_CRYPTODEV_FF_SECURITY;
387 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
390 snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
391 "QAT_SYM_CAPA_GEN_%d",
392 qat_pci_dev->qat_dev_gen);
394 #ifdef RTE_LIBRTE_SECURITY
395 security_instance = rte_malloc("qat_sec",
396 sizeof(struct rte_security_ctx),
397 RTE_CACHE_LINE_SIZE);
398 if (security_instance == NULL) {
399 QAT_LOG(ERR, "rte_security_ctx memory alloc failed");
400 rte_cryptodev_pmd_destroy(cryptodev);
404 security_instance->device = (void *)cryptodev;
405 security_instance->ops = &security_qat_ops;
406 security_instance->sess_cnt = 0;
407 cryptodev->security_ctx = security_instance;
410 internals = cryptodev->data->dev_private;
411 internals->qat_dev = qat_pci_dev;
413 internals->sym_dev_id = cryptodev->data->dev_id;
414 switch (qat_pci_dev->qat_dev_gen) {
416 capabilities = qat_gen1_sym_capabilities;
417 capa_size = sizeof(qat_gen1_sym_capabilities);
420 capabilities = qat_gen2_sym_capabilities;
421 capa_size = sizeof(qat_gen2_sym_capabilities);
424 capabilities = qat_gen3_sym_capabilities;
425 capa_size = sizeof(qat_gen3_sym_capabilities);
429 "QAT gen %d capabilities unknown",
430 qat_pci_dev->qat_dev_gen);
431 rte_cryptodev_pmd_destroy(cryptodev);
432 memset(&qat_dev_instance->sym_rte_dev, 0,
433 sizeof(qat_dev_instance->sym_rte_dev));
437 internals->capa_mz = rte_memzone_lookup(capa_memz_name);
438 if (internals->capa_mz == NULL) {
439 internals->capa_mz = rte_memzone_reserve(capa_memz_name,
443 if (internals->capa_mz == NULL) {
445 "Error allocating memzone for capabilities, destroying PMD for %s",
447 rte_cryptodev_pmd_destroy(cryptodev);
448 memset(&qat_dev_instance->sym_rte_dev, 0,
449 sizeof(qat_dev_instance->sym_rte_dev));
453 memcpy(internals->capa_mz->addr, capabilities, capa_size);
454 internals->qat_dev_capabilities = internals->capa_mz->addr;
457 if (qat_dev_cmd_param[i].name == NULL)
459 if (!strcmp(qat_dev_cmd_param[i].name, SYM_ENQ_THRESHOLD_NAME))
460 internals->min_enq_burst_threshold =
461 qat_dev_cmd_param[i].val;
465 qat_pci_dev->sym_dev = internals;
466 QAT_LOG(DEBUG, "Created QAT SYM device %s as cryptodev instance %d",
467 cryptodev->data->name, internals->sym_dev_id);
473 qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)
475 struct rte_cryptodev *cryptodev;
477 if (qat_pci_dev == NULL)
479 if (qat_pci_dev->sym_dev == NULL)
481 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
482 rte_memzone_free(qat_pci_dev->sym_dev->capa_mz);
484 /* free crypto device */
485 cryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);
486 #ifdef RTE_LIBRTE_SECURITY
487 rte_free(cryptodev->security_ctx);
489 rte_cryptodev_pmd_destroy(cryptodev);
490 qat_pci_devs[qat_pci_dev->qat_dev_id].sym_rte_dev.name = NULL;
491 qat_pci_dev->sym_dev = NULL;
496 static struct cryptodev_driver qat_crypto_drv;
497 RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
498 cryptodev_qat_sym_driver,