drivers/event/cnxk/cnxk_eventdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CNXK_EVENTDEV_H__
   6 #define __CNXK_EVENTDEV_H__
   7
   8 #include <string.h>
   9
  10 #include <cryptodev_pmd.h>
  11 #include <rte_devargs.h>
  12 #include <rte_ethdev.h>
  13 #include <rte_event_eth_rx_adapter.h>
  14 #include <rte_event_eth_tx_adapter.h>
  15 #include <rte_kvargs.h>
  16 #include <rte_mbuf_pool_ops.h>
  17 #include <rte_pci.h>
  18
  19 #include <eventdev_pmd_pci.h>
  20
  21 #include "roc_api.h"
  22
  23 #include "cnxk_tim_evdev.h"
  24
  25 #define CNXK_SSO_XAE_CNT   "xae_cnt"
  26 #define CNXK_SSO_GGRP_QOS  "qos"
  27 #define CNXK_SSO_FORCE_BP  "force_rx_bp"
  28 #define CN9K_SSO_SINGLE_WS "single_ws"
  29 #define CN10K_SSO_GW_MODE  "gw_mode"
  30
  31 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
  32 #define USEC2NSEC(__us)         ((__us)*1E3)
  33 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  34
  35 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  36 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  37 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  38 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  39 #define CNXK_SSO_XAQ_SLACK     (8)
  40 #define CNXK_SSO_WQE_SG_PTR    (9)
  41 #define CNXK_SSO_SQB_LIMIT     (0x180)
  42
  43 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  44 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  45 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  46 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  47 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
  48 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  49 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  50
  51 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  52
  53 #define CN10K_GW_MODE_NONE     0
  54 #define CN10K_GW_MODE_PREF     1
  55 #define CN10K_GW_MODE_PREF_WFE 2
  56
  57 #define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name)                               \
  58         do {                                                                   \
  59                 if (strncmp(dev->driver->name, drv_name, strlen(drv_name)))    \
  60                         return -EINVAL;                                        \
  61         } while (0)
  62
  63 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  64 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
  65 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  66 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  67                                uint16_t nb_link);
  68 typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
  69                                  uint16_t nb_link);
  70 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  71 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  72 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  73                                      cnxk_handle_event_t fn, void *arg);
  74
  75 struct cnxk_sso_qos {
  76         uint16_t queue;
  77         uint8_t xaq_prcnt;
  78         uint8_t taq_prcnt;
  79         uint8_t iaq_prcnt;
  80 };
  81
  82 struct cnxk_sso_evdev {
  83         struct roc_sso sso;
  84         uint8_t max_event_queues;
  85         uint8_t max_event_ports;
  86         uint8_t is_timeout_deq;
  87         uint8_t nb_event_queues;
  88         uint8_t nb_event_ports;
  89         uint8_t configured;
  90         uint32_t deq_tmo_ns;
  91         uint32_t min_dequeue_timeout_ns;
  92         uint32_t max_dequeue_timeout_ns;
  93         int32_t max_num_events;
  94         uint64_t *fc_mem;
  95         uint64_t xaq_lmt;
  96         uint64_t nb_xaq_cfg;
  97         rte_iova_t fc_iova;
  98         struct rte_mempool *xaq_pool;
  99         uint64_t rx_offloads;
 100         uint64_t tx_offloads;
 101         uint64_t adptr_xae_cnt;
 102         uint16_t rx_adptr_pool_cnt;
 103         uint64_t *rx_adptr_pools;
 104         uint64_t *tx_adptr_data;
 105         uint16_t max_port_id;
 106         uint16_t tim_adptr_ring_cnt;
 107         uint16_t *timer_adptr_rings;
 108         uint64_t *timer_adptr_sz;
 109         uint16_t vec_pool_cnt;
 110         uint64_t *vec_pools;
 111         /* Dev args */
 112         uint32_t xae_cnt;
 113         uint8_t qos_queue_cnt;
 114         struct cnxk_sso_qos *qos_parse_data;
 115         uint8_t force_ena_bp;
 116         /* CN9K */
 117         uint8_t dual_ws;
 118         /* CN10K */
 119         uint8_t gw_mode;
 120         /* Crypto adapter */
 121         uint8_t is_ca_internal_port;
 122 } __rte_cache_aligned;
 123
 124 struct cn10k_sso_hws {
 125         uint64_t base;
 126         /* PTP timestamp */
 127         struct cnxk_timesync_info *tstamp;
 128         void *lookup_mem;
 129         uint32_t gw_wdata;
 130         uint8_t swtag_req;
 131         uint8_t hws_id;
 132         /* Add Work Fastpath data */
 133         uint64_t xaq_lmt __rte_cache_aligned;
 134         uint64_t *fc_mem;
 135         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 136         /* Tx Fastpath data */
 137         uint64_t tx_base __rte_cache_aligned;
 138         uintptr_t lmt_base;
 139         uint8_t tx_adptr_data[];
 140 } __rte_cache_aligned;
 141
 142 /* CN9K HWS ops */
 143 #define CN9K_SSO_HWS_OPS                                                       \
 144         uintptr_t swtag_desched_op;                                            \
 145         uintptr_t swtag_flush_op;                                              \
 146         uintptr_t swtag_norm_op;                                               \
 147         uintptr_t getwrk_op;                                                   \
 148         uintptr_t tag_op;                                                      \
 149         uintptr_t wqp_op
 150
 151 /* Event port a.k.a GWS */
 152 struct cn9k_sso_hws {
 153         /* Get Work Fastpath data */
 154         CN9K_SSO_HWS_OPS;
 155         /* PTP timestamp */
 156         struct cnxk_timesync_info *tstamp;
 157         void *lookup_mem;
 158         uint8_t swtag_req;
 159         uint8_t hws_id;
 160         /* Add Work Fastpath data */
 161         uint64_t xaq_lmt __rte_cache_aligned;
 162         uint64_t *fc_mem;
 163         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 164         /* Tx Fastpath data */
 165         uint64_t base __rte_cache_aligned;
 166         uint8_t tx_adptr_data[];
 167 } __rte_cache_aligned;
 168
 169 struct cn9k_sso_hws_state {
 170         CN9K_SSO_HWS_OPS;
 171 };
 172
 173 struct cn9k_sso_hws_dual {
 174         /* Get Work Fastpath data */
 175         struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */
 176         /* PTP timestamp */
 177         struct cnxk_timesync_info *tstamp;
 178         void *lookup_mem;
 179         uint8_t swtag_req;
 180         uint8_t vws; /* Ping pong bit */
 181         uint8_t hws_id;
 182         /* Add Work Fastpath data */
 183         uint64_t xaq_lmt __rte_cache_aligned;
 184         uint64_t *fc_mem;
 185         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 186         /* Tx Fastpath data */
 187         uint64_t base[2] __rte_cache_aligned;
 188         uint8_t tx_adptr_data[];
 189 } __rte_cache_aligned;
 190
 191 struct cnxk_sso_hws_cookie {
 192         const struct rte_eventdev *event_dev;
 193         bool configured;
 194 } __rte_cache_aligned;
 195
 196 static inline int
 197 parse_kvargs_flag(const char *key, const char *value, void *opaque)
 198 {
 199         RTE_SET_USED(key);
 200
 201         *(uint8_t *)opaque = !!atoi(value);
 202         return 0;
 203 }
 204
 205 static inline int
 206 parse_kvargs_value(const char *key, const char *value, void *opaque)
 207 {
 208         RTE_SET_USED(key);
 209
 210         *(uint32_t *)opaque = (uint32_t)atoi(value);
 211         return 0;
 212 }
 213
 214 static inline struct cnxk_sso_evdev *
 215 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 216 {
 217         return event_dev->data->dev_private;
 218 }
 219
 220 static inline struct cnxk_sso_hws_cookie *
 221 cnxk_sso_hws_get_cookie(void *ws)
 222 {
 223         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 224 }
 225
 226 /* Configuration functions */
 227 int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
 228 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 229 void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
 230                            uint32_t event_type);
 231
 232 /* Common ops API. */
 233 int cnxk_sso_init(struct rte_eventdev *event_dev);
 234 int cnxk_sso_fini(struct rte_eventdev *event_dev);
 235 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 236 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 237                        struct rte_event_dev_info *dev_info);
 238 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 239 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 240                            cnxk_sso_init_hws_mem_t init_hws_mem,
 241                            cnxk_sso_hws_setup_t hws_setup);
 242 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 243                             cnxk_sso_link_t link_fn);
 244 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 245                              struct rte_event_queue_conf *queue_conf);
 246 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 247                          const struct rte_event_queue_conf *queue_conf);
 248 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 249 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 250                             struct rte_event_port_conf *port_conf);
 251 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 252                         cnxk_sso_hws_setup_t hws_setup_fn);
 253 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 254                            uint64_t *tmo_ticks);
 255 int cnxk_sso_start(struct rte_eventdev *event_dev,
 256                    cnxk_sso_hws_reset_t reset_fn,
 257                    cnxk_sso_hws_flush_t flush_fn);
 258 void cnxk_sso_stop(struct rte_eventdev *event_dev,
 259                    cnxk_sso_hws_reset_t reset_fn,
 260                    cnxk_sso_hws_flush_t flush_fn);
 261 int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
 262 int cnxk_sso_selftest(const char *dev_name);
 263 void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
 264
 265 /* Stats API. */
 266 int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
 267                               enum rte_event_dev_xstats_mode mode,
 268                               uint8_t queue_port_id,
 269                               struct rte_event_dev_xstats_name *xstats_names,
 270                               unsigned int *ids, unsigned int size);
 271 int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
 272                         enum rte_event_dev_xstats_mode mode,
 273                         uint8_t queue_port_id, const unsigned int ids[],
 274                         uint64_t values[], unsigned int n);
 275 int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
 276                           enum rte_event_dev_xstats_mode mode,
 277                           int16_t queue_port_id, const uint32_t ids[],
 278                           uint32_t n);
 279
 280 /* Crypto adapter APIs. */
 281 int cnxk_crypto_adapter_qp_add(const struct rte_eventdev *event_dev,
 282                                const struct rte_cryptodev *cdev,
 283                                int32_t queue_pair_id);
 284 int cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev,
 285                                int32_t queue_pair_id);
 286
 287 /* CN9K */
 288 void cn9k_sso_set_rsrc(void *arg);
 289
 290 /* Common adapter ops */
 291 int cnxk_sso_rx_adapter_queue_add(
 292         const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
 293         int32_t rx_queue_id,
 294         const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
 295 int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
 296                                   const struct rte_eth_dev *eth_dev,
 297                                   int32_t rx_queue_id);
 298 int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
 299                               const struct rte_eth_dev *eth_dev);
 300 int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
 301                              const struct rte_eth_dev *eth_dev);
 302 int cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev,
 303                                   const struct rte_eth_dev *eth_dev,
 304                                   int32_t tx_queue_id);
 305 int cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev,
 306                                   const struct rte_eth_dev *eth_dev,
 307                                   int32_t tx_queue_id);
 308
 309 #endif /* __CNXK_EVENTDEV_H__ */