drivers/event/dpaa2/dpaa2_eventdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright 2017 NXP.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of NXP nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <assert.h>
  34 #include <stdio.h>
  35 #include <stdbool.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <stdint.h>
  40 #include <sys/epoll.h>
  41
  42 #include <rte_atomic.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_debug.h>
  46 #include <rte_dev.h>
  47 #include <rte_eal.h>
  48 #include <rte_fslmc.h>
  49 #include <rte_lcore.h>
  50 #include <rte_log.h>
  51 #include <rte_malloc.h>
  52 #include <rte_memcpy.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_pci.h>
  56 #include <rte_vdev.h>
  57
  58 #include <fslmc_vfio.h>
  59 #include <dpaa2_hw_pvt.h>
  60 #include <dpaa2_hw_mempool.h>
  61 #include <dpaa2_hw_dpio.h>
  62 #include "dpaa2_eventdev.h"
  63 #include <portal/dpaa2_hw_pvt.h>
  64 #include <mc/fsl_dpci.h>
  65
  66 /* Clarifications
  67  * Evendev = SoC Instance
  68  * Eventport = DPIO Instance
  69  * Eventqueue = DPCON Instance
  70  * 1 Eventdev can have N Eventqueue
  71  * Soft Event Flow is DPCI Instance
  72  */
  73
  74 static uint16_t
  75 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
  76                              uint16_t nb_events)
  77 {
  78         struct rte_eventdev *ev_dev =
  79                         ((struct dpaa2_io_portal_t *)port)->eventdev;
  80         struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
  81         uint32_t queue_id = ev[0].queue_id;
  82         struct evq_info_t *evq_info = &priv->evq_info[queue_id];
  83         uint32_t fqid;
  84         struct qbman_swp *swp;
  85         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
  86         uint32_t loop, frames_to_send;
  87         struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
  88         uint16_t num_tx = 0;
  89         int ret;
  90
  91         RTE_SET_USED(port);
  92
  93         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
  94                 ret = dpaa2_affine_qbman_swp();
  95                 if (ret) {
  96                         PMD_DRV_LOG(ERR, PMD, "Failure in affining portal\n");
  97                         return 0;
  98                 }
  99         }
 100
 101         swp = DPAA2_PER_LCORE_PORTAL;
 102
 103         while (nb_events) {
 104                 frames_to_send = (nb_events >> 3) ?
 105                         MAX_TX_RING_SLOTS : nb_events;
 106
 107                 for (loop = 0; loop < frames_to_send; loop++) {
 108                         const struct rte_event *event = &ev[num_tx + loop];
 109
 110                         if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
 111                                 fqid = evq_info->dpci->queue[
 112                                         DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
 113                         else
 114                                 fqid = evq_info->dpci->queue[
 115                                         DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
 116
 117                         /* Prepare enqueue descriptor */
 118                         qbman_eq_desc_clear(&eqdesc[loop]);
 119                         qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
 120                         qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
 121                         qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
 122
 123                         if (event->impl_opaque) {
 124                                 uint8_t dqrr_index = event->impl_opaque - 1;
 125
 126                                 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
 127                                                       dqrr_index, 0);
 128                                 DPAA2_PER_LCORE_DPIO->dqrr_size--;
 129                                 DPAA2_PER_LCORE_DPIO->dqrr_held &=
 130                                         ~(1 << dqrr_index);
 131                         }
 132
 133                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 134
 135                         /*
 136                          * todo - need to align with hw context data
 137                          * to avoid copy
 138                          */
 139                         struct rte_event *ev_temp = rte_malloc(NULL,
 140                                 sizeof(struct rte_event), 0);
 141                         rte_memcpy(ev_temp, event, sizeof(struct rte_event));
 142                         DPAA2_SET_FD_ADDR((&fd_arr[loop]), ev_temp);
 143                         DPAA2_SET_FD_LEN((&fd_arr[loop]),
 144                                          sizeof(struct rte_event));
 145                 }
 146                 loop = 0;
 147                 while (loop < frames_to_send) {
 148                         loop += qbman_swp_enqueue_multiple_eqdesc(swp,
 149                                         &eqdesc[loop], &fd_arr[loop],
 150                                         frames_to_send - loop);
 151                 }
 152                 num_tx += frames_to_send;
 153                 nb_events -= frames_to_send;
 154         }
 155
 156         return num_tx;
 157 }
 158
 159 static uint16_t
 160 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
 161 {
 162         return dpaa2_eventdev_enqueue_burst(port, ev, 1);
 163 }
 164
 165 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
 166 {
 167         struct epoll_event epoll_ev;
 168         int ret, i = 0;
 169
 170         qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
 171                                          QBMAN_SWP_INTERRUPT_DQRI);
 172
 173 RETRY:
 174         ret = epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
 175                          &epoll_ev, 1, timeout_ticks);
 176         if (ret < 1) {
 177                 /* sometimes due to some spurious interrupts epoll_wait fails
 178                  * with errno EINTR. so here we are retrying epoll_wait in such
 179                  * case to avoid the problem.
 180                  */
 181                 if (errno == EINTR) {
 182                         PMD_DRV_LOG(DEBUG, PMD, "epoll_wait fails\n");
 183                         if (i++ > 10)
 184                                 PMD_DRV_LOG(DEBUG, PMD,
 185                                             "Dequeue burst Failed\n");
 186                 goto RETRY;
 187                 }
 188         }
 189 }
 190
 191 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
 192                                             const struct qbman_fd *fd,
 193                                             const struct qbman_result *dq,
 194                                             struct rte_event *ev)
 195 {
 196         struct rte_event *ev_temp =
 197                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 198         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 199         rte_free(ev_temp);
 200
 201         qbman_swp_dqrr_consume(swp, dq);
 202 }
 203
 204 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
 205                                           const struct qbman_fd *fd,
 206                                           const struct qbman_result *dq,
 207                                           struct rte_event *ev)
 208 {
 209         struct rte_event *ev_temp =
 210                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 211         uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
 212
 213         RTE_SET_USED(swp);
 214
 215         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 216         rte_free(ev_temp);
 217         ev->impl_opaque = dqrr_index + 1;
 218         DPAA2_PER_LCORE_DPIO->dqrr_size++;
 219         DPAA2_PER_LCORE_DPIO->dqrr_held |= 1 << dqrr_index;
 220 }
 221
 222 static uint16_t
 223 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
 224                              uint16_t nb_events, uint64_t timeout_ticks)
 225 {
 226         const struct qbman_result *dq;
 227         struct qbman_swp *swp;
 228         const struct qbman_fd *fd;
 229         struct dpaa2_queue *rxq;
 230         int num_pkts = 0, ret, i = 0;
 231
 232         RTE_SET_USED(port);
 233
 234         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 235                 ret = dpaa2_affine_qbman_swp();
 236                 if (ret) {
 237                         PMD_DRV_LOG(ERR, PMD, "Failure in affining portal\n");
 238                         return 0;
 239                 }
 240         }
 241
 242         swp = DPAA2_PER_LCORE_PORTAL;
 243
 244         /* Check if there are atomic contexts to be released */
 245         while (DPAA2_PER_LCORE_DPIO->dqrr_size) {
 246                 if (DPAA2_PER_LCORE_DPIO->dqrr_held & (1 << i)) {
 247                         dq = qbman_get_dqrr_from_idx(swp, i);
 248                         qbman_swp_dqrr_consume(swp, dq);
 249                         DPAA2_PER_LCORE_DPIO->dqrr_size--;
 250                 }
 251                 i++;
 252         }
 253         DPAA2_PER_LCORE_DPIO->dqrr_held = 0;
 254
 255         do {
 256                 dq = qbman_swp_dqrr_next(swp);
 257                 if (!dq) {
 258                         if (!num_pkts && timeout_ticks) {
 259                                 dpaa2_eventdev_dequeue_wait(timeout_ticks);
 260                                 timeout_ticks = 0;
 261                                 continue;
 262                         }
 263                         return num_pkts;
 264                 }
 265
 266                 fd = qbman_result_DQ_fd(dq);
 267
 268                 rxq = (struct dpaa2_queue *)qbman_result_DQ_fqd_ctx(dq);
 269                 if (rxq) {
 270                         rxq->cb(swp, fd, dq, &ev[num_pkts]);
 271                 } else {
 272                         qbman_swp_dqrr_consume(swp, dq);
 273                         PMD_DRV_LOG(ERR, PMD, "Null Return VQ received\n");
 274                         return 0;
 275                 }
 276
 277                 num_pkts++;
 278         } while (num_pkts < nb_events);
 279
 280         return num_pkts;
 281 }
 282
 283 static uint16_t
 284 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
 285                        uint64_t timeout_ticks)
 286 {
 287         return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
 288 }
 289
 290 static void
 291 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
 292                         struct rte_event_dev_info *dev_info)
 293 {
 294         struct dpaa2_eventdev *priv = dev->data->dev_private;
 295
 296         PMD_DRV_FUNC_TRACE();
 297
 298         RTE_SET_USED(dev);
 299
 300         memset(dev_info, 0, sizeof(struct rte_event_dev_info));
 301         dev_info->min_dequeue_timeout_ns =
 302                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 303         dev_info->max_dequeue_timeout_ns =
 304                 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
 305         dev_info->dequeue_timeout_ns =
 306                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 307         dev_info->max_event_queues = priv->max_event_queues;
 308         dev_info->max_event_queue_flows =
 309                 DPAA2_EVENT_MAX_QUEUE_FLOWS;
 310         dev_info->max_event_queue_priority_levels =
 311                 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
 312         dev_info->max_event_priority_levels =
 313                 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
 314         dev_info->max_event_ports = RTE_MAX_LCORE;
 315         dev_info->max_event_port_dequeue_depth =
 316                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 317         dev_info->max_event_port_enqueue_depth =
 318                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 319         dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
 320         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED;
 321 }
 322
 323 static int
 324 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
 325 {
 326         struct dpaa2_eventdev *priv = dev->data->dev_private;
 327         struct rte_event_dev_config *conf = &dev->data->dev_conf;
 328
 329         PMD_DRV_FUNC_TRACE();
 330
 331         priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
 332         priv->nb_event_queues = conf->nb_event_queues;
 333         priv->nb_event_ports = conf->nb_event_ports;
 334         priv->nb_event_queue_flows = conf->nb_event_queue_flows;
 335         priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
 336         priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
 337         priv->event_dev_cfg = conf->event_dev_cfg;
 338
 339         PMD_DRV_LOG(DEBUG, "Configured eventdev devid=%d", dev->data->dev_id);
 340         return 0;
 341 }
 342
 343 static int
 344 dpaa2_eventdev_start(struct rte_eventdev *dev)
 345 {
 346         PMD_DRV_FUNC_TRACE();
 347
 348         RTE_SET_USED(dev);
 349
 350         return 0;
 351 }
 352
 353 static void
 354 dpaa2_eventdev_stop(struct rte_eventdev *dev)
 355 {
 356         PMD_DRV_FUNC_TRACE();
 357
 358         RTE_SET_USED(dev);
 359 }
 360
 361 static int
 362 dpaa2_eventdev_close(struct rte_eventdev *dev)
 363 {
 364         PMD_DRV_FUNC_TRACE();
 365
 366         RTE_SET_USED(dev);
 367
 368         return 0;
 369 }
 370
 371 static void
 372 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
 373                               struct rte_event_queue_conf *queue_conf)
 374 {
 375         PMD_DRV_FUNC_TRACE();
 376
 377         RTE_SET_USED(dev);
 378         RTE_SET_USED(queue_id);
 379         RTE_SET_USED(queue_conf);
 380
 381         queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
 382         queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY |
 383                                       RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
 384         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 385 }
 386
 387 static void
 388 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
 389 {
 390         PMD_DRV_FUNC_TRACE();
 391
 392         RTE_SET_USED(dev);
 393         RTE_SET_USED(queue_id);
 394 }
 395
 396 static int
 397 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 398                            const struct rte_event_queue_conf *queue_conf)
 399 {
 400         struct dpaa2_eventdev *priv = dev->data->dev_private;
 401         struct evq_info_t *evq_info =
 402                 &priv->evq_info[queue_id];
 403
 404         PMD_DRV_FUNC_TRACE();
 405
 406         evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
 407
 408         return 0;
 409 }
 410
 411 static void
 412 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
 413                              struct rte_event_port_conf *port_conf)
 414 {
 415         PMD_DRV_FUNC_TRACE();
 416
 417         RTE_SET_USED(dev);
 418         RTE_SET_USED(port_id);
 419         RTE_SET_USED(port_conf);
 420
 421         port_conf->new_event_threshold =
 422                 DPAA2_EVENT_MAX_NUM_EVENTS;
 423         port_conf->dequeue_depth =
 424                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 425         port_conf->enqueue_depth =
 426                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 427 }
 428
 429 static void
 430 dpaa2_eventdev_port_release(void *port)
 431 {
 432         PMD_DRV_FUNC_TRACE();
 433
 434         RTE_SET_USED(port);
 435 }
 436
 437 static int
 438 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 439                           const struct rte_event_port_conf *port_conf)
 440 {
 441         PMD_DRV_FUNC_TRACE();
 442
 443         RTE_SET_USED(port_conf);
 444
 445         if (!dpaa2_io_portal[port_id].dpio_dev) {
 446                 dpaa2_io_portal[port_id].dpio_dev =
 447                                 dpaa2_get_qbman_swp(port_id);
 448                 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
 449                 if (!dpaa2_io_portal[port_id].dpio_dev)
 450                         return -1;
 451         }
 452
 453         dpaa2_io_portal[port_id].eventdev = dev;
 454         dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
 455         return 0;
 456 }
 457
 458 static int
 459 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 460                            uint8_t queues[], uint16_t nb_unlinks)
 461 {
 462         struct dpaa2_eventdev *priv = dev->data->dev_private;
 463         struct dpaa2_io_portal_t *dpaa2_portal = port;
 464         struct evq_info_t *evq_info;
 465         int i;
 466
 467         PMD_DRV_FUNC_TRACE();
 468
 469         for (i = 0; i < nb_unlinks; i++) {
 470                 evq_info = &priv->evq_info[queues[i]];
 471                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 472                                    evq_info->dpcon->channel_index, 0);
 473                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 474                                         0, dpaa2_portal->dpio_dev->token,
 475                         evq_info->dpcon->dpcon_id);
 476                 evq_info->link = 0;
 477         }
 478
 479         return (int)nb_unlinks;
 480 }
 481
 482 static int
 483 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
 484                          const uint8_t queues[], const uint8_t priorities[],
 485                         uint16_t nb_links)
 486 {
 487         struct dpaa2_eventdev *priv = dev->data->dev_private;
 488         struct dpaa2_io_portal_t *dpaa2_portal = port;
 489         struct evq_info_t *evq_info;
 490         uint8_t channel_index;
 491         int ret, i, n;
 492
 493         PMD_DRV_FUNC_TRACE();
 494
 495         for (i = 0; i < nb_links; i++) {
 496                 evq_info = &priv->evq_info[queues[i]];
 497                 if (evq_info->link)
 498                         continue;
 499
 500                 ret = dpio_add_static_dequeue_channel(
 501                         dpaa2_portal->dpio_dev->dpio,
 502                         CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
 503                         evq_info->dpcon->dpcon_id, &channel_index);
 504                 if (ret < 0) {
 505                         PMD_DRV_ERR("Static dequeue cfg failed with ret: %d\n",
 506                                     ret);
 507                         goto err;
 508                 }
 509
 510                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 511                                    channel_index, 1);
 512                 evq_info->dpcon->channel_index = channel_index;
 513                 evq_info->link = 1;
 514         }
 515
 516         RTE_SET_USED(priorities);
 517
 518         return (int)nb_links;
 519 err:
 520         for (n = 0; n < i; n++) {
 521                 evq_info = &priv->evq_info[queues[n]];
 522                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 523                                    evq_info->dpcon->channel_index, 0);
 524                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 525                                         0, dpaa2_portal->dpio_dev->token,
 526                         evq_info->dpcon->dpcon_id);
 527                 evq_info->link = 0;
 528         }
 529         return ret;
 530 }
 531
 532 static int
 533 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 534                              uint64_t *timeout_ticks)
 535 {
 536         uint32_t scale = 1;
 537
 538         PMD_DRV_FUNC_TRACE();
 539
 540         RTE_SET_USED(dev);
 541         *timeout_ticks = ns * scale;
 542
 543         return 0;
 544 }
 545
 546 static void
 547 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
 548 {
 549         PMD_DRV_FUNC_TRACE();
 550
 551         RTE_SET_USED(dev);
 552         RTE_SET_USED(f);
 553 }
 554
 555 static const struct rte_eventdev_ops dpaa2_eventdev_ops = {
 556         .dev_infos_get    = dpaa2_eventdev_info_get,
 557         .dev_configure    = dpaa2_eventdev_configure,
 558         .dev_start        = dpaa2_eventdev_start,
 559         .dev_stop         = dpaa2_eventdev_stop,
 560         .dev_close        = dpaa2_eventdev_close,
 561         .queue_def_conf   = dpaa2_eventdev_queue_def_conf,
 562         .queue_setup      = dpaa2_eventdev_queue_setup,
 563         .queue_release    = dpaa2_eventdev_queue_release,
 564         .port_def_conf    = dpaa2_eventdev_port_def_conf,
 565         .port_setup       = dpaa2_eventdev_port_setup,
 566         .port_release     = dpaa2_eventdev_port_release,
 567         .port_link        = dpaa2_eventdev_port_link,
 568         .port_unlink      = dpaa2_eventdev_port_unlink,
 569         .timeout_ticks    = dpaa2_eventdev_timeout_ticks,
 570         .dump             = dpaa2_eventdev_dump
 571 };
 572
 573 static int
 574 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
 575                           struct dpaa2_dpcon_dev *dpcon_dev)
 576 {
 577         struct dpci_rx_queue_cfg rx_queue_cfg;
 578         int ret, i;
 579
 580         /*Do settings to get the frame on a DPCON object*/
 581         rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
 582                   DPCI_QUEUE_OPT_USER_CTX;
 583         rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
 584         rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
 585         rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
 586
 587         dpci_dev->queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
 588                 dpaa2_eventdev_process_parallel;
 589         dpci_dev->queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
 590                 dpaa2_eventdev_process_atomic;
 591
 592         for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
 593                 rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
 594                 ret = dpci_set_rx_queue(&dpci_dev->dpci,
 595                                         CMD_PRI_LOW,
 596                                         dpci_dev->token, i,
 597                                         &rx_queue_cfg);
 598                 if (ret) {
 599                         PMD_DRV_LOG(ERR, PMD,
 600                                     "set_rx_q failed with err code: %d", ret);
 601                         return ret;
 602                 }
 603         }
 604         return 0;
 605 }
 606
 607 static int
 608 dpaa2_eventdev_create(const char *name)
 609 {
 610         struct rte_eventdev *eventdev;
 611         struct dpaa2_eventdev *priv;
 612         struct dpaa2_dpcon_dev *dpcon_dev = NULL;
 613         struct dpaa2_dpci_dev *dpci_dev = NULL;
 614         int ret;
 615
 616         eventdev = rte_event_pmd_vdev_init(name,
 617                                            sizeof(struct dpaa2_eventdev),
 618                                            rte_socket_id());
 619         if (eventdev == NULL) {
 620                 PMD_DRV_ERR("Failed to create eventdev vdev %s", name);
 621                 goto fail;
 622         }
 623
 624         eventdev->dev_ops       = &dpaa2_eventdev_ops;
 625         eventdev->schedule      = NULL;
 626         eventdev->enqueue       = dpaa2_eventdev_enqueue;
 627         eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
 628         eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
 629         eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
 630         eventdev->dequeue       = dpaa2_eventdev_dequeue;
 631         eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
 632
 633         /* For secondary processes, the primary has done all the work */
 634         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 635                 return 0;
 636
 637         priv = eventdev->data->dev_private;
 638         priv->max_event_queues = 0;
 639
 640         do {
 641                 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
 642                 if (!dpcon_dev)
 643                         break;
 644                 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
 645
 646                 dpci_dev = rte_dpaa2_alloc_dpci_dev();
 647                 if (!dpci_dev) {
 648                         rte_dpaa2_free_dpcon_dev(dpcon_dev);
 649                         break;
 650                 }
 651                 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
 652
 653                 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
 654                 if (ret) {
 655                         PMD_DRV_LOG(ERR, PMD,
 656                                     "dpci setup failed with err code: %d", ret);
 657                         return ret;
 658                 }
 659                 priv->max_event_queues++;
 660         } while (dpcon_dev && dpci_dev);
 661
 662         return 0;
 663 fail:
 664         return -EFAULT;
 665 }
 666
 667 static int
 668 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
 669 {
 670         const char *name;
 671
 672         name = rte_vdev_device_name(vdev);
 673         PMD_DRV_LOG(INFO, PMD, "Initializing %s\n", name);
 674         return dpaa2_eventdev_create(name);
 675 }
 676
 677 static int
 678 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
 679 {
 680         const char *name;
 681
 682         name = rte_vdev_device_name(vdev);
 683         PMD_DRV_LOG(INFO, "Closing %s", name);
 684
 685         return rte_event_pmd_vdev_uninit(name);
 686 }
 687
 688 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
 689         .probe = dpaa2_eventdev_probe,
 690         .remove = dpaa2_eventdev_remove
 691 };
 692
 693 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);